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CMakeLists.txt
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DAGCombiner.cpp
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[DAGCombiner] widen any_ext of popcount based on target support
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2019-10-28 10:07:12 -04:00 |
FastISel.cpp
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Recommit "Add a heap alloc site marker field to the ExtraInfo in MachineInstrs"
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2019-10-28 16:59:32 -07:00 |
FunctionLoweringInfo.cpp
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Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
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2019-10-19 01:31:09 +00:00 |
InstrEmitter.cpp
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[DebugInfo] Remove some users of DBG_VALUEs IsIndirect field
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2019-10-15 10:46:24 +00:00 |
InstrEmitter.h
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LegalizeDAG.cpp
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Prune Analysis includes from SelectionDAG.h
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2019-10-19 01:07:48 +00:00 |
LegalizeFloatTypes.cpp
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[Codegen][ARM] Add float softening for cbrt
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2019-10-28 11:08:55 +00:00 |
LegalizeIntegerTypes.cpp
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[LegalizeTypes] When promoting BITREVERSE/BSWAP don't take the shift amount into account when determining the shift amount VT.
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2019-10-27 12:20:35 -07:00 |
LegalizeTypes.cpp
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[LegalizeTypes] Remove code for softening a float type to itself.
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2019-09-12 05:55:14 +00:00 |
LegalizeTypes.h
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[Codegen][ARM] Add float softening for cbrt
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2019-10-28 11:08:55 +00:00 |
LegalizeTypesGeneric.cpp
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[LegalizeTypes][X86] When splitting a vselect for type legalization, don't split a setcc condition if the setcc input is legal and vXi1 conditions are supported
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2019-10-06 18:43:03 +00:00 |
LegalizeVectorOps.cpp
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Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
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2019-10-19 01:31:09 +00:00 |
LegalizeVectorTypes.cpp
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[LegalizeTypes] Don't use PromoteTargetBoolean in WidenVecOp_SETCC.
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2019-10-16 03:29:24 +00:00 |
LLVMBuild.txt
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ResourcePriorityQueue.cpp
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ScheduleDAGFast.cpp
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Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
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2019-08-01 23:27:28 +00:00 |
ScheduleDAGRRList.cpp
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[ScheduleDAG] When a node is cloned, add an edge between the nodes.
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2019-10-04 19:51:40 +00:00 |
ScheduleDAGSDNodes.cpp
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Recommit "Add a heap alloc site marker field to the ExtraInfo in MachineInstrs"
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2019-10-28 16:59:32 -07:00 |
ScheduleDAGSDNodes.h
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Prune Analysis includes from SelectionDAG.h
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2019-10-19 01:07:48 +00:00 |
ScheduleDAGVLIW.cpp
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Prune Analysis includes from SelectionDAG.h
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2019-10-19 01:07:48 +00:00 |
SDNodeDbgValue.h
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SelectionDAG.cpp
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[AArch64][SVE] Implement masked load intrinsics
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2019-10-28 10:06:14 +00:00 |
SelectionDAGAddressAnalysis.cpp
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Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
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2019-10-19 01:31:09 +00:00 |
SelectionDAGBuilder.cpp
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Fix some spelling mistakes in comments. NFC
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2019-10-29 12:41:24 +00:00 |
SelectionDAGBuilder.h
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[llvm] Migrate llvm::make_unique to std::make_unique
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2019-08-15 15:54:37 +00:00 |
SelectionDAGDumper.cpp
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[AArch64][SVE] Add SPLAT_VECTOR ISD Node
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2019-10-18 11:48:35 +00:00 |
SelectionDAGISel.cpp
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Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
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2019-10-19 01:31:09 +00:00 |
SelectionDAGPrinter.cpp
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SelectionDAGTargetInfo.cpp
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StatepointLowering.cpp
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[Statepoints] Fix overalignment of loads in no-realign-stack functions
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2019-08-02 20:17:37 +00:00 |
StatepointLowering.h
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TargetLowering.cpp
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[TargetLowering] Add getBooleanContents contents check to "SETCC (SETCC), [0|1], [EQ|NE] -> SETCC" combine.
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2019-10-27 10:07:15 -07:00 |