Tim Northover 05fe8f918b [DAG] check more operands for cycles when merging stores. ... Until now, we've only checked whether merging stores would cause a cycle via the value argument, but the address and indexed offset arguments are also capable of creating cycles in some situations. The addresses are all base+offset with notionally the same base, but the base SDNode may still be different (e.g. via an indexed load in one case, and an ISD::ADD elsewhere). This allows cycles to creep in if one of these sources depends on another. The indexed offset is usually undef (representing a non-indexed store), but on some architectures (e.g. 32-bit ARM-mode ARM) it can be an arbitrary value, again allowing dependency cycles to creep in. llvm-svn: 345200		2018-10-24 21:36:34 +00:00
..
CMakeLists.txt
DAGCombiner.cpp	[DAG] check more operands for cycles when merging stores.	2018-10-24 21:36:34 +00:00
FastISel.cpp	[TI removal] Make variables declared as TerminatorInst and initialized	2018-10-15 10:04:59 +00:00
FunctionLoweringInfo.cpp	DAG: Add calling convention argument to calling convention funcs	2018-07-28 13:25:19 +00:00
InstrEmitter.cpp	Copy utilities updated and added for MI flags	2018-09-19 18:52:08 +00:00
InstrEmitter.h	[DebugInfo] Convert intrinsic llvm.dbg.label to MachineInstr.	2018-05-09 02:41:08 +00:00
LegalizeDAG.cpp	[LegalizeDAG] ExpandLegalINT_TO_FP - cleanup UINT_TO_FP i64 -> f32 expansion.	2018-10-24 16:35:01 +00:00
LegalizeFloatTypes.cpp	DAG: Try to custom lower when promoting float operands	2018-08-15 20:34:54 +00:00
LegalizeIntegerTypes.cpp	[Intrinsic] Unigned Saturation Addition Intrinsic	2018-10-22 23:08:40 +00:00
LegalizeTypes.cpp	[DAG] Don't map a TableId to itself in the ReplacedValues map	2018-06-20 16:06:09 +00:00
LegalizeTypes.h	[Intrinsic] Unigned Saturation Addition Intrinsic	2018-10-22 23:08:40 +00:00
LegalizeTypesGeneric.cpp	[LegalizeTypes] Fix bad indentation. NFC	2018-09-23 21:17:55 +00:00
LegalizeVectorOps.cpp	[LegalizeDAG] Share Vector/Scalar CTLZ Expansion	2018-10-23 17:48:30 +00:00
LegalizeVectorTypes.cpp	[Intrinsic] Unigned Saturation Addition Intrinsic	2018-10-22 23:08:40 +00:00
LLVMBuild.txt
ResourcePriorityQueue.cpp	Silence a bunch of implicit fallthrough warnings	2017-12-19 22:05:25 +00:00
ScheduleDAGFast.cpp	ScheduleDAG: Cleanup dumping code; NFC	2018-09-19 00:23:35 +00:00
ScheduleDAGRRList.cpp	ScheduleDAG: Cleanup dumping code; NFC	2018-09-19 00:23:35 +00:00
ScheduleDAGSDNodes.cpp	llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)	2018-09-27 02:13:45 +00:00
ScheduleDAGSDNodes.h	ScheduleDAG: Cleanup dumping code; NFC	2018-09-19 00:23:35 +00:00
ScheduleDAGVLIW.cpp	ScheduleDAG: Cleanup dumping code; NFC	2018-09-19 00:23:35 +00:00
SDNodeDbgValue.h	SelectionDAG: Add compact SDDbgValue representation to -dag-dump-verbose output	2018-09-14 17:08:02 +00:00
SelectionDAG.cpp	SelectionDAG: Reuse bigger sized constants in memset expansion.	2018-10-23 23:19:23 +00:00
SelectionDAGAddressAnalysis.cpp	[DAG] Teach findBaseOffset to interpret indexes of indexed memory operations	2018-01-26 16:51:27 +00:00
SelectionDAGBuilder.cpp	[SelectionDAG] use 'match' to simplify code; NFC	2018-10-23 15:46:10 +00:00
SelectionDAGBuilder.h	DAG: Add calling convention argument to calling convention funcs	2018-07-28 13:25:19 +00:00
SelectionDAGDumper.cpp	[Intrinsic] Unigned Saturation Addition Intrinsic	2018-10-22 23:08:40 +00:00
SelectionDAGISel.cpp	Revert "[WebAssembly] LSDA info generation"	2018-10-16 18:50:09 +00:00
SelectionDAGPrinter.cpp	Rename DEBUG macro to LLVM_DEBUG.	2018-05-14 12:53:11 +00:00
SelectionDAGTargetInfo.cpp
StatepointLowering.cpp	Remove trailing space	2018-07-30 19:41:25 +00:00
StatepointLowering.h	[IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to CodeGen layer.	2018-03-29 17:21:10 +00:00
TargetLowering.cpp	[TargetLowering] Add SimplifyDemandedBitsForTargetNode callback	2018-10-24 19:00:56 +00:00