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e4d12bb2d6
If we are only extracting vector elements via EXTRACT_VECTOR_ELT(s) we may be able to use SimplifyDemandedVectorElts to avoid unnecessary vector ops. Differential Revision: https://reviews.llvm.org/D49262 llvm-svn: 337258
24 lines
742 B
LLVM
24 lines
742 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
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; Verify that we don't fail when shift by zero is encountered.
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define i64 @test1(<2 x i64> %a) {
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; X32-LABEL: test1:
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; X32: # %bb.0: # %entry
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; X32-NEXT: movd %xmm0, %eax
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; X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; X32-NEXT: movd %xmm0, %edx
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; X32-NEXT: retl
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;
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; X64-LABEL: test1:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movq %xmm0, %rax
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; X64-NEXT: retq
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entry:
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%c = shl <2 x i64> %a, <i64 0, i64 2>
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%d = extractelement <2 x i64> %c, i32 0
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ret i64 %d
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}
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