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https://github.com/Gericom/teak-llvm.git
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b353d6887e
In r311255 we added a case where we split vectors whose elements are all derived from the same input vector so that we could shuffle it more efficiently. In doing so, createBuildVecShuffle was taught to adjust for the fact that all indices would be based off of the first vector when this happens, but it's possible for the code that checked that to fire incorrectly if we happen to have a BUILD_VECTOR of extracts from subvectors and don't hit this new optimization. Instead of trying to detect if we've split the vector by checking if we have extracts from the same base vector, we can just pass that information into createBuildVecShuffle, avoiding the miscompile. Differential Revision: https://reviews.llvm.org/D59507 llvm-svn: 356476
49 lines
2.2 KiB
LLVM
49 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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define void @f(<4 x half>* %a, <4 x half>* %b, <8 x half>* %c) {
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; CHECK-LABEL: f:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movzwl (%rdi), %r8d
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; CHECK-NEXT: movzwl 2(%rdi), %r9d
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; CHECK-NEXT: movzwl 4(%rdi), %r11d
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; CHECK-NEXT: movzwl 6(%rdi), %edi
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; CHECK-NEXT: movzwl (%rsi), %r10d
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; CHECK-NEXT: movzwl 2(%rsi), %ecx
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; CHECK-NEXT: movzwl 4(%rsi), %eax
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; CHECK-NEXT: movzwl 6(%rsi), %esi
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; CHECK-NEXT: movw %si, 14(%rdx)
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; CHECK-NEXT: movw %di, 12(%rdx)
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; CHECK-NEXT: movw %ax, 10(%rdx)
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; CHECK-NEXT: movw %r11w, 8(%rdx)
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; CHECK-NEXT: movw %cx, 6(%rdx)
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; CHECK-NEXT: movw %r9w, 4(%rdx)
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; CHECK-NEXT: movw %r10w, 2(%rdx)
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; CHECK-NEXT: movw %r8w, (%rdx)
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; CHECK-NEXT: retq
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%tmp4 = load <4 x half>, <4 x half>* %a
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%tmp5 = load <4 x half>, <4 x half>* %b
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%tmp7 = shufflevector <4 x half> %tmp4, <4 x half> %tmp5, <2 x i32> <i32 0, i32 4>
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%tmp8 = shufflevector <4 x half> %tmp4, <4 x half> %tmp5, <2 x i32> <i32 1, i32 5>
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%tmp9 = shufflevector <4 x half> %tmp4, <4 x half> %tmp5, <2 x i32> <i32 2, i32 6>
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%tmp10 = shufflevector <4 x half> %tmp4, <4 x half> %tmp5, <2 x i32> <i32 3, i32 7>
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%tmp11 = extractelement <2 x half> %tmp7, i32 0
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%tmp12 = insertelement <8 x half> undef, half %tmp11, i32 0
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%tmp13 = extractelement <2 x half> %tmp7, i32 1
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%tmp14 = insertelement <8 x half> %tmp12, half %tmp13, i32 1
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%tmp15 = extractelement <2 x half> %tmp8, i32 0
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%tmp16 = insertelement <8 x half> %tmp14, half %tmp15, i32 2
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%tmp17 = extractelement <2 x half> %tmp8, i32 1
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%tmp18 = insertelement <8 x half> %tmp16, half %tmp17, i32 3
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%tmp19 = extractelement <2 x half> %tmp9, i32 0
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%tmp20 = insertelement <8 x half> %tmp18, half %tmp19, i32 4
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%tmp21 = extractelement <2 x half> %tmp9, i32 1
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%tmp22 = insertelement <8 x half> %tmp20, half %tmp21, i32 5
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%tmp23 = extractelement <2 x half> %tmp10, i32 0
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%tmp24 = insertelement <8 x half> %tmp22, half %tmp23, i32 6
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%tmp25 = extractelement <2 x half> %tmp10, i32 1
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%tmp26 = insertelement <8 x half> %tmp24, half %tmp25, i32 7
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store <8 x half> %tmp26, <8 x half>* %c
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ret void
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}
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