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https://github.com/Gericom/teak-llvm.git
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6d7bf5e8df
This patch add the ISD::LRINT and ISD::LLRINT along with new intrinsics. The changes are straightforward as for other floating-point rounding functions, with just some adjustments required to handle the return value being an interger. The idea is to optimize lrint/llrint generation for AArch64 in a subsequent patch. Current semantic is just route it to libm symbol. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D62017 llvm-svn: 361875
84 lines
2.3 KiB
LLVM
84 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
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define i32 @testmsws(float %x) {
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; CHECK-LABEL: testmsws:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: callq llrintf
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; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
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; CHECK-NEXT: popq %rcx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i64 @llvm.llrint.f32(float %x)
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%conv = trunc i64 %0 to i32
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ret i32 %conv
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}
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define i64 @testmsxs(float %x) {
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; CHECK-LABEL: testmsxs:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: jmp llrintf # TAILCALL
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entry:
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%0 = tail call i64 @llvm.llrint.f32(float %x)
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ret i64 %0
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}
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define i32 @testmswd(double %x) {
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; CHECK-LABEL: testmswd:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: callq llrint
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; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
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; CHECK-NEXT: popq %rcx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i64 @llvm.llrint.f64(double %x)
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%conv = trunc i64 %0 to i32
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ret i32 %conv
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}
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define i64 @testmsxd(double %x) {
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; CHECK-LABEL: testmsxd:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: jmp llrint # TAILCALL
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entry:
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%0 = tail call i64 @llvm.llrint.f64(double %x)
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ret i64 %0
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}
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define dso_local i32 @testmswl(x86_fp80 %x) {
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; CHECK-LABEL: testmswl:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: subq $24, %rsp
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
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; CHECK-NEXT: fstpt (%rsp)
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; CHECK-NEXT: callq llrintl
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; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
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; CHECK-NEXT: addq $24, %rsp
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i64 @llvm.llrint.f80(x86_fp80 %x)
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%conv = trunc i64 %0 to i32
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ret i32 %conv
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}
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define dso_local i64 @testmsll(x86_fp80 %x) {
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; CHECK-LABEL: testmsll:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: jmp llrintl # TAILCALL
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entry:
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%0 = tail call i64 @llvm.llrint.f80(x86_fp80 %x)
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ret i64 %0
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}
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declare i64 @llvm.llrint.f32(float) nounwind readnone
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declare i64 @llvm.llrint.f64(double) nounwind readnone
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declare i64 @llvm.llrint.f80(x86_fp80) nounwind readnone
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