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828b685ebe
Trace through multiple COPYs when looking for a physreg source. Add hinting for vregs that will be copied into physregs (we only hinted for vregs getting copied to a physreg previously). Give hinted a register a bonus when deciding which value to spill. This is part of my rewrite regallocfast series. In fact this one doesn't even have an effect unless you also flip the allocation to happen from back to front of a basic block. Nonetheless it helps to split this up to ease review of D52010 Patch by Matthias Braun llvm-svn: 360887
25 lines
966 B
LLVM
25 lines
966 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -O0 | FileCheck %s
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; Make sure we only use the less significant bit of the value that feeds the
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; select. Otherwise, we may account for a non-zero value whereas the
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; lsb is zero.
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; <rdar://problem/15651765>
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define i32 @fastisel_select(i1 %exchSub2211_, i1 %trunc_8766) {
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; CHECK-LABEL: fastisel_select:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: ## kill: def $sil killed $sil killed $esi
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; CHECK-NEXT: ## kill: def $dil killed $dil killed $edi
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: subb %sil, %dil
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: movl $1204476887, %ecx ## imm = 0x47CADBD7
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; CHECK-NEXT: cmovnel %ecx, %eax
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; CHECK-NEXT: retq
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%shuffleInternal15257_8932 = sub i1 %exchSub2211_, %trunc_8766
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%counter_diff1345 = select i1 %shuffleInternal15257_8932, i32 1204476887, i32 0
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ret i32 %counter_diff1345
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}
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