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https://github.com/Gericom/teak-llvm.git
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2d0f20cc04
Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 llvm-svn: 342578
58 lines
1.8 KiB
LLVM
58 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
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%0 = type { i32, i32, i32, i32 }
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%1 = type { i1, i1, i1, i32 }
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define fastcc %0 @ReturnBigStruct() nounwind readnone {
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; X86-LABEL: ReturnBigStruct:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: movl $24601, 12(%ecx) # imm = 0x6019
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; X86-NEXT: movl $48, 8(%ecx)
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; X86-NEXT: movl $24, 4(%ecx)
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; X86-NEXT: movl $12, (%ecx)
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; X86-NEXT: retl
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;
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; X64-LABEL: ReturnBigStruct:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: movabsq $105660490448944, %rcx # imm = 0x601900000030
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; X64-NEXT: movq %rcx, 8(%rdi)
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; X64-NEXT: movabsq $103079215116, %rcx # imm = 0x180000000C
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; X64-NEXT: movq %rcx, (%rdi)
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; X64-NEXT: retq
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entry:
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%0 = insertvalue %0 zeroinitializer, i32 12, 0
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%1 = insertvalue %0 %0, i32 24, 1
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%2 = insertvalue %0 %1, i32 48, 2
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%3 = insertvalue %0 %2, i32 24601, 3
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ret %0 %3
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}
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define fastcc %1 @ReturnBigStruct2() nounwind readnone {
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; X86-LABEL: ReturnBigStruct2:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: movl $48, 4(%ecx)
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; X86-NEXT: movb $1, 2(%ecx)
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; X86-NEXT: movw $256, (%ecx) # imm = 0x100
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; X86-NEXT: retl
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;
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; X64-LABEL: ReturnBigStruct2:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: movl $48, 4(%rdi)
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; X64-NEXT: movb $1, 2(%rdi)
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; X64-NEXT: movw $256, (%rdi) # imm = 0x100
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; X64-NEXT: retq
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entry:
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%0 = insertvalue %1 zeroinitializer, i1 false, 0
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%1 = insertvalue %1 %0, i1 true, 1
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%2 = insertvalue %1 %1, i1 true, 2
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%3 = insertvalue %1 %2, i32 48, 3
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ret %1 %3
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}
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