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https://github.com/Gericom/teak-llvm.git
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064859bde7
Summary: This patch implements minimal VE code generation for empty function bodies (no args, no value return). Contents * empty function code generation test. * Minimal function prologue & epilogue emission * Instruction formats and instruction definitions as far as required for the empty function prologue & epilogue. * I64 register class definitions. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D72598
70 lines
2.2 KiB
C++
70 lines
2.2 KiB
C++
//===-- VEMCInstLower.cpp - Convert VE MachineInstr to MCInst -------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains code to lower VE MachineInstrs to their corresponding
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// MCInst records.
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//
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//===----------------------------------------------------------------------===//
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#include "VE.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/IR/Mangler.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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using namespace llvm;
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static MCOperand LowerSymbolOperand(const MachineInstr *MI,
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const MachineOperand &MO,
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const MCSymbol *Symbol, AsmPrinter &AP) {
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const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::create(Symbol, AP.OutContext);
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return MCOperand::createExpr(MCSym);
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}
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static MCOperand LowerOperand(const MachineInstr *MI, const MachineOperand &MO,
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AsmPrinter &AP) {
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switch (MO.getType()) {
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default:
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report_fatal_error("unsupported operand type");
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case MachineOperand::MO_Register:
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if (MO.isImplicit())
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break;
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return MCOperand::createReg(MO.getReg());
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case MachineOperand::MO_Immediate:
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return MCOperand::createImm(MO.getImm());
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case MachineOperand::MO_MachineBasicBlock:
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return LowerSymbolOperand(MI, MO, MO.getMBB()->getSymbol(), AP);
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case MachineOperand::MO_RegisterMask:
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break;
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}
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return MCOperand();
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}
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void llvm::LowerVEMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
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AsmPrinter &AP) {
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OutMI.setOpcode(MI->getOpcode());
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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MCOperand MCOp = LowerOperand(MI, MO, AP);
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if (MCOp.isValid())
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OutMI.addOperand(MCOp);
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}
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}
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