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MSVC 2013 would refuse to pass highly aligned things (typically vectors
and aggregates) by value. Users would receive this error:
t.cpp(11) : error C2719: 'w': formal parameter with __declspec(align('32')) won't be aligned
t.cpp(11) : error C2719: 'q': formal parameter with __declspec(align('32')) won't be aligned
However, in MSVC 2015, this behavior was changed, and highly aligned
things are now passed indirectly. To avoid breaking backwards
incompatibility, objects that do not have a *required* high alignment
(i.e. double) are still passed directly, even though they are not
naturally aligned. This change implements the new behavior of passing
things indirectly.
The new behavior is:
- up to three vector parameters can be passed in [XYZ]MM0-2
- remaining arguments with required alignment greater than 4 bytes are
passed indirectly
Previously, MSVC never passed things truly indirectly, meaning clang
would always apply the byval attribute to indirect arguments. We had to
go to the trouble of adding inalloca so that non-trivially copyable C++
types could be passed in place without copying the object
representation. When inalloca was added, we asserted that all arguments
passed indirectly must use byval. With this change, that assert no
longer holds, and I had to update inalloca to handle that case. The
implicit sret pointer parameter was already handled this way, and this
change generalizes some of that logic to arguments.
There are two cases that this change leaves unfixed:
1. objects that are non-trivially copyable *and* overaligned
2. vectorcall + inalloca + vectors
For case 1, I need to touch C++ ABI code in MicrosoftCXXABI.cpp, so I
want to do it in a follow-up.
For case 2, my fix is one line, but it will require updating IR tests to
use lots of inreg, so I wanted to separate it out.
Related to D71915 and D72110
Fixes most of PR44395
Reviewed By: rjmccall, craig.topper, erichkeane
Differential Revision: https://reviews.llvm.org/D72114
80 lines
3.6 KiB
C++
80 lines
3.6 KiB
C++
// RUN: %clang_cc1 -w -triple i686-pc-win32 -emit-llvm -o - %s | FileCheck %s
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// PR44395
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// MSVC passes up to three vectors in registers, and the rest indirectly. Check
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// that both are compatible with an inalloca prototype.
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struct NonTrivial {
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NonTrivial();
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NonTrivial(const NonTrivial &o);
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unsigned handle;
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};
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typedef float __m128 __attribute__((__vector_size__(16), __aligned__(16)));
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__m128 gv128;
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// nt, w, and q will be in the inalloca pack.
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void receive_vec_128(NonTrivial nt, __m128 x, __m128 y, __m128 z, __m128 w, __m128 q) {
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gv128 = x + y + z + w + q;
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}
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// CHECK-LABEL: define dso_local void @"?receive_vec_128@@YAXUNonTrivial@@T__m128@@1111@Z"
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// CHECK-SAME: (<4 x float> inreg %x,
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// CHECK-SAME: <4 x float> inreg %y,
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// CHECK-SAME: <4 x float> inreg %z,
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// CHECK-SAME: <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>* inalloca %0)
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void pass_vec_128() {
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__m128 z = {0};
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receive_vec_128(NonTrivial(), z, z, z, z, z);
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}
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// CHECK-LABEL: define dso_local void @"?pass_vec_128@@YAXXZ"()
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// CHECK: getelementptr inbounds <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>, <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>* %{{[^,]*}}, i32 0, i32 0
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// CHECK: call x86_thiscallcc %struct.NonTrivial* @"??0NonTrivial@@QAE@XZ"(%struct.NonTrivial* %{{.*}})
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// Store q, store temp alloca.
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// CHECK: store <4 x float> %{{[^,]*}}, <4 x float>* %{{[^,]*}}, align 16
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// CHECK: getelementptr inbounds <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>, <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>* %{{[^,]*}}, i32 0, i32 1
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// CHECK: store <4 x float>* %{{[^,]*}}, <4 x float>** %{{[^,]*}}, align 4
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// Store w, store temp alloca.
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// CHECK: store <4 x float> %{{[^,]*}}, <4 x float>* %{{[^,]*}}, align 16
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// CHECK: getelementptr inbounds <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>, <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>* %{{[^,]*}}, i32 0, i32 2
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// CHECK: store <4 x float>* %{{[^,]*}}, <4 x float>** %{{[^,]*}}, align 4
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// CHECK: call void @"?receive_vec_128@@YAXUNonTrivial@@T__m128@@1111@Z"
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// CHECK-SAME: (<4 x float> inreg %{{[^,]*}},
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// CHECK-SAME: <4 x float> inreg %{{[^,]*}},
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// CHECK-SAME: <4 x float> inreg %{{[^,]*}},
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// CHECK-SAME: <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>* inalloca %{{[^,]*}})
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// w will be passed indirectly by register, and q will be passed indirectly, but
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// the pointer will be in memory.
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void __fastcall fastcall_receive_vec(__m128 x, __m128 y, __m128 z, __m128 w, int edx, __m128 q, NonTrivial nt) {
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gv128 = x + y + z + w + q;
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}
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// CHECK-LABEL: define dso_local x86_fastcallcc void @"?fastcall_receive_vec@@Y{{[^"]*}}"
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// CHECK-SAME: (<4 x float> inreg %x,
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// CHECK-SAME: <4 x float> inreg %y,
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// CHECK-SAME: <4 x float> inreg %z,
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// CHECK-SAME: <4 x float>* inreg %0,
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// CHECK-SAME: i32 inreg %edx,
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// CHECK-SAME: <{ <4 x float>*, %struct.NonTrivial }>* inalloca %1)
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void __vectorcall vectorcall_receive_vec(double xmm0, double xmm1, double xmm2,
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__m128 x, __m128 y, __m128 z,
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__m128 w, int edx, __m128 q, NonTrivial nt) {
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gv128 = x + y + z + w + q;
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}
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// FIXME: Enable these checks, clang generates wrong IR.
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// CHECK-LABEL: define dso_local x86_vectorcallcc void @"?vectorcall_receive_vec@@Y{{[^"]*}}"
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// CHECKX-SAME: (double inreg %xmm0,
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// CHECKX-SAME: double inreg %xmm1,
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// CHECKX-SAME: double inreg %xmm2,
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// CHECKX-SAME: <4 x float> inreg %x,
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// CHECKX-SAME: <4 x float> inreg %y,
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// CHECKX-SAME: <4 x float> inreg %z,
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// CHECKX-SAME: <4 x float>* inreg %0,
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// CHECKX-SAME: i32 inreg %edx,
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// CHECKX-SAME: <{ <4 x float>*, %struct.NonTrivial }>* inalloca %1)
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