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https://github.com/Gericom/teak-llvm.git
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e819f7c9fe
Summary: This should be mostly NFC - we still lower the same alignment knowledge to the IR. The main reasoning here is that this somewhat improves readability of IR like this, and will improve test coverage in upcoming patch. Even though the alignment is guaranteed to always be an I-C-E, we don't always materialize it as llvm's Alignment Attribute because: 1. There may be a non-zero offset 2. We may be sanitizing for alignment Note that if there already was an IR alignment attribute on return value, we union them, and thus the alignment only ever rises. Also, there is a second relevant clang attribute `AllocAlignAttr`, so that is why `AbstractAssumeAlignedAttrEmitter` is templated. Reviewers: erichkeane, jdoerfert, hfinkel, aaron.ballman, rsmith Reviewed By: erichkeane Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D73005
78 lines
2.4 KiB
C
78 lines
2.4 KiB
C
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s | FileCheck %s
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// CHECK-LABEL: @test1
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int test1(int *a) {
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// CHECK: [[PTRINT1:%.+]] = ptrtoint
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// CHECK: [[MASKEDPTR1:%.+]] = and i64 [[PTRINT1]], 31
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// CHECK: [[MASKCOND1:%.+]] = icmp eq i64 [[MASKEDPTR1]], 0
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// CHECK: call void @llvm.assume(i1 [[MASKCOND1]])
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a = __builtin_assume_aligned(a, 32, 0ull);
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return a[0];
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}
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// CHECK-LABEL: @test2
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int test2(int *a) {
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// CHECK: [[PTRINT2:%.+]] = ptrtoint
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// CHECK: [[MASKEDPTR2:%.+]] = and i64 [[PTRINT2]], 31
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// CHECK: [[MASKCOND2:%.+]] = icmp eq i64 [[MASKEDPTR2]], 0
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// CHECK: call void @llvm.assume(i1 [[MASKCOND2]])
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a = __builtin_assume_aligned(a, 32, 0);
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return a[0];
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}
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// CHECK-LABEL: @test3
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int test3(int *a) {
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// CHECK: [[PTRINT3:%.+]] = ptrtoint
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// CHECK: [[MASKEDPTR3:%.+]] = and i64 [[PTRINT3]], 31
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// CHECK: [[MASKCOND3:%.+]] = icmp eq i64 [[MASKEDPTR3]], 0
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// CHECK: call void @llvm.assume(i1 [[MASKCOND3]])
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a = __builtin_assume_aligned(a, 32);
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return a[0];
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}
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// CHECK-LABEL: @test4
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int test4(int *a, int b) {
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// CHECK-DAG: [[PTRINT4:%.+]] = ptrtoint
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// CHECK-DAG: [[CONV4:%.+]] = sext i32
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// CHECK: [[OFFSETPTR4:%.+]] = sub i64 [[PTRINT4]], [[CONV4]]
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// CHECK: [[MASKEDPTR4:%.+]] = and i64 [[OFFSETPTR4]], 31
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// CHECK: [[MASKCOND4:%.+]] = icmp eq i64 [[MASKEDPTR4]], 0
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// CHECK: call void @llvm.assume(i1 [[MASKCOND4]])
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a = __builtin_assume_aligned(a, 32, b);
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return a[0];
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}
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int *m1() __attribute__((assume_aligned(64)));
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// CHECK-LABEL: @test5(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[CALL:%.*]] = call align 64 i32* (...) @m1()
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
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// CHECK-NEXT: ret i32 [[TMP0]]
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//
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int test5() {
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return *m1();
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}
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int *m2() __attribute__((assume_aligned(64, 12)));
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// CHECK-LABEL: @test6
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int test6() {
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return *m2();
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// CHECK: [[PTRINT6:%.+]] = ptrtoint
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// CHECK: [[OFFSETPTR6:%.+]] = sub i64 [[PTRINT6]], 12
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// CHECK: [[MASKEDPTR6:%.+]] = and i64 [[OFFSETPTR6]], 63
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// CHECK: [[MASKCOND6:%.+]] = icmp eq i64 [[MASKEDPTR6]], 0
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// CHECK: call void @llvm.assume(i1 [[MASKCOND6]])
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}
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// CHECK-LABEL: @pr43638
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int pr43638(int *a) {
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a = __builtin_assume_aligned(a, 4294967296);
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return a[0];
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// CHECK: [[PTRINT7:%.+]] = ptrtoint
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// CHECK: [[MASKEDPTR7:%.+]] = and i64 [[PTRINT7]], 536870911
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// CHECK: [[MASKCOND7:%.+]] = icmp eq i64 [[MASKEDPTR7]], 0
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// CHECK: call void @llvm.assume(i1 [[MASKCOND7]])
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}
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