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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
251 lines
9.6 KiB
C++
251 lines
9.6 KiB
C++
//===--- Sparc.cpp - Implement Sparc target feature support ---------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements Sparc TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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#include "Sparc.h"
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#include "Targets.h"
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#include "clang/Basic/MacroBuilder.h"
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#include "llvm/ADT/StringSwitch.h"
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using namespace clang;
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using namespace clang::targets;
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const char *const SparcTargetInfo::GCCRegNames[] = {
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// Integer registers
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
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"r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", "r21",
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"r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
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// Floating-point registers
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", "f10",
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"f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19", "f20", "f21",
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"f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", "f32",
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"f34", "f36", "f38", "f40", "f42", "f44", "f46", "f48", "f50", "f52", "f54",
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"f56", "f58", "f60", "f62",
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};
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ArrayRef<const char *> SparcTargetInfo::getGCCRegNames() const {
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return llvm::makeArrayRef(GCCRegNames);
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}
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const TargetInfo::GCCRegAlias SparcTargetInfo::GCCRegAliases[] = {
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{{"g0"}, "r0"}, {{"g1"}, "r1"}, {{"g2"}, "r2"}, {{"g3"}, "r3"},
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{{"g4"}, "r4"}, {{"g5"}, "r5"}, {{"g6"}, "r6"}, {{"g7"}, "r7"},
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{{"o0"}, "r8"}, {{"o1"}, "r9"}, {{"o2"}, "r10"}, {{"o3"}, "r11"},
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{{"o4"}, "r12"}, {{"o5"}, "r13"}, {{"o6", "sp"}, "r14"}, {{"o7"}, "r15"},
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{{"l0"}, "r16"}, {{"l1"}, "r17"}, {{"l2"}, "r18"}, {{"l3"}, "r19"},
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{{"l4"}, "r20"}, {{"l5"}, "r21"}, {{"l6"}, "r22"}, {{"l7"}, "r23"},
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{{"i0"}, "r24"}, {{"i1"}, "r25"}, {{"i2"}, "r26"}, {{"i3"}, "r27"},
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{{"i4"}, "r28"}, {{"i5"}, "r29"}, {{"i6", "fp"}, "r30"}, {{"i7"}, "r31"},
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};
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ArrayRef<TargetInfo::GCCRegAlias> SparcTargetInfo::getGCCRegAliases() const {
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return llvm::makeArrayRef(GCCRegAliases);
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}
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bool SparcTargetInfo::hasFeature(StringRef Feature) const {
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return llvm::StringSwitch<bool>(Feature)
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.Case("softfloat", SoftFloat)
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.Case("sparc", true)
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.Default(false);
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}
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struct SparcCPUInfo {
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llvm::StringLiteral Name;
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SparcTargetInfo::CPUKind Kind;
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SparcTargetInfo::CPUGeneration Generation;
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};
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static constexpr SparcCPUInfo CPUInfo[] = {
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{{"v8"}, SparcTargetInfo::CK_V8, SparcTargetInfo::CG_V8},
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{{"supersparc"}, SparcTargetInfo::CK_SUPERSPARC, SparcTargetInfo::CG_V8},
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{{"sparclite"}, SparcTargetInfo::CK_SPARCLITE, SparcTargetInfo::CG_V8},
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{{"f934"}, SparcTargetInfo::CK_F934, SparcTargetInfo::CG_V8},
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{{"hypersparc"}, SparcTargetInfo::CK_HYPERSPARC, SparcTargetInfo::CG_V8},
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{{"sparclite86x"},
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SparcTargetInfo::CK_SPARCLITE86X,
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SparcTargetInfo::CG_V8},
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{{"sparclet"}, SparcTargetInfo::CK_SPARCLET, SparcTargetInfo::CG_V8},
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{{"tsc701"}, SparcTargetInfo::CK_TSC701, SparcTargetInfo::CG_V8},
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{{"v9"}, SparcTargetInfo::CK_V9, SparcTargetInfo::CG_V9},
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{{"ultrasparc"}, SparcTargetInfo::CK_ULTRASPARC, SparcTargetInfo::CG_V9},
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{{"ultrasparc3"}, SparcTargetInfo::CK_ULTRASPARC3, SparcTargetInfo::CG_V9},
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{{"niagara"}, SparcTargetInfo::CK_NIAGARA, SparcTargetInfo::CG_V9},
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{{"niagara2"}, SparcTargetInfo::CK_NIAGARA2, SparcTargetInfo::CG_V9},
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{{"niagara3"}, SparcTargetInfo::CK_NIAGARA3, SparcTargetInfo::CG_V9},
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{{"niagara4"}, SparcTargetInfo::CK_NIAGARA4, SparcTargetInfo::CG_V9},
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{{"ma2100"}, SparcTargetInfo::CK_MYRIAD2100, SparcTargetInfo::CG_V8},
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{{"ma2150"}, SparcTargetInfo::CK_MYRIAD2150, SparcTargetInfo::CG_V8},
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{{"ma2155"}, SparcTargetInfo::CK_MYRIAD2155, SparcTargetInfo::CG_V8},
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{{"ma2450"}, SparcTargetInfo::CK_MYRIAD2450, SparcTargetInfo::CG_V8},
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{{"ma2455"}, SparcTargetInfo::CK_MYRIAD2455, SparcTargetInfo::CG_V8},
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{{"ma2x5x"}, SparcTargetInfo::CK_MYRIAD2x5x, SparcTargetInfo::CG_V8},
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{{"ma2080"}, SparcTargetInfo::CK_MYRIAD2080, SparcTargetInfo::CG_V8},
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{{"ma2085"}, SparcTargetInfo::CK_MYRIAD2085, SparcTargetInfo::CG_V8},
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{{"ma2480"}, SparcTargetInfo::CK_MYRIAD2480, SparcTargetInfo::CG_V8},
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{{"ma2485"}, SparcTargetInfo::CK_MYRIAD2485, SparcTargetInfo::CG_V8},
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{{"ma2x8x"}, SparcTargetInfo::CK_MYRIAD2x8x, SparcTargetInfo::CG_V8},
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// FIXME: the myriad2[.n] spellings are obsolete,
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// but a grace period is needed to allow updating dependent builds.
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{{"myriad2"}, SparcTargetInfo::CK_MYRIAD2x5x, SparcTargetInfo::CG_V8},
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{{"myriad2.1"}, SparcTargetInfo::CK_MYRIAD2100, SparcTargetInfo::CG_V8},
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{{"myriad2.2"}, SparcTargetInfo::CK_MYRIAD2x5x, SparcTargetInfo::CG_V8},
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{{"myriad2.3"}, SparcTargetInfo::CK_MYRIAD2x8x, SparcTargetInfo::CG_V8},
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{{"leon2"}, SparcTargetInfo::CK_LEON2, SparcTargetInfo::CG_V8},
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{{"at697e"}, SparcTargetInfo::CK_LEON2_AT697E, SparcTargetInfo::CG_V8},
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{{"at697f"}, SparcTargetInfo::CK_LEON2_AT697F, SparcTargetInfo::CG_V8},
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{{"leon3"}, SparcTargetInfo::CK_LEON3, SparcTargetInfo::CG_V8},
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{{"ut699"}, SparcTargetInfo::CK_LEON3_UT699, SparcTargetInfo::CG_V8},
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{{"gr712rc"}, SparcTargetInfo::CK_LEON3_GR712RC, SparcTargetInfo::CG_V8},
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{{"leon4"}, SparcTargetInfo::CK_LEON4, SparcTargetInfo::CG_V8},
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{{"gr740"}, SparcTargetInfo::CK_LEON4_GR740, SparcTargetInfo::CG_V8},
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};
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SparcTargetInfo::CPUGeneration
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SparcTargetInfo::getCPUGeneration(CPUKind Kind) const {
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if (Kind == CK_GENERIC)
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return CG_V8;
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const SparcCPUInfo *Item = llvm::find_if(
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CPUInfo, [Kind](const SparcCPUInfo &Info) { return Info.Kind == Kind; });
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if (Item == std::end(CPUInfo))
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llvm_unreachable("Unexpected CPU kind");
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return Item->Generation;
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}
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SparcTargetInfo::CPUKind SparcTargetInfo::getCPUKind(StringRef Name) const {
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const SparcCPUInfo *Item = llvm::find_if(
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CPUInfo, [Name](const SparcCPUInfo &Info) { return Info.Name == Name; });
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if (Item == std::end(CPUInfo))
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return CK_GENERIC;
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return Item->Kind;
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}
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void SparcTargetInfo::fillValidCPUList(
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SmallVectorImpl<StringRef> &Values) const {
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for (const SparcCPUInfo &Info : CPUInfo)
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Values.push_back(Info.Name);
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}
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void SparcTargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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DefineStd(Builder, "sparc", Opts);
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Builder.defineMacro("__REGISTER_PREFIX__", "");
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if (SoftFloat)
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Builder.defineMacro("SOFT_FLOAT", "1");
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}
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void SparcV8TargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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SparcTargetInfo::getTargetDefines(Opts, Builder);
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switch (getCPUGeneration(CPU)) {
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case CG_V8:
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Builder.defineMacro("__sparcv8");
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if (getTriple().getOS() != llvm::Triple::Solaris)
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Builder.defineMacro("__sparcv8__");
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break;
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case CG_V9:
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Builder.defineMacro("__sparcv9");
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if (getTriple().getOS() != llvm::Triple::Solaris) {
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Builder.defineMacro("__sparcv9__");
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Builder.defineMacro("__sparc_v9__");
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}
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break;
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}
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if (getTriple().getVendor() == llvm::Triple::Myriad) {
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std::string MyriadArchValue, Myriad2Value;
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Builder.defineMacro("__sparc_v8__");
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Builder.defineMacro("__leon__");
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switch (CPU) {
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case CK_MYRIAD2100:
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MyriadArchValue = "__ma2100";
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Myriad2Value = "1";
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break;
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case CK_MYRIAD2150:
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MyriadArchValue = "__ma2150";
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Myriad2Value = "2";
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break;
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case CK_MYRIAD2155:
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MyriadArchValue = "__ma2155";
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Myriad2Value = "2";
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break;
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case CK_MYRIAD2450:
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MyriadArchValue = "__ma2450";
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Myriad2Value = "2";
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break;
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case CK_MYRIAD2455:
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MyriadArchValue = "__ma2455";
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Myriad2Value = "2";
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break;
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case CK_MYRIAD2x5x:
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Myriad2Value = "2";
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break;
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case CK_MYRIAD2080:
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MyriadArchValue = "__ma2080";
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Myriad2Value = "3";
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break;
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case CK_MYRIAD2085:
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MyriadArchValue = "__ma2085";
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Myriad2Value = "3";
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break;
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case CK_MYRIAD2480:
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MyriadArchValue = "__ma2480";
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Myriad2Value = "3";
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break;
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case CK_MYRIAD2485:
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MyriadArchValue = "__ma2485";
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Myriad2Value = "3";
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break;
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case CK_MYRIAD2x8x:
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Myriad2Value = "3";
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break;
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default:
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MyriadArchValue = "__ma2100";
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Myriad2Value = "1";
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break;
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}
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if (!MyriadArchValue.empty()) {
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Builder.defineMacro(MyriadArchValue, "1");
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Builder.defineMacro(MyriadArchValue + "__", "1");
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}
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if (Myriad2Value == "2") {
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Builder.defineMacro("__ma2x5x", "1");
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Builder.defineMacro("__ma2x5x__", "1");
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} else if (Myriad2Value == "3") {
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Builder.defineMacro("__ma2x8x", "1");
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Builder.defineMacro("__ma2x8x__", "1");
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}
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Builder.defineMacro("__myriad2__", Myriad2Value);
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Builder.defineMacro("__myriad2", Myriad2Value);
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}
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}
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void SparcV9TargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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SparcTargetInfo::getTargetDefines(Opts, Builder);
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Builder.defineMacro("__sparcv9");
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Builder.defineMacro("__arch64__");
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// Solaris doesn't need these variants, but the BSDs do.
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if (getTriple().getOS() != llvm::Triple::Solaris) {
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Builder.defineMacro("__sparc64__");
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Builder.defineMacro("__sparc_v9__");
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Builder.defineMacro("__sparcv9__");
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}
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}
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void SparcV9TargetInfo::fillValidCPUList(
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SmallVectorImpl<StringRef> &Values) const {
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for (const SparcCPUInfo &Info : CPUInfo)
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if (Info.Generation == CG_V9)
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Values.push_back(Info.Name);
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}
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