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10329 Commits

Author SHA1 Message Date
Devang Patel
d71bc1ae4e While spilling live registers at the end of block check whether they are used by DBG_VALUE machine instructions or not. If a spilled register is used by DBG_VALUE machine instruction then insert a new DBG_VALUE machine instruction to encode variable's new location on stack. 
llvm-svn: 110235
 2010-08-04 18:42:02 +00:00
Devang Patel
0e60e67efb If a variable is spilled by code generator then use DW_OP_fbreg to describe its location on stack. 
llvm-svn: 110234
 2010-08-04 18:40:52 +00:00
Dan Gohman
5cae103392 Eliminate unnecessary empty string literals. 
llvm-svn: 110183
 2010-08-04 01:39:08 +00:00
Jakob Stoklund Olesen
0c18757c9d Oops. Don't normalize spill weights twice. 
When the normalizeSpillWeights function was introduced, I forgot to remove this
normalization.

This change could affect register allocation. Hopefully for the better.

llvm-svn: 110119
 2010-08-03 17:21:16 +00:00
Bill Wendling
44dc60ba13 Early exit and reduce indentation. No functionality change. 
llvm-svn: 110069
 2010-08-02 22:06:08 +00:00
Devang Patel
d070128de5 Free DbgScope created for dead functions. 
llvm-svn: 110045
 2010-08-02 17:32:15 +00:00
Oscar Fuentes
40b31ad3ee Prefix next' iterator operation with llvm::'. 
Fixes potential ambiguity problems on VS 2010.

Patch by nobled!

llvm-svn: 110029
 2010-08-02 06:00:15 +00:00
Eli Friedman
460ad41d6d PR7586: Make sure we don't claim that unknown bits are actually known in the 
ISD::AND case of TargetLowering::SimplifyDemandedBits.

llvm-svn: 110019
 2010-08-02 04:42:25 +00:00
Bill Wendling
d9900542a6 Reference the personalities. Don't copy them into a new vector. 
llvm-svn: 109966
 2010-08-01 01:34:21 +00:00
Eli Friedman
ffe64c06ef Fix for bug reported by Evzen Muller on llvm-commits: make sure to correctly 
check the range of the constant when optimizing a comparison between a
constant and a sign_extend_inreg node.

llvm-svn: 109854
 2010-07-30 06:44:31 +00:00
Benjamin Kramer
a3e0ddb564 Plug the remaining MC leaks by giving MCObjectStreamer/MCAsmStreamer ownership of the TargetAsmBackend and the MCCodeEmitter. 
llvm-svn: 109767
 2010-07-29 17:48:06 +00:00
Dale Johannesen
329d4741a5 Comment typo. 
llvm-svn: 109765
 2010-07-29 17:45:24 +00:00
Jakob Stoklund Olesen
36cf119049 Fix a bug in the -regalloc=fast handling of exotic two-address instruction with 
multiple defs, like t2LDRSB_POST.

The first def could accidentally steal the physreg that the second, tied def was
required to be allocated to.

Now, the tied use-def is treated more like an early clobber, and the physreg is
reserved before allocating the other defs.

This would never be a problem when the tied def was the only def which is the
usual case.

This fixes MallocBench/gs for thumb2 -O0.

llvm-svn: 109715
 2010-07-29 00:52:19 +00:00
Jakob Stoklund Olesen
0ff2c110ad Print out the regclass of any virtual registers used by a machine instruction. 
llvm-svn: 109608
 2010-07-28 18:35:46 +00:00
Devang Patel
84a74779a1 It is FE's responsibility to emit proper directory name. 
llvm-svn: 109538
 2010-07-27 20:51:15 +00:00
Jim Grosbach
7383cf06ba Grammar 
llvm-svn: 109525
 2010-07-27 18:36:27 +00:00
Nate Begeman
317b969ac5 Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself 
recursively and returning a SCALAR_TO_VECTOR node, but assuming the input was always a BUILD_VECTOR.

llvm-svn: 109519
 2010-07-27 18:02:18 +00:00
Jim Grosbach
2ff0e64bc3 80 column 
llvm-svn: 109513
 2010-07-27 17:38:47 +00:00
Jim Grosbach
7639967e6c fix typo 
llvm-svn: 109511
 2010-07-27 17:14:29 +00:00
Bill Wendling
0ff1ef650b It's better to have the arrays, which would trigger the creation of stack 
protectors, to be near the stack protectors on the stack. Accomplish this by
tagging the stack object with a predicate that indicates that it would trigger
this. In the prolog-epilog inserter, assign these objects to the stack after the
stack protector but before the other objects.

llvm-svn: 109481
 2010-07-27 01:55:19 +00:00
Jakob Stoklund Olesen
c698417e52 Add SplitEditor to SplitKit. This class will be used to edit live intervals and 
rewrite instructions for live range splitting.

Still work in progress.

llvm-svn: 109469
 2010-07-26 23:44:11 +00:00
Dan Gohman
c2af77f510 Fix a use-after-free. 
llvm-svn: 109468
 2010-07-26 23:40:24 +00:00
Bill Wendling
fa60b0ee51 Using llvm.eh.catch.all.value instead of .llvm.eh.catch.all.value. 
llvm-svn: 109462
 2010-07-26 22:36:52 +00:00
Evan Cheng
e6d6c5dd11 The "excess register pressure" returned by HighRegPressure() is not accurate enough to factor into scheduling priority. Eliminate it and add early exits to speed up scheduling. 
llvm-svn: 109449
 2010-07-26 21:49:07 +00:00
Dan Gohman
2810bacafb Handle Values with no value in getCopyFromRegs. 
llvm-svn: 109415
 2010-07-26 18:15:41 +00:00
Dan Gohman
f9da3c3b88 A block dominates itself, by definition. 
llvm-svn: 109402
 2010-07-26 17:38:15 +00:00
Duncan Sands
136a6f0dbb Pacify gcc-4.5 which wrongly thinks that RExcess (passed as the Excess parameter) 
may be used uninitialized in the callers of HighRegPressure.

llvm-svn: 109393
 2010-07-26 07:54:17 +00:00
Lang Hames
2e3f20b9aa Factored out a bit of common code to mark VNInfos for deletion. 
llvm-svn: 109388
 2010-07-26 01:49:41 +00:00
Evan Cheng
8ae3ecad2b Add comments. 
llvm-svn: 109383
 2010-07-25 18:59:43 +00:00
Bob Wilson
280ce9984e Fix crashes when scheduling a CopyToReg node -- getMachineOpcode asserts on 
those.  Radar 8231572.

llvm-svn: 109367
 2010-07-25 05:34:27 +00:00
Anton Korobeynikov
3c8eb80d93 Add hook to insert late LLVM=>LLVM passes just before isel 
llvm-svn: 109354
 2010-07-24 20:48:54 +00:00
Bob Wilson
56c006561c Change ScheduleDAGInstrs::Defs and ::Uses to be variable-size vectors 
instead of fixed size arrays, so that increasing FirstVirtualRegister to 16K
won't cause a compile time performance regression.

llvm-svn: 109330
 2010-07-24 06:01:53 +00:00
Devang Patel
498877d055 Use current working directory when Dirname is empty. This only happens when absolute source file path is used on compiler command line. 
llvm-svn: 109302
 2010-07-24 00:53:22 +00:00
Evan Cheng
37b740c4bf Add an ILP scheduler. This is a register pressure aware scheduler that's 
appropriate for targets without detailed instruction iterineries.
The scheduler schedules for increased instruction level parallelism in
low register pressure situation; it schedules to reduce register pressure
when the register pressure becomes high.

On x86_64, this is a win for all tests in CFP2000. It also sped up 256.bzip2
by 16%.

llvm-svn: 109300
 2010-07-24 00:39:05 +00:00
Jim Grosbach
ba4b1909ce Remove too-strict assertion. We may want the vreg copy of the physical register 
to be of a different register class. For example, in Thumb1 if the live-in is
a high register, we want the vreg to be a low register. rdar://8224931

llvm-svn: 109291
 2010-07-23 23:48:02 +00:00
Devang Patel
28499f76c9 Revert r109262. 
llvm-svn: 109285
 2010-07-23 23:04:41 +00:00
Evan Cheng
df907f4594 - Allow target to specify when is register pressure "too high". In most cases, 
it's too late to start backing off aggressive latency scheduling when most
  of the registers are in use so the threshold should be a bit tighter.
- Correctly handle live out's and extract_subreg etc.
- Enable register pressure aware scheduling by default for hybrid scheduler.
  For ARM, this is almost always a win on # of instructions. It's runtime
  neutral for most of the tests. But for some kernels with high register
  pressure it can be a huge win. e.g. 464.h264ref reduced number of spills by
  54 and sped up by 20%.

llvm-svn: 109279
 2010-07-23 22:39:59 +00:00
Dan Gohman
55e244698a Use the proper type for shift counts. This fixes a bootstrap error. 
llvm-svn: 109265
 2010-07-23 21:08:12 +00:00
Devang Patel
3032354bbe IF directory name is empty then try to extract one using absolute file name. 
llvm-svn: 109262
 2010-07-23 20:36:13 +00:00
Dan Gohman
0818684a70 DAGCombine (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits 
are not demanded. This often allows the anyext to be folded away.

llvm-svn: 109242
 2010-07-23 18:03:30 +00:00
Dan Gohman
2e00e3b12d Make SDNode::dump() print a newline at the end. 
llvm-svn: 109234
 2010-07-23 16:37:47 +00:00
Eric Christopher
faf5c76114 80-col. 
llvm-svn: 109205
 2010-07-23 01:05:59 +00:00
Chris Lattner
8f3adc9057 remove the JIT "NeedsExactSize" feature and supporting logic. 
llvm-svn: 109167
 2010-07-22 21:17:55 +00:00
Gabor Greif
59f9970ba5 keep in 80 cols 
llvm-svn: 109122
 2010-07-22 17:18:03 +00:00
Gabor Greif
dde79d8f1a mass elimination of reliance on automatic iterator dereferencing 
llvm-svn: 109103
 2010-07-22 13:36:47 +00:00
Gabor Greif
3e44ea1917 undo 80 column trespassing I caused 
llvm-svn: 109092
 2010-07-22 10:37:47 +00:00
Evan Cheng
bf32e54bac Re-apply r109079 with fix. 
llvm-svn: 109083
 2010-07-22 06:24:48 +00:00
Owen Anderson
6c55cccf87 Revert r109079, which broke a lot of CodeGen tests. 
llvm-svn: 109082
 2010-07-22 06:01:28 +00:00
Reid Kleckner
d85e3c5a86 Initial modifications to MCAssembler and TargetMachine for the MCJIT. 
Patch by Olivier Meurant!

llvm-svn: 109080
 2010-07-22 05:58:53 +00:00
Evan Cheng
bd81bff672 Initialize RegLimit only when register pressure is being tracked. 
llvm-svn: 109079
 2010-07-22 05:18:41 +00:00