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442 Commits

Author SHA1 Message Date
Owen Anderson
c75ae13566 The fast-path still needs to set kill markers and spill/restore points as appropriate. 
With this patch, all of MultiSource/Applications and all of SPEC2000/2006 pass with
the SimpleSpiller and this fast-path enabled.

llvm-svn: 55000
 2008-08-19 20:09:52 +00:00
Owen Anderson
442dc6fed0 Add a flag to enable the fast spilling path. 
llvm-svn: 54958
 2008-08-19 00:17:30 +00:00
Owen Anderson
a57c57067d Fix a few more bugs: 
1) Assign stack slots to new temporaries.
  2) Don't insert an interval into the return vector more than once.

llvm-svn: 54956
 2008-08-18 23:41:04 +00:00
Owen Anderson
60f6b2cac0 Fix several bugs in the new fast-path: 
1) Remove an incorrect assertion.
  2) Set the stack slot weight properly.
  3) Resize the VirtRegMap when needed.

llvm-svn: 54949
 2008-08-18 21:20:32 +00:00
Owen Anderson
e996a12f27 Clients of addIntervalForSpills expect the added intervals to be returned sorted by starting index. 
llvm-svn: 54939
 2008-08-18 19:52:22 +00:00
Owen Anderson
75e27d2402 Simplify the fast-patch interval spilling by using MachineRegisterInfo::reg_iterator. 
llvm-svn: 54930
 2008-08-18 18:38:12 +00:00
Owen Anderson
cc9314ba32 Resurrect some ancient code to add spill ranges without attempting folding, remat, or splitting. This code has been updated to current APIs 
in so far as it compiles and, in theory, works, but does not take advantage of recent advancements.  For instance, it could be improved by using
MachineRegisterInfo::use_iterator.

llvm-svn: 54924
 2008-08-18 18:05:32 +00:00
Owen Anderson
706f6b7899 Expunge the last uses of std::map from LiveIntervals. 
llvm-svn: 54766
 2008-08-13 22:28:50 +00:00
Owen Anderson
767b5cc7fd Move r2iMap_ over to DenseMap from std::map. 
llvm-svn: 54765
 2008-08-13 22:08:30 +00:00
Owen Anderson
51f689a652 Make the allocation of LiveIntervals explicit, rather than holding them in the r2iMap_ by value. This will prevent references to them from being invalidated 
if the map is changed.

llvm-svn: 54763
 2008-08-13 21:49:13 +00:00
Owen Anderson
d184929176 Oops, didn't mean to commit this. 
llvm-svn: 54425
 2008-08-06 20:58:38 +00:00
Owen Anderson
03dddbbed5 Only remap each VNInfo once when doing renumbering. 
llvm-svn: 54420
 2008-08-06 18:35:45 +00:00
Owen Anderson
7b5f535590 Value numbers whose def index is a special sentinel value should not be remapped. 
llvm-svn: 54218
 2008-07-30 17:42:47 +00:00
Owen Anderson
e9a0bae238 More fixes for corner cases when remapping live range indices. 
llvm-svn: 54186
 2008-07-30 00:22:56 +00:00
Owen Anderson
2532e75933 Don't decrement the BB remap when we don't need to. 
llvm-svn: 54173
 2008-07-29 21:15:44 +00:00
Dan Gohman
804c95df52 Fold the useful features of alist and alist_node into ilist, and 
a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the associated problems, including being opaque in gdb.

Adjust the Recycler class so that it doesn't depend on alist_node.
Also, change it to use explicit Size and Align parameters, allowing
it to work when the largest-sized node doesn't have the greatest
alignment requirement.

Change MachineInstr's MachineMemOperand list from a pool-backed
alist to a std::list for now.

llvm-svn: 54146
 2008-07-28 21:51:04 +00:00
Dan Gohman
24b3ce1db6 Fix a typo in a comment. 
llvm-svn: 54136
 2008-07-28 18:43:51 +00:00
Owen Anderson
7a45b168ac Revert my previous patch. In retrospect, this is completely the wrong way to fix this problem. 
llvm-svn: 54072
 2008-07-25 23:06:59 +00:00
Owen Anderson
074f9db2fd Special cases are needed in renumbering when dealing with renumbering after a PHI has been removed. The interval previously defined 
by the PHI needs to be extended to the beginning of its basic block, and the intervals that were inputs need to be trimmed to the end 
of their basic blocks.

llvm-svn: 54070
 2008-07-25 22:32:01 +00:00
Owen Anderson
88499a3503 Properly remap live ranges whose end indices are the end of the function. 
llvm-svn: 54061
 2008-07-25 21:07:13 +00:00
Owen Anderson
c7d53fd331 Make the remapping of interval indices (particularly ending indices) more robust. 
This is tricky business, and will probably take a few more iterations to get
the last kinks out of it.

llvm-svn: 54043
 2008-07-25 19:50:48 +00:00
Dan Gohman
394ec3ab5a Disable the new aggressive remat logic introduced in 54000; it causes some 
regressions, such as PR2595. Also, there is a significant code-quality
issue in SPEC 464.h264ref and a few others.

llvm-svn: 54014
 2008-07-25 15:08:37 +00:00
Dan Gohman
09b0448dbc Enable rematerialization of constants using AliasAnalysis::pointsToConstantMemory, 
and knowledge of PseudoSourceValues. This unfortunately isn't sufficient to allow
constants to be rematerialized in PIC mode -- the extra indirection is a
complication.

llvm-svn: 54000
 2008-07-25 00:02:30 +00:00
Owen Anderson
50d393a68d Enable the insertion of empty indices into LiveInterals, thereby making renumbering possible. 
llvm-svn: 53961
 2008-07-23 21:37:49 +00:00
Owen Anderson
7c800ad977 Fix a compile-time regression introduced by my heuristic-changing patch. I forgot 
to multiply the instruction count by a constant factor in a few places, which
caused the register allocator to require many more iterations.

llvm-svn: 53959
 2008-07-23 19:47:27 +00:00
Owen Anderson
029182f3a3 Change the heuristics used in the coalescer, register allocator, and within 
live intervals itself to use an instruction count approximation that is 
not affected by inserting empty indices.

llvm-svn: 53937
 2008-07-22 22:46:49 +00:00
Evan Cheng
a7a20c4946 Fix a memory leak in LiveIntervalAnalysis. 
llvm-svn: 53779
 2008-07-19 00:37:25 +00:00
Dan Gohman
0ece943845 Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks. 
Fix a leak that this turned up in LowerSubregs.cpp.
And, comment a leak in LiveIntervalAnalysis.cpp.

llvm-svn: 53746
 2008-07-17 23:49:46 +00:00
Evan Cheng
2b3c52d5c4 Typos. 
llvm-svn: 53504
 2008-07-12 02:22:07 +00:00
Evan Cheng
e0a352e8e7 Fix PR2536: a nasty spiller bug. If a two-address instruction uses a register but the use portion of its live range is not part of its liveinterval, it must be defined by an implicit_def. In that case, do not spill the use. e.g. 
8   %reg1024<def> = IMPLICIT_DEF
12  %reg1024<def> = INSERT_SUBREG %reg1024<kill>, %reg1025, 2

The live range [12, 14) are not part of the r1024 live interval since it's defined by an implicit def. It will not conflicts with live interval of r1025. Now suppose both registers are spilled, you can easily see a situation where both registers are reloaded before the INSERT_SUBREG and both target registers that would overlap.

llvm-svn: 53503
 2008-07-12 01:56:02 +00:00
Evan Cheng
e9ba28dd68 - Change the horrible N^2 isRegReDefinedByTwoAddr. Now callers must supply the operand index of def machineoperand and at most one full scan of non-implicit operands is needed. 
- Change local register allocator to use the new isRegReDefinedByTwoAddr instead of reinventing the wheel.

llvm-svn: 53394
 2008-07-10 07:35:43 +00:00
Dan Gohman
3b46030375 Pool-allocation for MachineInstrs, MachineBasicBlocks, and 
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

llvm-svn: 53212
 2008-07-07 23:14:23 +00:00
Evan Cheng
7d98a48f15 - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc. 
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.

llvm-svn: 53097
 2008-07-03 09:09:37 +00:00
Owen Anderson
b55675e1db Remember which MachineOperand we were processing, so we don't have to scan the list to find it again later. 
This speeds up live intervals from 0.37s to 0.30s on instcombine.

llvm-svn: 52745
 2008-06-25 23:39:39 +00:00
Evan Cheng
f593a65497 Undo spill weight tweak. Need to investigate the performance regressions. 
llvm-svn: 52572
 2008-06-21 06:45:54 +00:00
Owen Anderson
3c4ccc830e Revert my last patch, which was causing regression test failures. 
llvm-svn: 52485
 2008-06-19 05:29:34 +00:00
Evan Cheng
55bc848640 Minor spiller tweak to unfavor reload into load/store instructions. 
llvm-svn: 52477
 2008-06-19 01:16:17 +00:00
Owen Anderson
80ef880b98 Insert empty slots into the instruction numbering in live intervals, so that we can more easily 
add new instructions.

llvm-svn: 52475
 2008-06-19 00:10:49 +00:00
Evan Cheng
f873ed1b10 Live-through live interval is [mbb start, mbb end+1]. 
llvm-svn: 52431
 2008-06-17 20:13:36 +00:00
Owen Anderson
476e91ab75 Remove special case handling of empty MBBs now that we assign indices to them. 
llvm-svn: 52345
 2008-06-16 19:32:40 +00:00
Owen Anderson
773b2d3ac3 Re-enable empty block indexing by default, since it doesn't seem to have any 
impact on code quality or compile time.

llvm-svn: 52329
 2008-06-16 16:58:24 +00:00
Owen Anderson
e546c55e59 Make indexing empty basic blocks an option for the moment. 
llvm-svn: 52306
 2008-06-16 07:10:49 +00:00
Owen Anderson
d813091cde Assign indices to empty basic blocks. This will be necessary for StrongPHIElimination in the near future. 
llvm-svn: 52300
 2008-06-16 06:18:41 +00:00
Evan Cheng
6d7a144453 Refine stack slot interval weight computation. 
llvm-svn: 52040
 2008-06-06 07:54:39 +00:00
Owen Anderson
35e2dfe1cf Add a helper for constructing new live ranges that ended from an instruction to the end of its MBB. 
llvm-svn: 52012
 2008-06-05 17:15:43 +00:00
Evan Cheng
12a0222a01 Add a stack slot coloring pass. Not yet enabled. 
llvm-svn: 51934
 2008-06-04 09:18:41 +00:00
Owen Anderson
0908deccc2 Correctly handle removed instructions at the beginning of MBBs when renumbering. 
llvm-svn: 51876
 2008-06-02 17:36:36 +00:00
Owen Anderson
82fc4cdafb Make the renumbering correct in the face of deleted instructions that have been removed from the LiveIntervals maps. 
llvm-svn: 51714
 2008-05-29 23:01:22 +00:00
Bill Wendling
bf5b228c32 Remove <iostream>. 
llvm-svn: 51704
 2008-05-29 21:29:39 +00:00
Owen Anderson
d95dcd12c9 Revert part of my last patch that I didn't intend to commit yet. 
llvm-svn: 51694
 2008-05-29 18:35:21 +00:00
Owen Anderson
0178e95791 Renumbering needs to account for instruction slot offsets when performing lookups in the index maps. 
llvm-svn: 51691
 2008-05-29 18:15:49 +00:00
Owen Anderson
779b4180dc Remap VNInfo data as well when doing renumbering. 
llvm-svn: 51658
 2008-05-28 22:40:08 +00:00
Owen Anderson
4f8e1ad32a Factor the numbering computation into a separate method, and add the slightest attempt at some renumbering logic, which is currently unused. 
llvm-svn: 51652
 2008-05-28 20:54:50 +00:00
Evan Cheng
7c0db62a5e Revert 51440 as it breaks a bunch of PIC tests. 
llvm-svn: 51513
 2008-05-23 23:00:04 +00:00
David Greene
830487035e When rewriting defs and uses after spilling, don't set the weight of a 
live interval to infinity if the instruction being rewritten is an
original remat def instruction.  We were only checking against the clone
of the remat def which doesn't actually appear in the IR at all.

llvm-svn: 51440
 2008-05-22 21:16:33 +00:00
Evan Cheng
c8b028daa4 Don't spill dead def. 
llvm-svn: 51305
 2008-05-20 08:10:37 +00:00
Dan Gohman
d78c400b5b Clean up the use of static and anonymous namespaces. This turned up 
several things that were neither in an anonymous namespace nor static
but not intended to be global.

llvm-svn: 51017
 2008-05-13 00:00:25 +00:00
Dan Gohman
6a2da37c0e Make several variable declarations static. 
llvm-svn: 50696
 2008-05-06 01:53:16 +00:00
Evan Cheng
8dc8a8d8af Empty basic block should have an empty range. 
llvm-svn: 49800
 2008-04-16 18:01:08 +00:00
Evan Cheng
499ffa9055 Use of implicit_def is not part of live interval. Create empty intervals for the uses when the live interval is being spilled. 
llvm-svn: 49542
 2008-04-11 17:53:36 +00:00
Evan Cheng
c8eeb752a3 - More aggressively coalescing away copies whose source is defined by an implicit_def. 
- Added insert_subreg coalescing support.

llvm-svn: 49448
 2008-04-09 20:57:25 +00:00
Evan Cheng
20aed56504 - Treat a live range defined by an implicit_def as a zero-sized one. 
- Eliminate an implicit_def when it's being spilled.

llvm-svn: 49166
 2008-04-03 16:39:43 +00:00
Evan Cheng
985a0b51d7 Re-materialization is for uses only. 
llvm-svn: 49053
 2008-04-01 21:37:32 +00:00
Evan Cheng
e4f77c69ac It's not safe to fold a load from GV stub or constantpool into a two-address use. 
llvm-svn: 49002
 2008-03-31 23:19:51 +00:00
Evan Cheng
73d7c3bfba The support for remat of instructions with a register operand is hackish, to say the least. Since the register operand guaranteed to be PIC base and that it is already live at all uses, we are making sure it will not be spilled after its uses are rematerialized for both performance and correctness reasons. 
llvm-svn: 48976
 2008-03-31 07:53:30 +00:00
Evan Cheng
ec7533b620 Remove isImplicitDef TargetInstrDesc flag. 
llvm-svn: 48381
 2008-03-15 00:19:36 +00:00
Evan Cheng
a3891365b5 Transfer physical register spill info when load / store folding happens. 
llvm-svn: 48246
 2008-03-11 21:34:46 +00:00
Evan Cheng
e88a625ecd When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. 
llvm-svn: 48218
 2008-03-11 07:19:34 +00:00
Evan Cheng
6325446666 Refactor code. Remove duplicated functions that basically do the same thing as 
findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.

llvm-svn: 47927
 2008-03-05 00:59:57 +00:00
Evan Cheng
6d56368caf Spiller now remove unused spill slots. 
llvm-svn: 47657
 2008-02-27 03:04:06 +00:00
Bill Wendling
d7a258d325 Rename PrintableName to Name. 
llvm-svn: 47629
 2008-02-26 21:47:57 +00:00
Bill Wendling
c24ea4fb41 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool 
would have been a Godsend here!

llvm-svn: 47625
 2008-02-26 21:11:01 +00:00
Evan Cheng
548677022c All remat'ed loads cannot be folded into two-address code. Not just argument loads. This change doesn't really have any impact on codegen. 
llvm-svn: 47557
 2008-02-25 19:24:01 +00:00
Evan Cheng
589a9fb6dc Correctly determine whether a argument load can be folded into its uses. 
llvm-svn: 47545
 2008-02-25 08:50:41 +00:00
Evan Cheng
504c645b3e Rematerialization logic was overly conservative when it comes to loads from fixed stack slots. 
llvm-svn: 47529
 2008-02-23 03:38:34 +00:00
Evan Cheng
379682b0e5 If remating a machine instr with virtual register operand, make sure the vr is avaliable at all uses regardless of whether it would be folded. 
llvm-svn: 47526
 2008-02-23 02:14:42 +00:00
Evan Cheng
e70afb021b Recognize loads of arguments as re-materializable first. Therefore if isReallyTriviallyReMaterializable() returns true it doesn't confuse it as a "normal" re-materializable instruction. 
llvm-svn: 47520
 2008-02-23 01:44:27 +00:00
Evan Cheng
4f5cb4cdac Fix spill weight updating bug. 
llvm-svn: 47507
 2008-02-23 00:33:04 +00:00
Evan Cheng
c373911461 Enable re-materialization of instructions which have virtual register operands if 
the definition of the operand also reaches its uses.

llvm-svn: 47475
 2008-02-22 09:24:50 +00:00
Evan Cheng
911f6bd799 Clean up some spilling code using MachineRegisterInfo. 
llvm-svn: 47416
 2008-02-21 00:34:19 +00:00
Roman Levenstein
0b2c8858df New helper function getMBBFromIndex() that given an index in any instruction of an MBB returns a pointer the MBB. Reviewed by Evan. 
llvm-svn: 47267
 2008-02-18 09:35:30 +00:00
Evan Cheng
2ff2da89ab - Removing the infamous r2rMap_ and rep() method. Now the coalescer will update 
register defs and uses after each successful coalescing.
- Also removed a number of hacks and fixed some subtle kill information bugs.

llvm-svn: 47167
 2008-02-15 18:24:29 +00:00
Evan Cheng
bb4b97f90e Fix a potential serious problem where kills belonging to the val# defined by a two-address instruction is also on the val# that defines the input. 
llvm-svn: 47057
 2008-02-13 09:06:18 +00:00
Dan Gohman
3a4be0fdef Rename MRegisterInfo to TargetRegisterInfo. 
llvm-svn: 46930
 2008-02-10 18:45:23 +00:00
Evan Cheng
f2bd1387b0 Forgot these files. 
llvm-svn: 46896
 2008-02-08 22:05:27 +00:00
Owen Anderson
2a8a485630 Move some functionality for adding flags to MachineInstr's into methods on MachineInstr rather than LiveVariables. 
llvm-svn: 46295
 2008-01-24 01:10:07 +00:00
Evan Cheng
f2553ab84f Only remat loads from immutable stack slots. 
llvm-svn: 45831
 2008-01-10 08:24:38 +00:00
Evan Cheng
8b03bafd37 Simplify some code. 
llvm-svn: 45830
 2008-01-10 08:22:10 +00:00
Owen Anderson
d445b8813f Don't use LiveVariables::VarInfo::DefInst. 
llvm-svn: 45815
 2008-01-10 03:12:54 +00:00
Chris Lattner
03ad885039 rename TargetInstrDescriptor -> TargetInstrDesc. 
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695
 2008-01-07 07:27:27 +00:00
Chris Lattner
769c86bf63 simplify some code using new predicates 
llvm-svn: 45689
 2008-01-07 05:40:58 +00:00
Chris Lattner
a98c679de0 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects 
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674
 2008-01-07 01:56:04 +00:00
Owen Anderson
0ec92e9d64 Update CodeGen for MRegisterInfo --> TargetInstrInfo changes. 
llvm-svn: 45673
 2008-01-07 01:35:56 +00:00
Chris Lattner
a4ce4f6987 rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. 
llvm-svn: 45667
 2008-01-06 23:38:27 +00:00
Bill Wendling
0c209430b4 Don't recalculate the loop info and loop dominators analyses if they're 
preserved.

llvm-svn: 45596
 2008-01-04 20:54:55 +00:00
Chris Lattner
a10fff51d9 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea 
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
 2007-12-31 04:13:23 +00:00
Chris Lattner
6005589faf More cleanups for MachineOperand: 
- Eliminate the static "print" method for operands, moving it
    into MachineOperand::print.
  - Change various set* methods for register flags to take a bool
    for the value to set it to.  Remove unset* methods.
  - Group methods more logically by operand flavor in MachineOperand.h

llvm-svn: 45461
 2007-12-30 21:56:09 +00:00
Chris Lattner
f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Evan Cheng
6e68381e02 Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled. 
llvm-svn: 44960
 2007-12-12 23:12:09 +00:00
Evan Cheng
303417d242 Switch over to MachineLoopInfo. 
llvm-svn: 44838
 2007-12-11 02:09:15 +00:00
Bill Wendling
3f19dfe794 Reverting 44702. It wasn't correct to rename them. 
llvm-svn: 44727
 2007-12-08 23:58:46 +00:00
Bill Wendling
2b07d8c5a0 Renaming: 
isTriviallyReMaterializable -> hasNoSideEffects
  isReallyTriviallyReMaterializable -> isTriviallyReMaterializable

llvm-svn: 44702
 2007-12-08 07:17:56 +00:00
Evan Cheng
8393dc7378 Turning simple splitting on. Start testing new coalescer heuristics as new llcbeta. 
llvm-svn: 44660
 2007-12-06 08:54:31 +00:00
Evan Cheng
7fc1d98353 Fix for PR1831: if all defs of an interval are re-materializable, then it's a preferred spill candiate. 
llvm-svn: 44644
 2007-12-06 00:01:56 +00:00
Evan Cheng
678b86d6ce MachineInstr can change. Store indexes instead. 
llvm-svn: 44612
 2007-12-05 10:24:35 +00:00
Evan Cheng
06353b48b5 If a split live interval is spilled again, remove the kill marker on its last use. 
llvm-svn: 44611
 2007-12-05 09:51:10 +00:00
Evan Cheng
64b3baaaea Clobber more bugs. 
llvm-svn: 44610
 2007-12-05 09:05:34 +00:00
Evan Cheng
d7de56ac93 Fix kill info for split intervals. 
llvm-svn: 44609
 2007-12-05 08:16:32 +00:00
Evan Cheng
269dbd31d0 - Mark last use of a split interval as kill instead of letting spiller track it. 
This allows an important optimization to be re-enabled.
- If all uses / defs of a split interval can be folded, give the interval a
  low spill weight so it would not be picked in case spilling is needed (avoid
  pushing other intervals in the same BB to be spilled).

llvm-svn: 44601
 2007-12-05 03:22:34 +00:00
Evan Cheng
d1badb960e Discard split intervals made empty due to folding. 
llvm-svn: 44565
 2007-12-04 00:32:23 +00:00
Evan Cheng
196faa9dc5 Typo 
llvm-svn: 44532
 2007-12-03 10:00:00 +00:00
Evan Cheng
85ef9834a6 Update kill info for uses of split intervals. 
llvm-svn: 44531
 2007-12-03 09:58:48 +00:00
Evan Cheng
f45a1d623c Remove redundant foldMemoryOperand variants and other code clean up. 
llvm-svn: 44517
 2007-12-02 08:30:39 +00:00
Evan Cheng
388f6f51a0 Fix a bug where splitting cause some unnecessary spilling. 
llvm-svn: 44482
 2007-12-01 04:42:39 +00:00
Evan Cheng
69fda0a716 Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0. 
llvm-svn: 44479
 2007-12-01 02:07:52 +00:00
Evan Cheng
b10dc27b20 Do not fold reload into an instruction with multiple uses. It issues one extra load. 
llvm-svn: 44467
 2007-11-30 21:23:43 +00:00
Evan Cheng
d35b5acae4 Do not lose rematerialization info when spilling already split live intervals. 
llvm-svn: 44443
 2007-11-29 23:02:50 +00:00
Evan Cheng
8494ee175c Fix a major performance issue with splitting. If there is a def (not def/use) 
in the middle of a split basic block, create a new live interval starting at
the def. This avoid artifically extending the live interval over a number of
cycles where it is dead. e.g.

bb1:
       = vr1204   (use / kill) <= new interval starts and ends here.
...
...
vr1204 =          (new def)   <= start a new interval here.
       = vr1204   (use)

llvm-svn: 44436
 2007-11-29 10:12:14 +00:00
Evan Cheng
f85c063ec0 Replace the odd kill# hack with something less fragile. 
llvm-svn: 44434
 2007-11-29 09:49:23 +00:00
Evan Cheng
be255b0650 Fixed various live interval splitting bugs / compile time issues. 
llvm-svn: 44428
 2007-11-29 01:06:25 +00:00
Evan Cheng
c1648b6a0d Recover compile time regression. 
llvm-svn: 44386
 2007-11-28 01:28:46 +00:00
Evan Cheng
8e22379303 Live interval splitting: 
When a live interval is being spilled, rather than creating short, non-spillable
intervals for every def / use, split the interval at BB boundaries. That is, for
every BB where the live interval is defined or used, create a new interval that
covers all the defs and uses in the BB.

This is designed to eliminate one common problem: multiple reloads of the same
value in a single basic block. Note, it does *not* decrease the number of spills
since no copies are inserted so the split intervals are *connected* through
spill and reloads (or rematerialization). The newly created intervals can be
spilled again, in that case, since it does not span multiple basic blocks, it's
spilled in the usual manner. However, it can reuse the same stack slot as the
previously split interval.

This is currently controlled by -split-intervals-at-bb.

llvm-svn: 44198
 2007-11-17 00:40:40 +00:00
Evan Cheng
2c1a50455c Fix a thinko in post-allocation coalescer. 
llvm-svn: 44166
 2007-11-15 08:13:29 +00:00
Evan Cheng
7f02cfa599 Clean up sub-register implementation by moving subReg information back to 
MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.

llvm-svn: 44104
 2007-11-14 07:59:08 +00:00
Evan Cheng
be51f28e2b Refactor some code. 
llvm-svn: 44010
 2007-11-12 06:35:08 +00:00
Evan Cheng
e742ee1dbe Simplify my (il)logic. 
llvm-svn: 43819
 2007-11-07 08:08:25 +00:00
Evan Cheng
dd71a5c37b When the allocator rewrite a spill register with new virtual register, it replaces other operands of the same register. Watch out for situations where 
only some of the operands are sub-register uses.

llvm-svn: 43776
 2007-11-06 21:12:10 +00:00
Evan Cheng
92d23e5204 Fix a bug where a def use operand isn't being detected as a sub-register use. 
llvm-svn: 43763
 2007-11-06 08:50:44 +00:00
Evan Cheng
a8044084ac Fix PR1187. 
llvm-svn: 43692
 2007-11-05 00:59:10 +00:00
Evan Cheng
66298e226f There are times when the coalescer would not coalesce away a copy but the copy 
can be eliminated by the allocator is the destination and source targets the
same register. The most common case is when the source and destination registers
are in different class. For example, on x86 mov32to32_ targets GR32_ which
contains a subset of the registers in GR32.

The allocator can do 2 things:
1. Set the preferred allocation for the destination of a copy to that of its source.
2. After allocation is done, change the allocation of a copy destination (if
   legal) so the copy can be eliminated.

This eliminates 443 extra moves from 403.gcc.

llvm-svn: 43662
 2007-11-03 07:20:12 +00:00
Evan Cheng
0dde6e5761 Apply Chris' suggestions. 
llvm-svn: 43069
 2007-10-17 06:53:44 +00:00
Evan Cheng
8b8c7c9927 Clean up code that calculate MBB live-in's. 
llvm-svn: 43060
 2007-10-17 02:10:22 +00:00
Evan Cheng
1410b8512c Did mean to leave this in. INSERT_SUBREG isn't being coalesced yet. 
llvm-svn: 42916
 2007-10-12 17:16:50 +00:00
Evan Cheng
aa2d6ef81d EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like 
(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.

llvm-svn: 42899
 2007-10-12 08:50:34 +00:00
Evan Cheng
21a58a72c5 Kill cycle of an live range is always the last use index + 1. 
llvm-svn: 42742
 2007-10-08 06:59:30 +00:00
Dan Gohman
c731c97fac Use empty() member functions when that's what's being tested for instead 
of comparing begin() and end().

llvm-svn: 42585
 2007-10-03 19:26:29 +00:00
Dan Gohman
9da02f5ee2 Remove isReg, isImm, and isMBB, and change all their users to use 
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958
 2007-09-14 20:33:02 +00:00
Evan Cheng
d059eed1c1 Fix a memory leak. 
llvm-svn: 41739
 2007-09-06 01:07:24 +00:00
Evan Cheng
db53aef53e Use pool allocator for all the VNInfo's to improve memory access locality. This reduces coalescing time on siod Mac OS X PPC by 35%. Also remove the back ptr from VNInfo to LiveInterval and other tweaks. 
llvm-svn: 41729
 2007-09-05 21:46:51 +00:00
Evan Cheng
32a0a995c6 Try fold re-materialized load instructions into its uses. 
llvm-svn: 41598
 2007-08-30 05:53:02 +00:00
Evan Cheng
1ad4a6117b Change LiveRange so it keeps a pointer to the VNInfo rather than an index. 
Changes related modules so VNInfo's are not copied. This decrease
copy coalescing time by 45% and overall compilation time by 10% on siod.

llvm-svn: 41579
 2007-08-29 20:45:00 +00:00
Evan Cheng
70c2de7bf1 Fix some kill info update bugs; add hidden option -disable-rematerialization to turn off remat for debugging. 
llvm-svn: 41118
 2007-08-16 07:24:22 +00:00
Evan Cheng
33820da1da Re-implement trivial rematerialization. This allows def MIs whose live intervals that are coalesced to be rematerialized. 
llvm-svn: 41060
 2007-08-13 23:45:17 +00:00
Evan Cheng
05cc486c7b Code to maintain kill information during register coalescing. 
llvm-svn: 41016
 2007-08-11 00:59:19 +00:00
Evan Cheng
d771b793fe Adding kill info to val#. 
llvm-svn: 40925
 2007-08-08 07:03:29 +00:00
Evan Cheng
a8c2f38617 - Each val# can have multiple kills. 
- Fix some minor bugs related to special markers on val# def. ~0U means
  undefined, ~1U means dead val#.

llvm-svn: 40916
 2007-08-08 03:00:28 +00:00
Evan Cheng
0d0fee269a - LiveInterval value#'s now have 3 components: def instruction #, 
kill instruction #, and source register number (iff the value# is defined by a
copy).
- Now def instruction # is set for every value#, not just for copy defined ones.
- Update some outdated code related inactive live ranges.
- Kill info not yet set. That's next patch.

llvm-svn: 40913
 2007-08-07 23:49:57 +00:00
Evan Cheng
df0c705d7d If a livein is not used in the block. It's live through. 
llvm-svn: 37764
 2007-06-27 18:47:28 +00:00
Evan Cheng
6cf1371456 Fix an obvious bug. Old code only worked for the entry block. 
llvm-svn: 37743
 2007-06-27 01:16:36 +00:00
Dan Gohman
9e82064924 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad 
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.

llvm-svn: 37644
 2007-06-19 01:48:05 +00:00
Dan Gohman
4a4a8eb00e Add a target hook to allow loads from constant pools to be rematerialized, and an 
implementation for x86.

llvm-svn: 37576
 2007-06-14 20:50:44 +00:00
David Greene
02f6e9b621 Factor live variable analysis so it does not do register coalescing 
simultaneously.  Move that pass to SimpleRegisterCoalescing.

This makes it easier to implement alternative register allocation and
coalescing strategies while maintaining reuse of the existing live
interval analysis.

llvm-svn: 37520
 2007-06-08 17:18:56 +00:00
Evan Cheng
e1595b6859 Only worry about intervening kill if there are more than one live ranges in the interval. 
llvm-svn: 37052
 2007-05-14 21:23:51 +00:00
Evan Cheng
c690cba7d9 Fix for PR1406: 
v1 =
r2 = move v1
   = op r2<kill>
...
r2 = move v1
   = op r2<kill>

Clear the first r2 kill if v1 and r2 are joined.

llvm-svn: 37050
 2007-05-14 21:10:05 +00:00
Devang Patel
8c78a0bff0 Drop 'const' 
llvm-svn: 36662
 2007-05-03 01:11:54 +00:00
Devang Patel
e95c6ad802 Use 'static const char' instead of 'static const int'. 
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.

llvm-svn: 36652
 2007-05-02 21:39:20 +00:00
Lauro Ramos Venancio
41223586a2 Fix build error. 
llvm-svn: 36648
 2007-05-02 20:37:47 +00:00
Devang Patel
09f162ca6a Do not use typeinfo to identify pass in pass manager. 
llvm-svn: 36632
 2007-05-01 21:15:47 +00:00
Evan Cheng
910c80851e Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion. 
llvm-svn: 36483
 2007-04-26 19:00:32 +00:00
Evan Cheng
7818c03c6b Fix for PR1306. 
- A register def / use now implicitly affects sub-register liveness but does
not affect liveness information of super-registers.
- Def of a larger register (if followed by a use later) is treated as
read/mod/write of a smaller register.

llvm-svn: 36434
 2007-04-25 07:30:23 +00:00
Evan Cheng
4c53d321aa VarInfo::UsedBlocks is no longer used. Remove. 
llvm-svn: 36250
 2007-04-18 05:04:38 +00:00
Evan Cheng
b408e8f11d Don't populate TryAgainList when coalescing only physical registers with virtual registers. 
llvm-svn: 36240
 2007-04-18 02:30:19 +00:00
Evan Cheng
b881bdabd9 Copy coalescing change to prevent a physical register from being pin to a 
long live interval that has low usage density.
1. Change order of coalescing to join physical registers with virtual
   registers first before virtual register intervals become too long.
2. Check size and usage density to determine if it's worthwhile to join.
3. If joining is aborted, assign virtual register live interval allocation
   preference field to the physical register.
4. Register allocator should try to allocate to the preferred register
   first (if available) to create identify moves that can be eliminated.

llvm-svn: 36218
 2007-04-17 20:32:26 +00:00
Evan Cheng
8be98c1572 Re-materialize all loads from fixed stack slots. 
llvm-svn: 35660
 2007-04-04 07:40:01 +00:00
Evan Cheng
2bf2aadd9a Trivially re-materializable instructions have spill weights that are half of what it would be otherwise. 
llvm-svn: 35658
 2007-04-04 07:04:55 +00:00
Evan Cheng
476fb6a5c9 Ugh. Copy coalescer does not update register numbers. 
llvm-svn: 35600
 2007-04-02 18:49:18 +00:00
Evan Cheng
48dd5e7d44 Bug fix for PR1279. When isDead is propagate by copy coalescing, we keep length 
of dead def live interval at 1 to avoid multiple def's targeting the same
register. The previous patch missed a case where the source operand is live-in.
In that case, remove the whole interval.

llvm-svn: 35512
 2007-03-30 20:18:35 +00:00
Evan Cheng
603e49c6da Move rematerialization out of beta. 
llvm-svn: 35419
 2007-03-28 08:26:40 +00:00
Evan Cheng
b41697c006 Fix for PR1279. Dead def has a live interval of length 1. Copy coalescing should 
not violate that.

llvm-svn: 35396
 2007-03-28 01:30:37 +00:00
Evan Cheng
4a09b1b5be Fix for PR1266. Don't mark a two address operand IsKill. 
llvm-svn: 35365
 2007-03-26 22:40:42 +00:00
Evan Cheng
a20815e157 Fix for PR1257. Bug in live range shortening as a result of copy coalescing 
where the destination is dead.

llvm-svn: 35252
 2007-03-22 01:26:05 +00:00
Evan Cheng
0e3278e505 First cut trivial re-materialization support. 
llvm-svn: 35208
 2007-03-20 08:13:50 +00:00
Evan Cheng
25d00d545d Remove -reduce-joining-phys-regs options. Make it on by default. 
llvm-svn: 35165
 2007-03-19 18:08:26 +00:00
Evan Cheng
c5e74f6404 Minor bug fix. 
llvm-svn: 35153
 2007-03-19 04:22:35 +00:00
Evan Cheng
d8f2e4fe4c - Merge UsedBlocks info after two virtual registers are coalesced. 
- Use distance to closest use to determine whether to abort coalescing.

llvm-svn: 35141
 2007-03-18 09:05:55 +00:00
Evan Cheng
7b2a001669 Joining a live interval of a physical register with a virtual one can turn out 
to be really bad. Once they are joined they are not broken apart. Also, physical
intervals cannot be spilled!

Added a heuristic as a workaround for this. Be careful coalescing with a
physical register if the virtual register uses are "far". Check if there are
uses in the same loop as the source (copy instruction). Check if it is in the
loop preheader, etc.

llvm-svn: 35134
 2007-03-17 09:27:35 +00:00
Evan Cheng
88de94a4fb Debugging output stuff. 
llvm-svn: 35117
 2007-03-15 21:19:28 +00:00
Evan Cheng
3fd728596e Watch out for cases like this: 
entry (0x8b056f0, LLVM BB @0x8b01b30, ID#0):
Live Ins: %r0 %r1 %r2 %r3
        %reg1032 = tMOVrr %r3<kill>
        %reg1033 = tMOVri8 1
        %reg1034 = tMOVri8 0
        tCMPi8 %reg1029<kill>, 0
        tBcc mbb<entry,0x8b06a10>, 0
    Successors according to CFG: 0x8b06980 0x8b06a10

entry (0x8b06980, LLVM BB @0x8b01b30, ID#12):
    Predecessors according to CFG: 0x8b056f0
        %reg1036 = tMOVrr %reg1034<kill>
    Successors according to CFG: 0x8b06a10

entry (0x8b06a10, LLVM BB @0x8b01b30, ID#13):
    Predecessors according to CFG: 0x8b056f0 0x8b06980
        %reg1024<dead> = tMOVrr %reg1030<kill>
        ...

reg1030 and r1 have already been joined. When reg1024 and reg1030 are joined,
r1 live range from function entry to the tMOVrr instruction are dead. Eliminate
r1 from the livein set of the entry BB, not the BB where the copy is.

llvm-svn: 34866
 2007-03-03 02:18:00 +00:00
Evan Cheng
9d615d1e70 Dead live-in detection bug. 
llvm-svn: 34843
 2007-03-02 10:41:15 +00:00
Evan Cheng
9be123c568 Oops. 
llvm-svn: 34768
 2007-03-01 02:05:35 +00:00
Evan Cheng
8a703ad4b6 Track all joined registers and eliminate unneeded kills after all joining are done. 
llvm-svn: 34767
 2007-03-01 02:03:03 +00:00
Evan Cheng
bdec83e4d2 Joining an interval with a dead copy instruction. Shorten the live range to the last use. 
llvm-svn: 34645
 2007-02-26 21:37:37 +00:00
Evan Cheng
0577b51538 Fix a couple of bugs related IsDead back propagation during coalescing. 
llvm-svn: 34595
 2007-02-25 09:46:31 +00:00
Evan Cheng
e54eb80720 If the liveinterval of the source instruction has been extended, remove the IsKill marker. 
llvm-svn: 34594
 2007-02-25 09:41:59 +00:00
Evan Cheng
97cc93841d Handle cases when joining live intervals of two virtual registers. 
llvm-svn: 34534
 2007-02-23 20:40:13 +00:00
Evan Cheng
cc607daac1 Remove unnecessary isKill properties if a live range has been lengthened due to coalescing. 
llvm-svn: 34503
 2007-02-22 23:03:39 +00:00
Jim Laskey
5b2b7c1024 Allow for live in registers for eh landing pads. 
llvm-svn: 34475
 2007-02-21 22:41:17 +00:00
Evan Cheng
e563c7eb27 Out of bound reference. 
llvm-svn: 34461
 2007-02-21 02:27:39 +00:00
Evan Cheng
f7ed82da10 Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. 
llvm-svn: 34428
 2007-02-19 21:49:54 +00:00
Reid Spencer
da81bf4d3e For PR1207: 
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.

llvm-svn: 34399
 2007-02-19 03:20:00 +00:00
Evan Cheng
2605082f0e - Changes how function livein's are handled, they now have a start index of 0. 
- When coalescing a copy MI, if its destination is "dead", propagate the
  property to the source MI's destination if there are no intervening uses.
- Detect dead function live-in's and remove them.

llvm-svn: 34383
 2007-02-17 11:15:40 +00:00
Evan Cheng
14edd1989b Use BitVector instead of vector<bool> which can be extremely slow. 
llvm-svn: 34302
 2007-02-15 05:59:24 +00:00
Evan Cheng
b612316f20 Allow any MachineBasicBlock (not just the entry block) to have live-in physical 
registers. Make sure liveinterval analysis is correctly creating live ranges
for them.

llvm-svn: 34217
 2007-02-13 01:30:55 +00:00
Chris Lattner
aee775a6b7 Eliminate static ctors from Statistics 
llvm-svn: 32698
 2006-12-19 22:41:21 +00:00
Bill Wendling
f3baad3ee1 Changed llvm_ostream et all to OStream. llvm_cerr, llvm_cout, llvm_null, are 
now cerr, cout, and NullStream resp.

llvm-svn: 32298
 2006-12-07 01:30:32 +00:00
Evan Cheng
e312c152d2 MI keeps a ptr of TargetInstrDescriptor, use it. 
llvm-svn: 32296
 2006-12-07 01:21:59 +00:00
Chris Lattner
700b873130 Detemplatize the Statistic class. The only type it is instantiated with 
is 'unsigned'.

llvm-svn: 32279
 2006-12-06 17:46:33 +00:00
Jeff Cohen
cc08c83186 Unbreak VC++ build. 
llvm-svn: 32113
 2006-12-02 02:22:01 +00:00
Evan Cheng
67fc141db5 Match TargetInstrInfo changes. 
llvm-svn: 32098
 2006-12-01 21:52:58 +00:00
Bill Wendling
5c3966aa68 Converted to using llvm streams instead of <iostream>s 
llvm-svn: 31992
 2006-11-29 00:39:47 +00:00