Jakob Stoklund Olesen
2cdca45861
Never propagate the idom value out of a block that defines its own value.
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llvm-svn: 117669
2010-10-29 17:37:25 +00:00
John Thompson
e8360b7182
Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
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llvm-svn: 117667
2010-10-29 17:29:13 +00:00
Bill Wendling
c2d549e007
This may be an ARM target, so check for _Unwind_SjLj_Resume.
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llvm-svn: 117643
2010-10-29 07:46:01 +00:00
Jakob Stoklund Olesen
13d7e0d012
Fix broken equivalence class calculation. We could probably also use
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EquvivalenceClasses.h except it looks like overkill when elements are continuous
integers.
llvm-svn: 117631
2010-10-29 00:40:59 +00:00
Jakob Stoklund Olesen
b98755472e
Print out the connected components in the verifier after complaining about their
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multiplicity.
llvm-svn: 117630
2010-10-29 00:40:57 +00:00
Jakob Stoklund Olesen
a2578fe7f3
Run a verification pass before any splitting to better distribute blame.
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llvm-svn: 117629
2010-10-29 00:40:55 +00:00
Devang Patel
6e0d58968d
Ignore empty blocks.
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llvm-svn: 117615
2010-10-28 22:11:59 +00:00
Jakob Stoklund Olesen
dc5e7065a4
One day, physical register live ranges will be sensible.
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llvm-svn: 117602
2010-10-28 20:44:22 +00:00
Jakob Stoklund Olesen
c9f90c2a32
Replace SplitKit SSA update with an iterative algorithm very similar to the one
...
in SSAUpdaterImpl.h
Verifying live intervals revealed that the old method was completely wrong, and
we need an iterative approach to calculating PHI placemant. Fortunately, we have
MachineDominators available, so we don't have to compute that over and over
like SSAUpdaterImpl.h must.
Live-out values are cached between calls to mapValue() and computed in a greedy
way, so most calls will be working with very small block sets.
Thanks to Bob for explaining how this should work.
llvm-svn: 117599
2010-10-28 20:34:52 +00:00
Jakob Stoklund Olesen
e172a8b794
Make MachineDominators available for SplitEditor. We are going to need it for
...
proper SSA updating.
This doesn't cause MachineDominators to be recomputed since we are already
requiring MachineLoopInfo which uses dominators as well.
llvm-svn: 117598
2010-10-28 20:34:50 +00:00
Jakob Stoklund Olesen
1005cf323d
Add a temporary command line option to verify machine code after each spill or
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split.
llvm-svn: 117597
2010-10-28 20:34:47 +00:00
Devang Patel
1c75865037
Do not work too hard to find type's file info. There is a special field to record file info.
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llvm-svn: 117588
2010-10-28 19:50:08 +00:00
Devang Patel
c4b69051b7
Technically DIFile scope should also be handled here.
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llvm-svn: 117563
2010-10-28 17:30:52 +00:00
Bob Wilson
f63da12be9
Teach the DAG combiner to fold a splat of a splat. Radar 8597790.
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Also do some minor refactoring to reduce indentation.
llvm-svn: 117558
2010-10-28 17:06:14 +00:00
Evan Cheng
ff310737e5
Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.
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llvm-svn: 117531
2010-10-28 06:47:08 +00:00
Evan Cheng
e2c211c1b9
Revert 117518 and 117519 for now. They changed scheduling and cause MC tests to fail. Ugh.
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llvm-svn: 117520
2010-10-28 02:00:25 +00:00
Evan Cheng
523fa3a2e8
Fix a major bug in operand latency computation. The use index must be adjusted
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by the number of defs first for it to match the instruction itinerary.
llvm-svn: 117518
2010-10-28 01:46:29 +00:00
Evan Cheng
cbdf7e874a
Putting r117193 back except for the compile time cost. Rather than assuming fallthroughs uses all registers, just gather the union of all successor liveins.
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llvm-svn: 117506
2010-10-27 23:17:17 +00:00
Michael J. Spencer
0f83d96852
COFF: Add IMAGE_SCN_MEM_READ to text sections.
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There are currently 100 references to COFF::IMAGE_SCN in 6 files
and 11 different functions. Section to attribute mapping really
needs to happen in one place to avoid problems like this.
llvm-svn: 117473
2010-10-27 18:52:29 +00:00
Michael J. Spencer
fbdab0d633
Fix whitespace.
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llvm-svn: 117472
2010-10-27 18:52:20 +00:00
Jim Grosbach
e4992c88a4
Formatting.
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llvm-svn: 117453
2010-10-27 16:30:18 +00:00
Jakob Stoklund Olesen
79e1407c11
Handle critical loop predecessors by making both inside and outside registers
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live out.
This doesn't prevent us from inserting a loop preheader later on, if that is
better.
llvm-svn: 117424
2010-10-27 00:39:07 +00:00
Jakob Stoklund Olesen
795ed98180
Compute critical loop predecessors in the same way as critical loop exits.
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Critical edges going into a loop are not as bad as critical exits. We can handle
them by splitting the critical edge, or by having both inside and outside
registers live out of the predecessor.
llvm-svn: 117423
2010-10-27 00:39:05 +00:00
Jakob Stoklund Olesen
0e7a011a00
Physical registers trivially have multiple connected components all the time.
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Only virtuals should be requires to be connected.
llvm-svn: 117422
2010-10-27 00:39:01 +00:00
Dale Johannesen
e660f4d072
Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches
...
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet). No functional change except
for dump output.
llvm-svn: 117413
2010-10-26 23:11:10 +00:00
Andrew Trick
5f88cc34e1
Remove the vector of live vregs. I thought we would need to track
...
them, but hopefully we won't. And this is not the right data structure
to do it anyway.
llvm-svn: 117412
2010-10-26 22:58:24 +00:00
Jakob Stoklund Olesen
e4f3317cda
After splitting, compute connected components of all new registers, not just for
...
the remainder register.
Example:
bb0:
x = 1
bb1:
use(x)
...
x = 2
jump bb1
When x is isolated in bb1, the inner part breaks into two components, x1 and x2:
bb0:
x0 = 1
bb1:
x1 = x0
use(x1)
...
x2 = 2
x0 = x2
jump bb1
llvm-svn: 117408
2010-10-26 22:36:09 +00:00
Jakob Stoklund Olesen
260fa289df
Verify that live intervals are connected. If there are multiple connected
...
components, each should get its own virtual register.
llvm-svn: 117407
2010-10-26 22:36:07 +00:00
Jakob Stoklund Olesen
022e7795cf
Call RenumberValues for all new registers created during splitting. This is
...
necessary to get correct hasPHIKill flags.
llvm-svn: 117406
2010-10-26 22:36:05 +00:00
Jakob Stoklund Olesen
4453324e5b
Preserve PHIDef bits in cloned values during splitting.
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llvm-svn: 117405
2010-10-26 22:36:02 +00:00
Devang Patel
05561e8b7b
Assign source ordering to nodes created for StoreInst.
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llvm-svn: 117404
2010-10-26 22:14:52 +00:00
Jakob Stoklund Olesen
b7050233fb
Teach MachineBasicBlock::print() to annotate instructions and blocks with
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SlotIndexes when available.
llvm-svn: 117392
2010-10-26 20:21:46 +00:00
Jakob Stoklund Olesen
db594373bd
Remmeber to print full live interval on verification error.
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llvm-svn: 117391
2010-10-26 20:21:43 +00:00
Andrew Trick
84aef49e32
Jakob's review of the basic register allocator.
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llvm-svn: 117384
2010-10-26 18:34:01 +00:00
Devang Patel
b5694e702c
s/beginScope/beginInstruction/g
...
s/endScope/endInstruction/g
llvm-svn: 117376
2010-10-26 17:49:02 +00:00
Jakob Stoklund Olesen
9eabfa3a39
Don't verify physical registers going into landing pads.
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Magic is happening that we don't understand.
llvm-svn: 117370
2010-10-26 16:49:23 +00:00
Evan Cheng
e96b8d7ab6
Use instruction itinerary to determine what instructions are 'cheap'.
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llvm-svn: 117348
2010-10-26 02:08:50 +00:00
Nick Lewycky
90b2ac2696
For statistics that are only used in functions declared in !NDEBUG, wrap the
...
declarations in !NDEBUG to avoid -Wunused-variable warnings. Patch by
Matt Beaumont-Gay!
llvm-svn: 117345
2010-10-26 00:51:57 +00:00
Jakob Stoklund Olesen
e2c340c8d0
InlineSpiller can also update LiveStacks.
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llvm-svn: 117338
2010-10-26 00:11:35 +00:00
Jakob Stoklund Olesen
7cdc1e5f16
Make the spiller responsible for updating the LiveStacks analysis.
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llvm-svn: 117337
2010-10-26 00:11:33 +00:00
Bob Wilson
e1961fe289
When the "true" and "false" blocks of a diamond if-conversion are the same,
...
do not double-count the duplicate instructions by counting once from the
beginning and again from the end. Keep track of where the duplicates from
the beginning ended and don't go past that point when counting duplicates
at the end. Radar 8589805.
This change causes one of the MC/ARM/simple-fp-encoding tests to produce
different (better!) code without the vmovne instruction being tested.
I changed the test to produce vmovne and vmoveq instructions but moving
between register files in the opposite direction. That's not quite the same
but predicated versions of those instructions weren't being tested before,
so at least the test coverage is not any worse, just different.
llvm-svn: 117333
2010-10-26 00:02:24 +00:00
Bob Wilson
efd360c535
Change if-conversion to keep track of the extra cost due to microcoded
...
instructions separately from the count of non-predicated instructions. The
instruction count is used in places to determine how many instructions to
copy, predicate, etc. and things get confused if that count includes the
extra cost for microcoded ops.
llvm-svn: 117332
2010-10-26 00:02:21 +00:00
Evan Cheng
43d6f34e9f
Neuter r117193 as it causes significant post-ra scheduler compile time regression.
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llvm-svn: 117329
2010-10-25 23:56:21 +00:00
Devang Patel
43c3f4b63c
Simplify.
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Do not count use of sdisel for single call instruction.
llvm-svn: 117316
2010-10-25 21:31:46 +00:00
Devang Patel
3bc6d198fb
Add counters to count basic blocks and machine basic blocks with out of order line number info.
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Add counters to count how many basic blocks are entirely selected by fastisel.
llvm-svn: 117310
2010-10-25 20:55:43 +00:00
Devang Patel
a86114b961
Add simple counter to count no. of basic blocks without any line number information. At -O0, these basic block coule cause less than optimial debugging experience.
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llvm-svn: 117307
2010-10-25 20:45:32 +00:00
Jakob Stoklund Olesen
912db6d9d0
In which I learn how to forward declare template classes.
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llvm-svn: 117272
2010-10-25 17:27:30 +00:00
Chandler Carruth
82058c05f8
Move the remaining attribute macros to systematic names based on the attribute
...
name and prefixed with 'LLVM_'.
llvm-svn: 117203
2010-10-23 08:40:19 +00:00
Chandler Carruth
9733158bfd
Fix a likely bug in an assertion by adding parentheses around '||'. This bug
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was found by a GCC warning. ;]
llvm-svn: 117199
2010-10-23 07:46:14 +00:00
Evan Cheng
15459b695f
Properly model the latency of register defs which are 1) function returns or
...
2) live-outs.
Previously the post-RA schedulers completely ignore these dependencies since
returns, branches, etc. are all scheduling barriers. This patch model the
latencies between instructions being scheduled and the barriers. It also
handle calls by marking their register uses.
llvm-svn: 117193
2010-10-23 02:10:46 +00:00