Commit Graph

618 Commits

Author SHA1 Message Date
Dan Gohman
16d4bc3dc0 Follow Chris' suggestion; change the PseudoSourceValue accessors
to return pointers instead of references, since this is always what
is needed.

llvm-svn: 46857
2008-02-07 18:41:25 +00:00
Dan Gohman
2d489b5081 Re-apply the memory operand changes, with a fix for the static
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.

llvm-svn: 46827
2008-02-06 22:27:42 +00:00
Evan Cheng
efd142a920 SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.

llvm-svn: 46659
2008-02-02 04:07:54 +00:00
Evan Cheng
263070ea2b Rename RecordLabel to RecordSourceLine because that's what it is doing.
llvm-svn: 46628
2008-02-01 02:05:57 +00:00
Evan Cheng
27b32b87ed Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit.
llvm-svn: 46623
2008-01-31 21:00:00 +00:00
Evan Cheng
1c6c16ea11 Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution.
llvm-svn: 46609
2008-01-31 09:59:15 +00:00
Dan Gohman
9ba4d76816 Rename ISD::FLT_ROUNDS to ISD::FLT_ROUNDS_ to avoid conflicting
with the real FLT_ROUNDS (defined in <float.h>).

llvm-svn: 46587
2008-01-31 00:41:03 +00:00
Dan Gohman
3646fdda67 Create a new class, MemOperand, for describing memory references
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.

Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.

Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.

llvm-svn: 46585
2008-01-31 00:25:39 +00:00
Dan Gohman
47a7d6fafe Factor the addressing mode and the load/store VT out of LoadSDNode
and StoreSDNode into their common base class LSBaseSDNode. Member
functions getLoadedVT and getStoredVT are replaced with the common
getMemoryVT to simplify code that will handle both loads and stores.

llvm-svn: 46538
2008-01-30 00:15:11 +00:00
Nate Begeman
ef33767efb Properly expand extract-element for non-power-of-2 codegen
llvm-svn: 46486
2008-01-29 02:24:00 +00:00
Duncan Sands
95d46ef887 The last pieces needed for loading arbitrary
precision integers.  This won't actually work
(and most of the code is dead) unless the new
legalization machinery is turned on.  While
there, I rationalized the handling of i1, and
removed some bogus (and unused) sextload patterns.
For i1, this could result in microscopically
better code for some architectures (not X86).
It might also result in worse code if annotating
with AssertZExt nodes turns out to be more harmful
than helpful.

llvm-svn: 46280
2008-01-23 20:39:46 +00:00
Duncan Sands
88de26cffb The final piece needed for storing arbitrary precision
integers.  Handle truncstore of a legal type to an unusual
number of bits.  Most of this code is not reachable unless
the new legalize infrastructure is turned on.

llvm-svn: 46249
2008-01-22 07:17:34 +00:00
Dale Johannesen
949e5a2f8a Do not generate a FP_ROUND of f64 to f64.
llvm-svn: 46195
2008-01-20 01:18:38 +00:00
Chris Lattner
1ea55cf816 This commit changes:
1. Legalize now always promotes truncstore of i1 to i8. 
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
   X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
   safe.

The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:

_foo:
	fldt	20(%esp)
	fldt	4(%esp)
	faddp	%st(1)
	movl	36(%esp), %eax
	fstps	(%eax)
	ret

instead of:

_foo:
	subl	$4, %esp
	fldt	24(%esp)
	fldt	8(%esp)
	faddp	%st(1)
	fstps	(%esp)
	movl	40(%esp), %eax
	movss	(%esp), %xmm0
	movss	%xmm0, (%eax)
	addl	$4, %esp
	ret

llvm-svn: 46140
2008-01-17 19:59:44 +00:00
Chris Lattner
72733e573b * Introduce a new SelectionDAG::getIntPtrConstant method
and switch various codegen pieces and the X86 backend over
  to using it.

* Add some comments to SelectionDAGNodes.h

* Introduce a second argument to FP_ROUND, which indicates
  whether the FP_ROUND changes the value of its input. If
  not it is safe to xform things like fp_extend(fp_round(x)) -> x.

llvm-svn: 46125
2008-01-17 07:00:52 +00:00
Chris Lattner
7ca4d5b1f3 merge a few pieces of code that do the store/load to stack
pattern to use EmitStackConvert now.

llvm-svn: 46066
2008-01-16 07:51:34 +00:00
Chris Lattner
87bc3e7ece rename ExpandBIT_CONVERT to EmitStackConvert, generalizing
it to allow it to emit different load and store kinds.

llvm-svn: 46065
2008-01-16 07:45:30 +00:00
Chris Lattner
a2c7ff3386 simplify a bunch of code by using SelectionDAG::CreateStackTemporary
instead of inlining its body.

llvm-svn: 46062
2008-01-16 07:03:22 +00:00
Chris Lattner
91d86242f9 Change legalizeop of FP_ROUND and FP_EXTEND to not fall through
into the ANY_EXTEND/ZERO_EXTEND/SIGN_EXTEND code to simplify it.

Unmerge the code for FP_ROUND and FP_EXTEND from each other to 
make each one simpler.

llvm-svn: 46061
2008-01-16 06:57:07 +00:00
Chris Lattner
ec224888a6 The type of the 'abort' node should be pointer type (because
it's a function pointer) not MVT::Other.  This fixes builtin_trap
lowering on ppc, alpha, ia64

llvm-svn: 46018
2008-01-15 22:09:33 +00:00
Chris Lattner
ee8df1f4d3 Add support for targets that have a legal ISD::TRAP.
llvm-svn: 46014
2008-01-15 21:58:08 +00:00
Anton Korobeynikov
6bbbc4cbfa For PR1839: add initial support for __builtin_trap. llvm-gcc part is missed
as well as PPC codegen

llvm-svn: 46001
2008-01-15 07:02:33 +00:00
Duncan Sands
53c954fa86 Output sinl for a long double FSIN node, not sin.
Likewise fix up a bunch of other libcalls.  While
there I remove NEG_F32 and NEG_F64 since they are
not used anywhere.  This fixes 9 Ada ACATS failures.

llvm-svn: 45833
2008-01-10 10:28:30 +00:00
Nate Begeman
5743da502e If custom lowering of insert element fails, the result Val will be 0.
Don't overwrite a variable used by the fallthrough code path in this
case.

llvm-svn: 45630
2008-01-05 20:47:37 +00:00
Duncan Sands
57a60f0466 Fix PR1833 - eh.exception and eh.selector return two
values, which means doing extra legalization work.
It would be easier to get this kind of thing right if
there was some documentation...

llvm-svn: 45472
2007-12-31 18:35:50 +00:00
Chris Lattner
a10fff51d9 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
2007-12-31 04:13:23 +00:00
Chris Lattner
f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Chris Lattner
cab915f9cf Implement expand support for MERGE_VALUEs that only produces one result.
llvm-svn: 44304
2007-11-24 19:12:15 +00:00
Chris Lattner
f81d5886c6 Several changes:
1) Change the interface to TargetLowering::ExpandOperationResult to 
   take and return entire NODES that need a result expanded, not just
   the value.  This allows us to handle things like READCYCLECOUNTER,
   which returns two values.
2) Implement (extremely limited) support in LegalizeDAG::ExpandOp for MERGE_VALUES.
3) Reimplement custom lowering in LegalizeDAGTypes in terms of the new
   ExpandOperationResult.  This makes the result simpler and fully 
   general.
4) Implement (fully general) expand support for MERGE_VALUES in LegalizeDAGTypes.
5) Implement ExpandOperationResult support for ARM f64->i64 bitconvert and ARM
   i64 shifts, allowing them to work with LegalizeDAGTypes.
6) Implement ExpandOperationResult support for X86 READCYCLECOUNTER and FP_TO_SINT,
   allowing them to work with LegalizeDAGTypes.

LegalizeDAGTypes now passes several more X86 codegen tests when enabled and when
type legalization in LegalizeDAG is ifdef'd out.

llvm-svn: 44300
2007-11-24 07:07:01 +00:00
Chris Lattner
09c0393d5e ExpandUnalignedLoad doesn't handle vectors right at all apparently.
Fix a couple of problems:
1. Don't assume the VT-1 is a VT that is half the size.
2. Treat vectors of FP in the vector path, not the FP path.

This has a couple of remaining problems before it will work with
the code in PR1811: the code below this change assumes that it can
use extload/shift/or to construct the result, which isn't right for
vectors.

This also doesn't handle vectors of 1 or vectors that aren't pow-2.

llvm-svn: 44243
2007-11-19 21:38:03 +00:00
Chris Lattner
6fa95ec19d Implement vector expand support for shuffle_vector. This fixes PR1811.
llvm-svn: 44242
2007-11-19 21:16:54 +00:00
Chris Lattner
67d77945e7 Implement splitting of UNDEF nodes. This is the first step towards fixing PR1811
llvm-svn: 44239
2007-11-19 20:21:32 +00:00
Dan Gohman
36347a26f9 Add support in SplitVectorOp for remainder operators.
llvm-svn: 44233
2007-11-19 15:15:03 +00:00
Nate Begeman
d4d45c268c Add support for vectors to int <-> float casts.
llvm-svn: 44204
2007-11-17 03:58:34 +00:00
Anton Korobeynikov
66b91e66ec Implement necessary bits for flt_rounds gcc builtin.
Codegen bits and llvm-gcc support will follow.

llvm-svn: 44182
2007-11-15 23:25:33 +00:00
Nate Begeman
bd117f06ba Basic non-power-of-2 vector support
llvm-svn: 44181
2007-11-15 21:15:26 +00:00
Bill Wendling
f359fed9f9 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).

This can only result in tears...

llvm-svn: 44037
2007-11-13 00:44:25 +00:00
Duncan Sands
e795efea5b Move MinAlign to MathExtras.h.
llvm-svn: 43944
2007-11-09 13:41:39 +00:00
Evan Cheng
797d56ff17 Much improved pic jumptable codegen:
Then:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        imull   $4, %ecx, %ecx
        leal    LJTI1_0-"L1$pb"(%eax), %edx
        addl    LJTI1_0-"L1$pb"(%ecx,%eax), %edx
        jmpl    *%edx

        .align  2
        .set L1_0_set_3,LBB1_3-LJTI1_0
        .set L1_0_set_2,LBB1_2-LJTI1_0
        .set L1_0_set_5,LBB1_5-LJTI1_0
        .set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

Now:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        addl    LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
        jmpl    *%eax

		.align  2
		.set L1_0_set_3,LBB1_3-"L1$pb"
		.set L1_0_set_2,LBB1_2-"L1$pb"
		.set L1_0_set_5,LBB1_5-"L1$pb"
		.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

llvm-svn: 43924
2007-11-09 01:32:10 +00:00
Evan Cheng
f14006f4d6 Didn't mean to check these in.
llvm-svn: 43923
2007-11-09 01:28:33 +00:00
Evan Cheng
1bf166312b Bug fix. Passive nodes are not in SUnitMap.
llvm-svn: 43922
2007-11-09 01:27:11 +00:00
Dan Gohman
ccfc028283 Remainder operations must be either integer or floating-point.
llvm-svn: 43781
2007-11-06 22:11:54 +00:00
Dan Gohman
08143e397d Add support for vector remainder operations.
llvm-svn: 43744
2007-11-05 23:35:22 +00:00
Duncan Sands
44b8721de8 Executive summary: getTypeSize -> getTypeStoreSize / getABITypeSize.
The meaning of getTypeSize was not clear - clarifying it is important
now that we have x86 long double and arbitrary precision integers.
The issue with long double is that it requires 80 bits, and this is
not a multiple of its alignment.  This gives a primitive type for
which getTypeSize differed from getABITypeSize.  For arbitrary precision
integers it is even worse: there is the minimum number of bits needed to
hold the type (eg: 36 for an i36), the maximum number of bits that will
be overwriten when storing the type (40 bits for i36) and the ABI size
(i.e. the storage size rounded up to a multiple of the alignment; 64 bits
for i36).

This patch removes getTypeSize (not really - it is still there but
deprecated to allow for a gradual transition).  Instead there is:

(1) getTypeSizeInBits - a number of bits that suffices to hold all
values of the type.  For a primitive type, this is the minimum number
of bits.  For an i36 this is 36 bits.  For x86 long double it is 80.
This corresponds to gcc's TYPE_PRECISION.

(2) getTypeStoreSizeInBits - the maximum number of bits that is
written when storing the type (or read when reading it).  For an
i36 this is 40 bits, for an x86 long double it is 80 bits.  This
is the size alias analysis is interested in (getTypeStoreSize
returns the number of bytes).  There doesn't seem to be anything
corresponding to this in gcc.

(3) getABITypeSizeInBits - this is getTypeStoreSizeInBits rounded
up to a multiple of the alignment.  For an i36 this is 64, for an
x86 long double this is 96 or 128 depending on the OS.  This is the
spacing between consecutive elements when you form an array out of
this type (getABITypeSize returns the number of bytes).  This is
TYPE_SIZE in gcc.

Since successive elements in a SequentialType (arrays, pointers
and vectors) need to be aligned, the spacing between them will be
given by getABITypeSize.  This means that the size of an array
is the length times the getABITypeSize.  It also means that GEP
computations need to use getABITypeSize when computing offsets.
Furthermore, if an alloca allocates several elements at once then
these too need to be aligned, so the size of the alloca has to be
the number of elements multiplied by getABITypeSize.  Logically
speaking this doesn't have to be the case when allocating just
one element, but it is simpler to also use getABITypeSize in this
case.  So alloca's and mallocs should use getABITypeSize.  Finally,
since gcc's only notion of size is that given by getABITypeSize, if
you want to output assembler etc the same as gcc then getABITypeSize
is the size you want.

Since a store will overwrite no more than getTypeStoreSize bytes,
and a read will read no more than that many bytes, this is the
notion of size appropriate for alias analysis calculations.

In this patch I have corrected all type size uses except some of
those in ScalarReplAggregates, lib/Codegen, lib/Target (the hard
cases).  I will get around to auditing these too at some point,
but I could do with some help.

Finally, I made one change which I think wise but others might
consider pointless and suboptimal: in an unpacked struct the
amount of space allocated for a field is now given by the ABI
size rather than getTypeStoreSize.  I did this because every
other place that reserves memory for a type (eg: alloca) now
uses getABITypeSize, and I didn't want to make an exception
for unpacked structs, i.e. I did it to make things more uniform.
This only effects structs containing long doubles and arbitrary
precision integers.  If someone wants to pack these types more
tightly they can always use a packed struct.

llvm-svn: 43620
2007-11-01 20:53:16 +00:00
Dale Johannesen
b066c1f216 Make i64=expand_vector_elt(v2i64) work in 32-bit mode.
llvm-svn: 43535
2007-10-31 00:32:36 +00:00
Duncan Sands
1826deda68 The guaranteed alignment of ptr+offset is only the minimum of
of offset and the alignment of ptr if these are both powers of
2.  While the ptr alignment is guaranteed to be a power of 2,
there is no reason to think that offset is.  For example, if
offset is 12 (the size of a long double on x86-32 linux) and
the alignment of ptr is 8, then the alignment of ptr+offset
will in general be 4, not 8.  Introduce a function MinAlign,
lifted from gcc, for computing the minimum guaranteed alignment.
I've tried to fix up everywhere under lib/CodeGen/SelectionDAG/.
I also changed some places that weren't wrong (because both values
were a power of 2), as a defensive change against people copying
and pasting the code.
Hopefully someone who cares about alignment will review the rest
of LLVM and fix up the remaining places.  Since I'm on x86 I'm
not very motivated to do this myself...

llvm-svn: 43421
2007-10-28 12:59:45 +00:00
Dale Johannesen
a4a972e32d Another expansion for i64 multiply, suitable for PPC.
llvm-svn: 43314
2007-10-24 22:26:08 +00:00
Dale Johannesen
771188cf60 Fix a few places vector operations were not getting
the operand's type from the right place.

llvm-svn: 43195
2007-10-20 00:07:52 +00:00
Dale Johannesen
6802d0c96f Redo "last ppc long double fix" as Chris wants.
llvm-svn: 43189
2007-10-19 20:29:00 +00:00
Chris Lattner
064c31ebac Fix a really nasty vector miscompilation bill recently introduced.
llvm-svn: 43181
2007-10-19 16:47:35 +00:00