Gericom/teak-llvm
1
Fork 0
mirror of https://github.com/Gericom/teak-llvm.git synced 2025-06-19 11:35:51 -04:00
Code Issues Actions Packages Projects Releases Wiki Activity

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

Browse Source 
Summary:
 This is a resurrection of work first proposed and discussed in Aug 2015:
   http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
and initially landed (but then backed out) in Nov 2015:
   http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html

 The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument
which is required to be a constant integer. It represents the alignment of the
dest (and source), and so must be the minimum of the actual alignment of the
two.

 This change is the first in a series that allows source and dest to each
have their own alignments by using the alignment attribute on their arguments.

 In this change we:
1) Remove the alignment argument.
2) Add alignment attributes to the source & dest arguments. We, temporarily,
   require that the alignments for source & dest be equal.

 For example, code which used to read:
  call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false)
will now read
  call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false)

 Downstream users may have to update their lit tests that check for
@llvm.memcpy/memmove/memset call/declaration patterns. The following extended sed script
may help with updating the majority of your tests, but it does not catch all possible
patterns so some manual checking and updating will be required.

s~declare void @llvm\.mem(set|cpy|move)\.p([^(]*)\((.*), i32, i1\)~declare void @llvm.mem\1.p\2(\3, i1)~g
s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* \3, i8 \4, i8 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* \3, i8 \4, i16 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* \3, i8 \4, i32 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* \3, i8 \4, i64 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* \3, i8 \4, i128 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* align \6 \3, i8 \4, i8 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* align \6 \3, i8 \4, i16 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* align \6 \3, i8 \4, i32 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* align \6 \3, i8 \4, i64 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* align \6 \3, i8 \4, i128 \5, i1 \7)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* \4, i8\5* \6, i8 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* \4, i8\5* \6, i16 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* \4, i8\5* \6, i32 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* \4, i8\5* \6, i64 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* \4, i8\5* \6, i128 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* align \8 \4, i8\5* align \8 \6, i8 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* align \8 \4, i8\5* align \8 \6, i16 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* align \8 \4, i8\5* align \8 \6, i32 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* align \8 \4, i8\5* align \8 \6, i64 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* align \8 \4, i8\5* align \8 \6, i128 \7, i1 \9)~g

 The remaining changes in the series will:
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
   source and dest alignments.
Step 3) Update Clang to use the new IRBuilder API.
Step 4) Update Polly to use the new IRBuilder API.
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
        and those that use use MemIntrinsicInst::[get|set]Alignment() to use
        getDestAlignment() and getSourceAlignment() instead.
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
        MemIntrinsicInst::[get|set]Alignment() methods.

Reviewers: pete, hfinkel, lhames, reames, bollu

Reviewed By: reames

Subscribers: niosHD, reames, jholewinski, qcolombet, jfb, sanjoy, arsenm, dschuff, dylanmckay, mehdi_amini, sdardis, nemanjai, david2050, nhaehnle, javed.absar, sbc100, jgravelle-google, eraman, aheejin, kbarton, JDevlieghere, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, sabuasal, llvm-commits

Differential Revision: https://reviews.llvm.org/D41675

llvm-svn: 322965
This commit is contained in:
Daniel Neilson 2018-01-19 17:13:12 +00:00
parent 6e938effaa
commit 1e68724d24
395 changed files with 2410 additions and 2281 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

51
llvm/docs/LangRef.rst
View File

@ -1064,6 +1064,8 @@ Currently, only the following parameter attributes are defined:
to trap and to be properly aligned. This is not a valid attribute to trap and to be properly aligned. This is not a valid attribute
for return values. for return values.
.. _attr_align:
``align <n>`` ``align <n>``
This indicates that the pointer value may be assumed by the optimizer to This indicates that the pointer value may be assumed by the optimizer to
have the specified alignment. have the specified alignment.
@ -10341,9 +10343,9 @@ support all bit widths however.
:: ::
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* <dest>, i8* <src>, declare void @llvm.memcpy.p0i8.p0i8.i32(i8* <dest>, i8* <src>,
i32 <len>, i32 <align>, i1 <isvolatile>) i32 <len>, i1 <isvolatile>)
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* <dest>, i8* <src>, declare void @llvm.memcpy.p0i8.p0i8.i64(i8* <dest>, i8* <src>,
i64 <len>, i32 <align>, i1 <isvolatile>) i64 <len>, i1 <isvolatile>)
Overview: Overview:
""""""""" """""""""
@ -10352,7 +10354,7 @@ The '``llvm.memcpy.*``' intrinsics copy a block of memory from the
source location to the destination location. source location to the destination location.
Note that, unlike the standard libc function, the ``llvm.memcpy.*`` Note that, unlike the standard libc function, the ``llvm.memcpy.*``
intrinsics do not return a value, takes extra alignment/isvolatile intrinsics do not return a value, takes extra isvolatile
arguments and the pointers can be in specified address spaces. arguments and the pointers can be in specified address spaces.
Arguments: Arguments:
@ -10360,13 +10362,11 @@ Arguments:
The first argument is a pointer to the destination, the second is a The first argument is a pointer to the destination, the second is a
pointer to the source. The third argument is an integer argument pointer to the source. The third argument is an integer argument
specifying the number of bytes to copy, the fourth argument is the specifying the number of bytes to copy, and the fourth is a
alignment of the source and destination locations, and the fifth is a
boolean indicating a volatile access. boolean indicating a volatile access.
If the call to this intrinsic has an alignment value that is not 0 or 1, The :ref:`align <_attr_align>` parameter attribute can be provided
then the caller guarantees that both the source and destination pointers for the first and second arguments.
are aligned to that boundary.
If the ``isvolatile`` parameter is ``true``, the ``llvm.memcpy`` call is If the ``isvolatile`` parameter is ``true``, the ``llvm.memcpy`` call is
a :ref:`volatile operation <volatile>`. The detailed access behavior is not a :ref:`volatile operation <volatile>`. The detailed access behavior is not
@ -10396,9 +10396,9 @@ bit widths however.
:: ::
declare void @llvm.memmove.p0i8.p0i8.i32(i8* <dest>, i8* <src>, declare void @llvm.memmove.p0i8.p0i8.i32(i8* <dest>, i8* <src>,
i32 <len>, i32 <align>, i1 <isvolatile>) i32 <len>, i1 <isvolatile>)
declare void @llvm.memmove.p0i8.p0i8.i64(i8* <dest>, i8* <src>, declare void @llvm.memmove.p0i8.p0i8.i64(i8* <dest>, i8* <src>,
i64 <len>, i32 <align>, i1 <isvolatile>) i64 <len>, i1 <isvolatile>)
Overview: Overview:
""""""""" """""""""
@ -10409,21 +10409,19 @@ source location to the destination location. It is similar to the
overlap. overlap.
Note that, unlike the standard libc function, the ``llvm.memmove.*`` Note that, unlike the standard libc function, the ``llvm.memmove.*``
intrinsics do not return a value, takes extra alignment/isvolatile intrinsics do not return a value, takes an extra isvolatile
arguments and the pointers can be in specified address spaces. argument and the pointers can be in specified address spaces.
Arguments: Arguments:
"""""""""" """"""""""
The first argument is a pointer to the destination, the second is a The first argument is a pointer to the destination, the second is a
pointer to the source. The third argument is an integer argument pointer to the source. The third argument is an integer argument
specifying the number of bytes to copy, the fourth argument is the specifying the number of bytes to copy, and the fourth is a
alignment of the source and destination locations, and the fifth is a
boolean indicating a volatile access. boolean indicating a volatile access.
If the call to this intrinsic has an alignment value that is not 0 or 1, The :ref:`align <_attr_align>` parameter attribute can be provided
then the caller guarantees that the source and destination pointers are for the first and second arguments.
aligned to that boundary.
If the ``isvolatile`` parameter is ``true``, the ``llvm.memmove`` call If the ``isvolatile`` parameter is ``true``, the ``llvm.memmove`` call
is a :ref:`volatile operation <volatile>`. The detailed access behavior is is a :ref:`volatile operation <volatile>`. The detailed access behavior is
@ -10453,9 +10451,9 @@ support all bit widths.
:: ::
declare void @llvm.memset.p0i8.i32(i8* <dest>, i8 <val>, declare void @llvm.memset.p0i8.i32(i8* <dest>, i8 <val>,
i32 <len>, i32 <align>, i1 <isvolatile>) i32 <len>, i1 <isvolatile>)
declare void @llvm.memset.p0i8.i64(i8* <dest>, i8 <val>, declare void @llvm.memset.p0i8.i64(i8* <dest>, i8 <val>,
i64 <len>, i32 <align>, i1 <isvolatile>) i64 <len>, i1 <isvolatile>)
Overview: Overview:
""""""""" """""""""
@ -10464,8 +10462,8 @@ The '``llvm.memset.*``' intrinsics fill a block of memory with a
particular byte value. particular byte value.
Note that, unlike the standard libc function, the ``llvm.memset`` Note that, unlike the standard libc function, the ``llvm.memset``
intrinsic does not return a value and takes extra alignment/volatile intrinsic does not return a value and takes an extra volatile
arguments. Also, the destination can be in an arbitrary address space. argument. Also, the destination can be in an arbitrary address space.
Arguments: Arguments:
"""""""""" """"""""""
@ -10473,11 +10471,10 @@ Arguments:
The first argument is a pointer to the destination to fill, the second The first argument is a pointer to the destination to fill, the second
is the byte value with which to fill it, the third argument is an is the byte value with which to fill it, the third argument is an
integer argument specifying the number of bytes to fill, and the fourth integer argument specifying the number of bytes to fill, and the fourth
argument is the known alignment of the destination location. is a boolean indicating a volatile access.
If the call to this intrinsic has an alignment value that is not 0 or 1, The :ref:`align <_attr_align>` parameter attribute can be provided
then the caller guarantees that the destination pointer is aligned to for the first arguments.
that boundary.
If the ``isvolatile`` parameter is ``true``, the ``llvm.memset`` call is If the ``isvolatile`` parameter is ``true``, the ``llvm.memset`` call is
a :ref:`volatile operation <volatile>`. The detailed access behavior is not a :ref:`volatile operation <volatile>`. The detailed access behavior is not
@ -10487,9 +10484,7 @@ Semantics:
"""""""""" """"""""""
The '``llvm.memset.*``' intrinsics fill "len" bytes of memory starting The '``llvm.memset.*``' intrinsics fill "len" bytes of memory starting
at the destination location. If the argument is known to be aligned to at the destination location.
some boundary, this can be specified as the fourth argument, otherwise
it should be set to 0 or 1 (both meaning no alignment).
'``llvm.sqrt.*``' Intrinsic '``llvm.sqrt.*``' Intrinsic
^^^^^^^^^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^^^^^^^^^

79
llvm/include/llvm/IR/IntrinsicInst.h
View File

@ -243,6 +243,8 @@ namespace llvm {
return cast<PointerType>(getRawDest()->getType())->getAddressSpace(); return cast<PointerType>(getRawDest()->getType())->getAddressSpace();
} }
unsigned getDestAlignment() const { return getParamAlignment(ARG_DEST); }
/// Set the specified arguments of the instruction. /// Set the specified arguments of the instruction.
void setDest(Value *Ptr) { void setDest(Value *Ptr) {
assert(getRawDest()->getType() == Ptr->getType() && assert(getRawDest()->getType() == Ptr->getType() &&
@ -250,6 +252,13 @@ namespace llvm {
setArgOperand(ARG_DEST, Ptr); setArgOperand(ARG_DEST, Ptr);
} }
void setDestAlignment(unsigned Align) {
removeParamAttr(ARG_DEST, Attribute::Alignment);
if (Align > 0)
addParamAttr(ARG_DEST,
Attribute::getWithAlignment(getContext(), Align));
}
void setLength(Value *L) { void setLength(Value *L) {
assert(getLength()->getType() == L->getType() && assert(getLength()->getType() == L->getType() &&
"setLength called with value of wrong type!"); "setLength called with value of wrong type!");
@ -347,12 +356,23 @@ namespace llvm {
return cast<PointerType>(getRawSource()->getType())->getAddressSpace(); return cast<PointerType>(getRawSource()->getType())->getAddressSpace();
} }
unsigned getSourceAlignment() const {
return getParamAlignment(ARG_SOURCE);
}
void setSource(Value *Ptr) { void setSource(Value *Ptr) {
assert(getRawSource()->getType() == Ptr->getType() && assert(getRawSource()->getType() == Ptr->getType() &&
"setSource called with pointer of wrong type!"); "setSource called with pointer of wrong type!");
setArgOperand(ARG_SOURCE, Ptr); setArgOperand(ARG_SOURCE, Ptr);
} }
void setSourceAlignment(unsigned Align) {
removeParamAttr(ARG_SOURCE, Attribute::Alignment);
if (Align > 0)
addParamAttr(ARG_SOURCE,
Attribute::getWithAlignment(getContext(), Align));
}
static bool classof(const IntrinsicInst *I) { static bool classof(const IntrinsicInst *I) {
switch (I->getIntrinsicID()) { switch (I->getIntrinsicID()) {
case Intrinsic::memcpy_element_unordered_atomic: case Intrinsic::memcpy_element_unordered_atomic:
@ -394,16 +414,13 @@ namespace llvm {
/// This is the common base class for memset/memcpy/memmove. /// This is the common base class for memset/memcpy/memmove.
class MemIntrinsic : public MemIntrinsicBase<MemIntrinsic> { class MemIntrinsic : public MemIntrinsicBase<MemIntrinsic> {
private: private:
enum { ARG_ALIGN = 3, ARG_VOLATILE = 4 }; enum { ARG_VOLATILE = 3 };
public: public:
ConstantInt *getAlignmentCst() const { // TODO: Remove this method entirely.
return cast<ConstantInt>(const_cast<Value *>(getArgOperand(ARG_ALIGN))); // Interim, for now, during transition from having an alignment
} // arg to using alignment attributes.
unsigned getAlignment() const;
unsigned getAlignment() const {
return getAlignmentCst()->getZExtValue();
}
ConstantInt *getVolatileCst() const { ConstantInt *getVolatileCst() const {
return cast<ConstantInt>( return cast<ConstantInt>(
@ -414,16 +431,13 @@ namespace llvm {
return !getVolatileCst()->isZero(); return !getVolatileCst()->isZero();
} }
void setAlignment(unsigned Align) { // TODO: Remove this method entirely. It is here only during transition
setArgOperand(ARG_ALIGN, ConstantInt::get(getAlignmentType(), Align)); // from having an explicit alignment arg to using alignment attributes.
} // For now we always set dest & source alignment attributes to match
void setAlignment(unsigned Align);
void setVolatile(Constant *V) { setArgOperand(ARG_VOLATILE, V); } void setVolatile(Constant *V) { setArgOperand(ARG_VOLATILE, V); }
Type *getAlignmentType() const {
return getArgOperand(ARG_ALIGN)->getType();
}
// Methods for support type inquiry through isa, cast, and dyn_cast: // Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const IntrinsicInst *I) { static bool classof(const IntrinsicInst *I) {
switch (I->getIntrinsicID()) { switch (I->getIntrinsicID()) {
@ -482,12 +496,23 @@ namespace llvm {
return cast<PointerType>(getRawSource()->getType())->getAddressSpace(); return cast<PointerType>(getRawSource()->getType())->getAddressSpace();
} }
unsigned getSourceAlignment() const {
return getParamAlignment(ARG_SOURCE);
}
void setSource(Value *Ptr) { void setSource(Value *Ptr) {
assert(getRawSource()->getType() == Ptr->getType() && assert(getRawSource()->getType() == Ptr->getType() &&
"setSource called with pointer of wrong type!"); "setSource called with pointer of wrong type!");
setArgOperand(ARG_SOURCE, Ptr); setArgOperand(ARG_SOURCE, Ptr);
} }
void setSourceAlignment(unsigned Align) {
removeParamAttr(ARG_SOURCE, Attribute::Alignment);
if (Align > 0)
addParamAttr(ARG_SOURCE,
Attribute::getWithAlignment(getContext(), Align));
}
// Methods for support type inquiry through isa, cast, and dyn_cast: // Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const IntrinsicInst *I) { static bool classof(const IntrinsicInst *I) {
return I->getIntrinsicID() == Intrinsic::memcpy || return I->getIntrinsicID() == Intrinsic::memcpy ||
@ -498,6 +523,19 @@ namespace llvm {
} }
}; };
inline unsigned MemIntrinsic::getAlignment() const {
if (const auto *MTI = dyn_cast<MemTransferInst>(this))
return std::min(MTI->getDestAlignment(), MTI->getSourceAlignment());
else
return getDestAlignment();
}
inline void MemIntrinsic::setAlignment(unsigned Align) {
setDestAlignment(Align);
if (auto *MTI = dyn_cast<MemTransferInst>(this))
MTI->setSourceAlignment(Align);
}
/// This class wraps the llvm.memcpy intrinsic. /// This class wraps the llvm.memcpy intrinsic.
class MemCpyInst : public MemTransferInst { class MemCpyInst : public MemTransferInst {
public: public:
@ -611,12 +649,23 @@ namespace llvm {
return cast<PointerType>(getRawSource()->getType())->getAddressSpace(); return cast<PointerType>(getRawSource()->getType())->getAddressSpace();
} }
unsigned getSourceAlignment() const {
return getParamAlignment(ARG_SOURCE);
}
void setSource(Value *Ptr) { void setSource(Value *Ptr) {
assert(getRawSource()->getType() == Ptr->getType() && assert(getRawSource()->getType() == Ptr->getType() &&
"setSource called with pointer of wrong type!"); "setSource called with pointer of wrong type!");
setArgOperand(ARG_SOURCE, Ptr); setArgOperand(ARG_SOURCE, Ptr);
} }
void setSourceAlignment(unsigned Align) {
removeParamAttr(ARG_SOURCE, Attribute::Alignment);
if (Align > 0)
addParamAttr(ARG_SOURCE,
Attribute::getWithAlignment(getContext(), Align));
}
static bool classof(const IntrinsicInst *I) { static bool classof(const IntrinsicInst *I) {
switch (I->getIntrinsicID()) { switch (I->getIntrinsicID()) {
case Intrinsic::memcpy: case Intrinsic::memcpy:

6
llvm/include/llvm/IR/Intrinsics.td
View File

@ -390,17 +390,17 @@ def int_instrprof_value_profile : Intrinsic<[],
def int_memcpy : Intrinsic<[], def int_memcpy : Intrinsic<[],
[llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty, [llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty,
llvm_i32_ty, llvm_i1_ty], llvm_i1_ty],
[IntrArgMemOnly, NoCapture<0>, NoCapture<1>, [IntrArgMemOnly, NoCapture<0>, NoCapture<1>,
WriteOnly<0>, ReadOnly<1>]>; WriteOnly<0>, ReadOnly<1>]>;
def int_memmove : Intrinsic<[], def int_memmove : Intrinsic<[],
[llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty, [llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty,
llvm_i32_ty, llvm_i1_ty], llvm_i1_ty],
[IntrArgMemOnly, NoCapture<0>, NoCapture<1>, [IntrArgMemOnly, NoCapture<0>, NoCapture<1>,
ReadOnly<1>]>; ReadOnly<1>]>;
def int_memset : Intrinsic<[], def int_memset : Intrinsic<[],
[llvm_anyptr_ty, llvm_i8_ty, llvm_anyint_ty, [llvm_anyptr_ty, llvm_i8_ty, llvm_anyint_ty,
llvm_i32_ty, llvm_i1_ty], llvm_i1_ty],
[IntrArgMemOnly, NoCapture<0>, WriteOnly<0>]>; [IntrArgMemOnly, NoCapture<0>, WriteOnly<0>]>;
// FIXME: Add version of these floating point intrinsics which allow non-default // FIXME: Add version of these floating point intrinsics which allow non-default

4
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
View File

@ -5017,6 +5017,8 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
Align = 1; // @llvm.memcpy defines 0 and 1 to both mean no alignment. Align = 1; // @llvm.memcpy defines 0 and 1 to both mean no alignment.
bool isVol = MCI.isVolatile(); bool isVol = MCI.isVolatile();
bool isTC = I.isTailCall() && isInTailCallPosition(&I, DAG.getTarget()); bool isTC = I.isTailCall() && isInTailCallPosition(&I, DAG.getTarget());
// FIXME: Support passing different dest/src alignments to the memcpy DAG
// node.
SDValue MC = DAG.getMemcpy(getRoot(), sdl, Op1, Op2, Op3, Align, isVol, SDValue MC = DAG.getMemcpy(getRoot(), sdl, Op1, Op2, Op3, Align, isVol,
false, isTC, false, isTC,
MachinePointerInfo(I.getArgOperand(0)), MachinePointerInfo(I.getArgOperand(0)),
@ -5049,6 +5051,8 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
Align = 1; // @llvm.memmove defines 0 and 1 to both mean no alignment. Align = 1; // @llvm.memmove defines 0 and 1 to both mean no alignment.
bool isVol = MMI.isVolatile(); bool isVol = MMI.isVolatile();
bool isTC = I.isTailCall() && isInTailCallPosition(&I, DAG.getTarget()); bool isTC = I.isTailCall() && isInTailCallPosition(&I, DAG.getTarget());
// FIXME: Support passing different dest/src alignments to the memmove DAG
// node.
SDValue MM = DAG.getMemmove(getRoot(), sdl, Op1, Op2, Op3, Align, isVol, SDValue MM = DAG.getMemmove(getRoot(), sdl, Op1, Op2, Op3, Align, isVol,
isTC, MachinePointerInfo(I.getArgOperand(0)), isTC, MachinePointerInfo(I.getArgOperand(0)),
MachinePointerInfo(I.getArgOperand(1))); MachinePointerInfo(I.getArgOperand(1)));

70
llvm/lib/IR/AutoUpgrade.cpp
View File

@ -22,6 +22,7 @@
#include "llvm/IR/Function.h" #include "llvm/IR/Function.h"
#include "llvm/IR/IRBuilder.h" #include "llvm/IR/IRBuilder.h"
#include "llvm/IR/Instruction.h" #include "llvm/IR/Instruction.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/LLVMContext.h" #include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Module.h" #include "llvm/IR/Module.h"
#include "llvm/IR/Verifier.h" #include "llvm/IR/Verifier.h"
@ -522,6 +523,37 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
return true; return true;
} }
} }
// Updating the memory intrinsics (memcpy/memmove/memset) that have an
// alignment parameter to embedding the alignment as an attribute of
// the pointer args.
if (Name.startswith("memcpy.") && F->arg_size() == 5) {
rename(F);
// Get the types of dest, src, and len
ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3);
NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memcpy,
ParamTypes);
return true;
}
if (Name.startswith("memmove.") && F->arg_size() == 5) {
rename(F);
// Get the types of dest, src, and len
ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3);
NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memmove,
ParamTypes);
return true;
}
if (Name.startswith("memset.") && F->arg_size() == 5) {
rename(F);
// Get the types of dest, and len
const auto *FT = F->getFunctionType();
Type *ParamTypes[2] = {
FT->getParamType(0), // Dest
FT->getParamType(2) // len
};
NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memset,
ParamTypes);
return true;
}
break; break;
} }
case 'n': { case 'n': {
@ -2198,14 +2230,17 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
return; return;
} }
CallInst *NewCall = nullptr; const auto &DefaultCase = [&NewFn, &CI]() -> void {
switch (NewFn->getIntrinsicID()) {
default: {
// Handle generic mangling change, but nothing else // Handle generic mangling change, but nothing else
assert( assert(
(CI->getCalledFunction()->getName() != NewFn->getName()) && (CI->getCalledFunction()->getName() != NewFn->getName()) &&
"Unknown function for CallInst upgrade and isn't just a name change"); "Unknown function for CallInst upgrade and isn't just a name change");
CI->setCalledFunction(NewFn); CI->setCalledFunction(NewFn);
};
CallInst *NewCall = nullptr;
switch (NewFn->getIntrinsicID()) {
default: {
DefaultCase();
return; return;
} }
@ -2346,6 +2381,35 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
NewCall = Builder.CreateCall(NewFn, Args); NewCall = Builder.CreateCall(NewFn, Args);
break; break;
} }
case Intrinsic::memcpy:
case Intrinsic::memmove:
case Intrinsic::memset: {
// We have to make sure that the call signature is what we're expecting.
// We only want to change the old signatures by removing the alignment arg:
// @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i32, i1)
// -> @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i1)
// @llvm.memset...(i8*, i8, i[32|64], i32, i1)
// -> @llvm.memset...(i8*, i8, i[32|64], i1)
// Note: i8*'s in the above can be any pointer type
if (CI->getNumArgOperands() != 5) {
DefaultCase();
return;
}
// Remove alignment argument (3), and add alignment attributes to the
// dest/src pointers.
Value *Args[4] = {CI->getArgOperand(0), CI->getArgOperand(1),
CI->getArgOperand(2), CI->getArgOperand(4)};
NewCall = Builder.CreateCall(NewFn, Args);
auto *MemCI = cast<MemIntrinsic>(NewCall);
// All mem intrinsics support dest alignment.
const ConstantInt *Align = cast<ConstantInt>(CI->getArgOperand(3));
MemCI->setDestAlignment(Align->getZExtValue());
// Memcpy/Memmove also support source alignment.
if (auto *MTI = dyn_cast<MemTransferInst>(MemCI))
MTI->setSourceAlignment(Align->getZExtValue());
break;
}
} }
assert(NewCall && "Should have either set this variable or returned through " assert(NewCall && "Should have either set this variable or returned through "
"the default case"); "the default case");

36
llvm/lib/IR/IRBuilder.cpp
View File

@ -15,6 +15,7 @@
#include "llvm/IR/IRBuilder.h" #include "llvm/IR/IRBuilder.h"
#include "llvm/IR/Function.h" #include "llvm/IR/Function.h"
#include "llvm/IR/GlobalVariable.h" #include "llvm/IR/GlobalVariable.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h" #include "llvm/IR/Intrinsics.h"
#include "llvm/IR/LLVMContext.h" #include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Statepoint.h" #include "llvm/IR/Statepoint.h"
@ -83,13 +84,16 @@ CreateMemSet(Value *Ptr, Value *Val, Value *Size, unsigned Align,
bool isVolatile, MDNode *TBAATag, MDNode *ScopeTag, bool isVolatile, MDNode *TBAATag, MDNode *ScopeTag,
MDNode *NoAliasTag) { MDNode *NoAliasTag) {
Ptr = getCastedInt8PtrValue(Ptr); Ptr = getCastedInt8PtrValue(Ptr);
Value *Ops[] = { Ptr, Val, Size, getInt32(Align), getInt1(isVolatile) }; Value *Ops[] = {Ptr, Val, Size, getInt1(isVolatile)};
Type *Tys[] = { Ptr->getType(), Size->getType() }; Type *Tys[] = { Ptr->getType(), Size->getType() };
Module *M = BB->getParent()->getParent(); Module *M = BB->getParent()->getParent();
Value *TheFn = Intrinsic::getDeclaration(M, Intrinsic::memset, Tys); Value *TheFn = Intrinsic::getDeclaration(M, Intrinsic::memset, Tys);
CallInst *CI = createCallHelper(TheFn, Ops, this); CallInst *CI = createCallHelper(TheFn, Ops, this);
if (Align > 0)
cast<MemSetInst>(CI)->setDestAlignment(Align);
// Set the TBAA info if present. // Set the TBAA info if present.
if (TBAATag) if (TBAATag)
CI->setMetadata(LLVMContext::MD_tbaa, TBAATag); CI->setMetadata(LLVMContext::MD_tbaa, TBAATag);
@ -99,7 +103,7 @@ CreateMemSet(Value *Ptr, Value *Val, Value *Size, unsigned Align,
if (NoAliasTag) if (NoAliasTag)
CI->setMetadata(LLVMContext::MD_noalias, NoAliasTag); CI->setMetadata(LLVMContext::MD_noalias, NoAliasTag);
return CI; return CI;
} }
@ -107,16 +111,20 @@ CallInst *IRBuilderBase::
CreateMemCpy(Value *Dst, Value *Src, Value *Size, unsigned Align, CreateMemCpy(Value *Dst, Value *Src, Value *Size, unsigned Align,
bool isVolatile, MDNode *TBAATag, MDNode *TBAAStructTag, bool isVolatile, MDNode *TBAATag, MDNode *TBAAStructTag,
MDNode *ScopeTag, MDNode *NoAliasTag) { MDNode *ScopeTag, MDNode *NoAliasTag) {
assert((Align == 0 || isPowerOf2_32(Align)) && "Must be 0 or a power of 2");
Dst = getCastedInt8PtrValue(Dst); Dst = getCastedInt8PtrValue(Dst);
Src = getCastedInt8PtrValue(Src); Src = getCastedInt8PtrValue(Src);
Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) }; Value *Ops[] = {Dst, Src, Size, getInt1(isVolatile)};
Type *Tys[] = { Dst->getType(), Src->getType(), Size->getType() }; Type *Tys[] = { Dst->getType(), Src->getType(), Size->getType() };
Module *M = BB->getParent()->getParent(); Module *M = BB->getParent()->getParent();
Value *TheFn = Intrinsic::getDeclaration(M, Intrinsic::memcpy, Tys); Value *TheFn = Intrinsic::getDeclaration(M, Intrinsic::memcpy, Tys);
CallInst *CI = createCallHelper(TheFn, Ops, this); CallInst *CI = createCallHelper(TheFn, Ops, this);
if (Align > 0)
cast<MemCpyInst>(CI)->setAlignment(Align);
// Set the TBAA info if present. // Set the TBAA info if present.
if (TBAATag) if (TBAATag)
CI->setMetadata(LLVMContext::MD_tbaa, TBAATag); CI->setMetadata(LLVMContext::MD_tbaa, TBAATag);
@ -130,7 +138,7 @@ CreateMemCpy(Value *Dst, Value *Src, Value *Size, unsigned Align,
if (NoAliasTag) if (NoAliasTag)
CI->setMetadata(LLVMContext::MD_noalias, NoAliasTag); CI->setMetadata(LLVMContext::MD_noalias, NoAliasTag);
return CI; return CI;
} }
@ -154,8 +162,9 @@ CallInst *IRBuilderBase::CreateElementUnorderedAtomicMemCpy(
CallInst *CI = createCallHelper(TheFn, Ops, this); CallInst *CI = createCallHelper(TheFn, Ops, this);
// Set the alignment of the pointer args. // Set the alignment of the pointer args.
CI->addParamAttr(0, Attribute::getWithAlignment(CI->getContext(), DstAlign)); auto *AMCI = cast<AtomicMemCpyInst>(CI);
CI->addParamAttr(1, Attribute::getWithAlignment(CI->getContext(), SrcAlign)); AMCI->setDestAlignment(DstAlign);
AMCI->setSourceAlignment(SrcAlign);
// Set the TBAA info if present. // Set the TBAA info if present.
if (TBAATag) if (TBAATag)
@ -178,16 +187,21 @@ CallInst *IRBuilderBase::
CreateMemMove(Value *Dst, Value *Src, Value *Size, unsigned Align, CreateMemMove(Value *Dst, Value *Src, Value *Size, unsigned Align,
bool isVolatile, MDNode *TBAATag, MDNode *ScopeTag, bool isVolatile, MDNode *TBAATag, MDNode *ScopeTag,
MDNode *NoAliasTag) { MDNode *NoAliasTag) {
assert((Align == 0 || isPowerOf2_32(Align)) && "Must be 0 or a power of 2");
Dst = getCastedInt8PtrValue(Dst); Dst = getCastedInt8PtrValue(Dst);
Src = getCastedInt8PtrValue(Src); Src = getCastedInt8PtrValue(Src);
Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) }; Value *Ops[] = {Dst, Src, Size, getInt1(isVolatile)};
Type *Tys[] = { Dst->getType(), Src->getType(), Size->getType() }; Type *Tys[] = { Dst->getType(), Src->getType(), Size->getType() };
Module *M = BB->getParent()->getParent(); Module *M = BB->getParent()->getParent();
Value *TheFn = Intrinsic::getDeclaration(M, Intrinsic::memmove, Tys); Value *TheFn = Intrinsic::getDeclaration(M, Intrinsic::memmove, Tys);
CallInst *CI = createCallHelper(TheFn, Ops, this); CallInst *CI = createCallHelper(TheFn, Ops, this);
auto *MMI = cast<MemMoveInst>(CI);
if (Align > 0)
MMI->setAlignment(Align);
// Set the TBAA info if present. // Set the TBAA info if present.
if (TBAATag) if (TBAATag)
CI->setMetadata(LLVMContext::MD_tbaa, TBAATag); CI->setMetadata(LLVMContext::MD_tbaa, TBAATag);

19
llvm/lib/IR/Verifier.cpp
View File

@ -4048,18 +4048,23 @@ void Verifier::visitIntrinsicCallSite(Intrinsic::ID ID, CallSite CS) {
case Intrinsic::memcpy: case Intrinsic::memcpy:
case Intrinsic::memmove: case Intrinsic::memmove:
case Intrinsic::memset: { case Intrinsic::memset: {
ConstantInt *AlignCI = dyn_cast<ConstantInt>(CS.getArgOperand(3));
Assert(AlignCI,
"alignment argument of memory intrinsics must be a constant int",
CS);
const auto *MI = cast<MemIntrinsic>(CS.getInstruction()); const auto *MI = cast<MemIntrinsic>(CS.getInstruction());
auto IsValidAlignment = [&](unsigned Alignment) -> bool { auto IsValidAlignment = [&](unsigned Alignment) -> bool {
return Alignment == 0 || isPowerOf2_32(Alignment); return Alignment == 0 || isPowerOf2_32(Alignment);
}; };
Assert(IsValidAlignment(MI->getAlignment()), Assert(IsValidAlignment(MI->getDestAlignment()),
"alignment argument of memory intrinsics must be 0 or a power of 2", "alignment of arg 0 of memory intrinsic must be 0 or a power of 2",
CS); CS);
Assert(isa<ConstantInt>(CS.getArgOperand(4)), if (const auto *MTI = dyn_cast<MemTransferInst>(MI)) {
Assert(IsValidAlignment(MTI->getSourceAlignment()),
"alignment of arg 1 of memory intrinsic must be 0 or a power of 2",
CS);
// TODO: Remove this assert when we enhance IRBuilder API to create
// memcpy/memmove with separate source & dest alignments.
Assert(MTI->getSourceAlignment() == MTI->getDestAlignment(),
"TEMPORARY: source and dest alignments must be the same");
}
Assert(isa<ConstantInt>(CS.getArgOperand(3)),
"isvolatile argument of memory intrinsics must be a constant int", "isvolatile argument of memory intrinsics must be a constant int",
CS); CS);
break; break;

4
llvm/lib/Target/AArch64/AArch64FastISel.cpp
View File

@ -3476,7 +3476,7 @@ bool AArch64FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
return false; return false;
const char *IntrMemName = isa<MemCpyInst>(II) ? "memcpy" : "memmove"; const char *IntrMemName = isa<MemCpyInst>(II) ? "memcpy" : "memmove";
return lowerCallTo(II, IntrMemName, II->getNumArgOperands() - 2); return lowerCallTo(II, IntrMemName, II->getNumArgOperands() - 1);
} }
case Intrinsic::memset: { case Intrinsic::memset: {
const MemSetInst *MSI = cast<MemSetInst>(II); const MemSetInst *MSI = cast<MemSetInst>(II);
@ -3492,7 +3492,7 @@ bool AArch64FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
// address spaces. // address spaces.
return false; return false;
return lowerCallTo(II, "memset", II->getNumArgOperands() - 2); return lowerCallTo(II, "memset", II->getNumArgOperands() - 1);
} }
case Intrinsic::sin: case Intrinsic::sin:
case Intrinsic::cos: case Intrinsic::cos:

4
llvm/lib/Target/ARM/ARMFastISel.cpp
View File

@ -2352,8 +2352,8 @@ bool ARMFastISel::SelectCall(const Instruction *I,
for (ImmutableCallSite::arg_iterator i = CS.arg_begin(), e = CS.arg_end(); for (ImmutableCallSite::arg_iterator i = CS.arg_begin(), e = CS.arg_end();
i != e; ++i) { i != e; ++i) {
// If we're lowering a memory intrinsic instead of a regular call, skip the // If we're lowering a memory intrinsic instead of a regular call, skip the
// last two arguments, which shouldn't be passed to the underlying function. // last argument, which shouldn't be passed to the underlying function.
if (IntrMemName && e-i <= 2) if (IntrMemName && e - i <= 1)
break; break;
ISD::ArgFlagsTy Flags; ISD::ArgFlagsTy Flags;

4
llvm/lib/Target/Mips/MipsFastISel.cpp
View File

@ -1628,7 +1628,7 @@ bool MipsFastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
if (!MTI->getLength()->getType()->isIntegerTy(32)) if (!MTI->getLength()->getType()->isIntegerTy(32))
return false; return false;
const char *IntrMemName = isa<MemCpyInst>(II) ? "memcpy" : "memmove"; const char *IntrMemName = isa<MemCpyInst>(II) ? "memcpy" : "memmove";
return lowerCallTo(II, IntrMemName, II->getNumArgOperands() - 2); return lowerCallTo(II, IntrMemName, II->getNumArgOperands() - 1);
} }
case Intrinsic::memset: { case Intrinsic::memset: {
const MemSetInst *MSI = cast<MemSetInst>(II); const MemSetInst *MSI = cast<MemSetInst>(II);
@ -1637,7 +1637,7 @@ bool MipsFastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
return false; return false;
if (!MSI->getLength()->getType()->isIntegerTy(32)) if (!MSI->getLength()->getType()->isIntegerTy(32))
return false; return false;
return lowerCallTo(II, "memset", II->getNumArgOperands() - 2); return lowerCallTo(II, "memset", II->getNumArgOperands() - 1);
} }
} }
return false; return false;

4
llvm/lib/Target/X86/X86FastISel.cpp
View File

@ -2726,7 +2726,7 @@ bool X86FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
if (MCI->getSourceAddressSpace() > 255 || MCI->getDestAddressSpace() > 255) if (MCI->getSourceAddressSpace() > 255 || MCI->getDestAddressSpace() > 255)
return false; return false;
return lowerCallTo(II, "memcpy", II->getNumArgOperands() - 2); return lowerCallTo(II, "memcpy", II->getNumArgOperands() - 1);
} }
case Intrinsic::memset: { case Intrinsic::memset: {
const MemSetInst *MSI = cast<MemSetInst>(II); const MemSetInst *MSI = cast<MemSetInst>(II);
@ -2741,7 +2741,7 @@ bool X86FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
if (MSI->getDestAddressSpace() > 255) if (MSI->getDestAddressSpace() > 255)
return false; return false;
return lowerCallTo(II, "memset", II->getNumArgOperands() - 2); return lowerCallTo(II, "memset", II->getNumArgOperands() - 1);
} }
case Intrinsic::stackprotector: { case Intrinsic::stackprotector: {
// Emit code to store the stack guard onto the stack. // Emit code to store the stack guard onto the stack.

1
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
View File

@ -189,6 +189,7 @@ Instruction *InstCombiner::SimplifyMemTransfer(MemIntrinsic *MI) {
unsigned MinAlign = std::min(DstAlign, SrcAlign); unsigned MinAlign = std::min(DstAlign, SrcAlign);
unsigned CopyAlign = MI->getAlignment(); unsigned CopyAlign = MI->getAlignment();
// FIXME: Check & simplify source & dest alignments separately
if (CopyAlign < MinAlign) { if (CopyAlign < MinAlign) {
MI->setAlignment(MinAlign); MI->setAlignment(MinAlign);
return MI; return MI;

21
llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
View File

@ -1382,20 +1382,19 @@ void DFSanVisitor::visitMemTransferInst(MemTransferInst &I) {
Value *LenShadow = IRB.CreateMul( Value *LenShadow = IRB.CreateMul(
I.getLength(), I.getLength(),
ConstantInt::get(I.getLength()->getType(), DFSF.DFS.ShadowWidth / 8)); ConstantInt::get(I.getLength()->getType(), DFSF.DFS.ShadowWidth / 8));
Value *AlignShadow;
if (ClPreserveAlignment) {
AlignShadow = IRB.CreateMul(I.getAlignmentCst(),
ConstantInt::get(I.getAlignmentType(),
DFSF.DFS.ShadowWidth / 8));
} else {
AlignShadow = ConstantInt::get(I.getAlignmentType(),
DFSF.DFS.ShadowWidth / 8);
}
Type *Int8Ptr = Type::getInt8PtrTy(*DFSF.DFS.Ctx); Type *Int8Ptr = Type::getInt8PtrTy(*DFSF.DFS.Ctx);
DestShadow = IRB.CreateBitCast(DestShadow, Int8Ptr); DestShadow = IRB.CreateBitCast(DestShadow, Int8Ptr);
SrcShadow = IRB.CreateBitCast(SrcShadow, Int8Ptr); SrcShadow = IRB.CreateBitCast(SrcShadow, Int8Ptr);
IRB.CreateCall(I.getCalledValue(), {DestShadow, SrcShadow, LenShadow, auto *MTI = cast<MemTransferInst>(
AlignShadow, I.getVolatileCst()}); IRB.CreateCall(I.getCalledValue(),
{DestShadow, SrcShadow, LenShadow, I.getVolatileCst()}));
// FIXME: Set the source & dest alignments of MTI based on the separate
// source & dest alignments of I
if (ClPreserveAlignment) {
MTI->setAlignment(I.getAlignment() * (DFSF.DFS.ShadowWidth / 8));
} else {
MTI->setAlignment(DFSF.DFS.ShadowWidth / 8);
}
} }
void DFSanVisitor::visitReturnInst(ReturnInst &RI) { void DFSanVisitor::visitReturnInst(ReturnInst &RI) {

20
llvm/test/Analysis/AliasSet/memtransfer.ll
View File

@ -14,7 +14,7 @@ entry:
%a = alloca i8, align 1 %a = alloca i8, align 1
%b = alloca i8, align 1 %b = alloca i8, align 1
store i8 1, i8* %a, align 1 store i8 1, i8* %a, align 1
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %d, i8* %s, i64 1, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %d, i8* %s, i64 1, i1 false)
store i8 1, i8* %b, align 1 store i8 1, i8* %b, align 1
ret void ret void
} }
@ -30,7 +30,7 @@ entry:
%a = alloca i8, align 1 %a = alloca i8, align 1
%b = alloca i8, align 1 %b = alloca i8, align 1
store i8 1, i8* %a, align 1 store i8 1, i8* %a, align 1
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %d, i8* %s, i64 1, i32 1, i1 true) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %d, i8* %s, i64 1, i1 true)
store i8 1, i8* %b, align 1 store i8 1, i8* %b, align 1
ret void ret void
} }
@ -46,7 +46,7 @@ entry:
%a = alloca i8, align 1 %a = alloca i8, align 1
%b = alloca i8, align 1 %b = alloca i8, align 1
store i8 1, i8* %a, align 1 store i8 1, i8* %a, align 1
call void @llvm.memmove.p0i8.p0i8.i64(i8* %d, i8* %s, i64 1, i32 1, i1 false) call void @llvm.memmove.p0i8.p0i8.i64(i8* %d, i8* %s, i64 1, i1 false)
store i8 1, i8* %b, align 1 store i8 1, i8* %b, align 1
ret void ret void
} }
@ -62,7 +62,7 @@ entry:
%a = alloca i8, align 1 %a = alloca i8, align 1
%b = alloca i8, align 1 %b = alloca i8, align 1
store i8 1, i8* %a, align 1 store i8 1, i8* %a, align 1
call void @llvm.memmove.p0i8.p0i8.i64(i8* %d, i8* %s, i64 1, i32 1, i1 true) call void @llvm.memmove.p0i8.p0i8.i64(i8* %d, i8* %s, i64 1, i1 true)
store i8 1, i8* %b, align 1 store i8 1, i8* %b, align 1
ret void ret void
} }
@ -76,7 +76,7 @@ entry:
%a = alloca i8, align 1 %a = alloca i8, align 1
%b = alloca i8, align 1 %b = alloca i8, align 1
store i8 1, i8* %a, align 1 store i8 1, i8* %a, align 1
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %b, i8* %a, i64 1, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %b, i8* %a, i64 1, i1 false)
store i8 1, i8* %b, align 1 store i8 1, i8* %b, align 1
ret void ret void
} }
@ -90,7 +90,7 @@ entry:
%a = alloca i8, align 1 %a = alloca i8, align 1
%b = alloca i8, align 1 %b = alloca i8, align 1
store i8 1, i8* %a, align 1 store i8 1, i8* %a, align 1
call void @llvm.memmove.p0i8.p0i8.i64(i8* %b, i8* %a, i64 1, i32 1, i1 false) call void @llvm.memmove.p0i8.p0i8.i64(i8* %b, i8* %a, i64 1, i1 false)
store i8 1, i8* %b, align 1 store i8 1, i8* %b, align 1
ret void ret void
} }
@ -104,11 +104,11 @@ entry:
%a = alloca i8, align 1 %a = alloca i8, align 1
%b = alloca i8, align 1 %b = alloca i8, align 1
store i8 1, i8* %a, align 1 store i8 1, i8* %a, align 1
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %b, i8* %a, i64 1, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %b, i8* %a, i64 1, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* %b, i64 1, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* %b, i64 1, i1 false)
store i8 1, i8* %b, align 1 store i8 1, i8* %b, align 1
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1)
declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1)

12
llvm/test/Analysis/BasicAA/assume.ll
View File

@ -1,12 +1,12 @@
; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output 2>&1 | FileCheck %s ; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output 2>&1 | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) #0 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) #0
declare void @llvm.assume(i1) #0 declare void @llvm.assume(i1) #0
define void @test1(i8* %P, i8* %Q) nounwind ssp { define void @test1(i8* %P, i8* %Q) nounwind ssp {
tail call void @llvm.assume(i1 true) tail call void @llvm.assume(i1 true)
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
ret void ret void
; CHECK-LABEL: Function: test1: ; CHECK-LABEL: Function: test1:
@ -14,10 +14,10 @@ define void @test1(i8* %P, i8* %Q) nounwind ssp {
; CHECK: MayAlias: i8* %P, i8* %Q ; CHECK: MayAlias: i8* %P, i8* %Q
; CHECK: NoModRef: Ptr: i8* %P <-> tail call void @llvm.assume(i1 true) ; CHECK: NoModRef: Ptr: i8* %P <-> tail call void @llvm.assume(i1 true)
; CHECK: NoModRef: Ptr: i8* %Q <-> tail call void @llvm.assume(i1 true) ; CHECK: NoModRef: Ptr: i8* %Q <-> tail call void @llvm.assume(i1 true)
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: NoModRef: tail call void @llvm.assume(i1 true) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: NoModRef: tail call void @llvm.assume(i1 true) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: NoModRef: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.assume(i1 true) ; CHECK: NoModRef: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.assume(i1 true)
} }
attributes #0 = { nounwind } attributes #0 = { nounwind }

212
llvm/test/Analysis/BasicAA/cs-cs.ll
View File

@ -2,48 +2,48 @@
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
target triple = "arm-apple-ios" target triple = "arm-apple-ios"
declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i32, i1) #0 declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1) #0
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i32, i1) #0 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1) #0
declare void @a_readonly_func(i8*) #1 declare void @a_readonly_func(i8*) #1
declare void @a_writeonly_func(i8*) #2 declare void @a_writeonly_func(i8*) #2
define void @test2(i8* %P, i8* %Q) #3 { define void @test2(i8* %P, i8* %Q) #3 {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
ret void ret void
; CHECK-LABEL: Function: test2: ; CHECK-LABEL: Function: test2:
; CHECK: MayAlias: i8* %P, i8* %Q ; CHECK: MayAlias: i8* %P, i8* %Q
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
} }
define void @test2a(i8* noalias %P, i8* noalias %Q) #3 { define void @test2a(i8* noalias %P, i8* noalias %Q) #3 {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
ret void ret void
; CHECK-LABEL: Function: test2a: ; CHECK-LABEL: Function: test2a:
; CHECK: NoAlias: i8* %P, i8* %Q ; CHECK: NoAlias: i8* %P, i8* %Q
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
} }
define void @test2b(i8* noalias %P, i8* noalias %Q) #3 { define void @test2b(i8* noalias %P, i8* noalias %Q) #3 {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
%R = getelementptr i8, i8* %P, i64 12 %R = getelementptr i8, i8* %P, i64 12
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
ret void ret void
; CHECK-LABEL: Function: test2b: ; CHECK-LABEL: Function: test2b:
@ -51,20 +51,20 @@ define void @test2b(i8* noalias %P, i8* noalias %Q) #3 {
; CHECK: NoAlias: i8* %P, i8* %Q ; CHECK: NoAlias: i8* %P, i8* %Q
; CHECK: NoAlias: i8* %P, i8* %R ; CHECK: NoAlias: i8* %P, i8* %R
; CHECK: NoAlias: i8* %Q, i8* %R ; CHECK: NoAlias: i8* %Q, i8* %R
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: NoModRef: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: NoModRef: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: NoModRef: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: NoModRef: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: NoModRef: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: NoModRef: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: NoModRef: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: NoModRef: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
} }
define void @test2c(i8* noalias %P, i8* noalias %Q) #3 { define void @test2c(i8* noalias %P, i8* noalias %Q) #3 {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
%R = getelementptr i8, i8* %P, i64 11 %R = getelementptr i8, i8* %P, i64 11
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
ret void ret void
; CHECK-LABEL: Function: test2c: ; CHECK-LABEL: Function: test2c:
@ -72,20 +72,20 @@ define void @test2c(i8* noalias %P, i8* noalias %Q) #3 {
; CHECK: NoAlias: i8* %P, i8* %Q ; CHECK: NoAlias: i8* %P, i8* %Q
; CHECK: NoAlias: i8* %P, i8* %R ; CHECK: NoAlias: i8* %P, i8* %R
; CHECK: NoAlias: i8* %Q, i8* %R ; CHECK: NoAlias: i8* %Q, i8* %R
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: NoModRef: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: NoModRef: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
} }
define void @test2d(i8* noalias %P, i8* noalias %Q) #3 { define void @test2d(i8* noalias %P, i8* noalias %Q) #3 {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
%R = getelementptr i8, i8* %P, i64 -12 %R = getelementptr i8, i8* %P, i64 -12
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
ret void ret void
; CHECK-LABEL: Function: test2d: ; CHECK-LABEL: Function: test2d:
@ -93,20 +93,20 @@ define void @test2d(i8* noalias %P, i8* noalias %Q) #3 {
; CHECK: NoAlias: i8* %P, i8* %Q ; CHECK: NoAlias: i8* %P, i8* %Q
; CHECK: NoAlias: i8* %P, i8* %R ; CHECK: NoAlias: i8* %P, i8* %R
; CHECK: NoAlias: i8* %Q, i8* %R ; CHECK: NoAlias: i8* %Q, i8* %R
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: NoModRef: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: NoModRef: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: NoModRef: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: NoModRef: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: NoModRef: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: NoModRef: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: NoModRef: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: NoModRef: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
} }
define void @test2e(i8* noalias %P, i8* noalias %Q) #3 { define void @test2e(i8* noalias %P, i8* noalias %Q) #3 {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
%R = getelementptr i8, i8* %P, i64 -11 %R = getelementptr i8, i8* %P, i64 -11
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
ret void ret void
; CHECK-LABEL: Function: test2e: ; CHECK-LABEL: Function: test2e:
@ -114,67 +114,67 @@ define void @test2e(i8* noalias %P, i8* noalias %Q) #3 {
; CHECK: NoAlias: i8* %P, i8* %Q ; CHECK: NoAlias: i8* %P, i8* %Q
; CHECK: NoAlias: i8* %P, i8* %R ; CHECK: NoAlias: i8* %P, i8* %R
; CHECK: NoAlias: i8* %Q, i8* %R ; CHECK: NoAlias: i8* %Q, i8* %R
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: NoModRef: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: NoModRef: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %R, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
} }
define void @test3(i8* %P, i8* %Q) #3 { define void @test3(i8* %P, i8* %Q) #3 {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i1 false)
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
ret void ret void
; CHECK-LABEL: Function: test3: ; CHECK-LABEL: Function: test3:
; CHECK: MayAlias: i8* %P, i8* %Q ; CHECK: MayAlias: i8* %P, i8* %Q
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i1 false)
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i1 false)
} }
define void @test3a(i8* noalias %P, i8* noalias %Q) #3 { define void @test3a(i8* noalias %P, i8* noalias %Q) #3 {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i1 false)
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
ret void ret void
; CHECK-LABEL: Function: test3a: ; CHECK-LABEL: Function: test3a:
; CHECK: NoAlias: i8* %P, i8* %Q ; CHECK: NoAlias: i8* %P, i8* %Q
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i1 false)
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 8, i1 false)
} }
define void @test4(i8* %P, i8* noalias %Q) #3 { define void @test4(i8* %P, i8* noalias %Q) #3 {
tail call void @llvm.memset.p0i8.i64(i8* %P, i8 42, i64 8, i32 1, i1 false) tail call void @llvm.memset.p0i8.i64(i8* %P, i8 42, i64 8, i1 false)
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
ret void ret void
; CHECK-LABEL: Function: test4: ; CHECK-LABEL: Function: test4:
; CHECK: NoAlias: i8* %P, i8* %Q ; CHECK: NoAlias: i8* %P, i8* %Q
; CHECK: Just Mod (MustAlias): Ptr: i8* %P <-> tail call void @llvm.memset.p0i8.i64(i8* %P, i8 42, i64 8, i32 1, i1 false) ; CHECK: Just Mod (MustAlias): Ptr: i8* %P <-> tail call void @llvm.memset.p0i8.i64(i8* %P, i8 42, i64 8, i1 false)
; CHECK: NoModRef: Ptr: i8* %Q <-> tail call void @llvm.memset.p0i8.i64(i8* %P, i8 42, i64 8, i32 1, i1 false) ; CHECK: NoModRef: Ptr: i8* %Q <-> tail call void @llvm.memset.p0i8.i64(i8* %P, i8 42, i64 8, i1 false)
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memset.p0i8.i64(i8* %P, i8 42, i64 8, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memset.p0i8.i64(i8* %P, i8 42, i64 8, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memset.p0i8.i64(i8* %P, i8 42, i64 8, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memset.p0i8.i64(i8* %P, i8 42, i64 8, i1 false)
} }
define void @test5(i8* %P, i8* %Q, i8* %R) #3 { define void @test5(i8* %P, i8* %Q, i8* %R) #3 {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i1 false)
ret void ret void
; CHECK-LABEL: Function: test5: ; CHECK-LABEL: Function: test5:
@ -182,19 +182,19 @@ define void @test5(i8* %P, i8* %Q, i8* %R) #3 {
; CHECK: MayAlias: i8* %P, i8* %Q ; CHECK: MayAlias: i8* %P, i8* %Q
; CHECK: MayAlias: i8* %P, i8* %R ; CHECK: MayAlias: i8* %P, i8* %R
; CHECK: MayAlias: i8* %Q, i8* %R ; CHECK: MayAlias: i8* %Q, i8* %R
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Both ModRef: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Both ModRef: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i1 false)
; CHECK: Both ModRef: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i32 1, i1 false) ; CHECK: Both ModRef: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
} }
define void @test5a(i8* noalias %P, i8* noalias %Q, i8* noalias %R) nounwind ssp { define void @test5a(i8* noalias %P, i8* noalias %Q, i8* noalias %R) nounwind ssp {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i1 false)
ret void ret void
; CHECK-LABEL: Function: test5a: ; CHECK-LABEL: Function: test5a:
@ -202,27 +202,27 @@ define void @test5a(i8* noalias %P, i8* noalias %Q, i8* noalias %R) nounwind ssp
; CHECK: NoAlias: i8* %P, i8* %Q ; CHECK: NoAlias: i8* %P, i8* %Q
; CHECK: NoAlias: i8* %P, i8* %R ; CHECK: NoAlias: i8* %P, i8* %R
; CHECK: NoAlias: i8* %Q, i8* %R ; CHECK: NoAlias: i8* %Q, i8* %R
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: NoModRef: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: NoModRef: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i1 false)
; CHECK: NoModRef: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i32 1, i1 false) ; CHECK: NoModRef: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %R <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i32 1, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %R, i64 12, i1 false) <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
} }
define void @test6(i8* %P) #3 { define void @test6(i8* %P) #3 {
call void @llvm.memset.p0i8.i64(i8* %P, i8 -51, i64 32, i32 8, i1 false) call void @llvm.memset.p0i8.i64(i8* align 8 %P, i8 -51, i64 32, i1 false)
call void @a_readonly_func(i8* %P) call void @a_readonly_func(i8* %P)
ret void ret void
; CHECK-LABEL: Function: test6: ; CHECK-LABEL: Function: test6:
; CHECK: Just Mod (MustAlias): Ptr: i8* %P <-> call void @llvm.memset.p0i8.i64(i8* %P, i8 -51, i64 32, i32 8, i1 false) ; CHECK: Just Mod (MustAlias): Ptr: i8* %P <-> call void @llvm.memset.p0i8.i64(i8* align 8 %P, i8 -51, i64 32, i1 false)
; CHECK: Just Ref: Ptr: i8* %P <-> call void @a_readonly_func(i8* %P) ; CHECK: Just Ref: Ptr: i8* %P <-> call void @a_readonly_func(i8* %P)
; CHECK: Just Mod: call void @llvm.memset.p0i8.i64(i8* %P, i8 -51, i64 32, i32 8, i1 false) <-> call void @a_readonly_func(i8* %P) ; CHECK: Just Mod: call void @llvm.memset.p0i8.i64(i8* align 8 %P, i8 -51, i64 32, i1 false) <-> call void @a_readonly_func(i8* %P)
; CHECK: Just Ref: call void @a_readonly_func(i8* %P) <-> call void @llvm.memset.p0i8.i64(i8* %P, i8 -51, i64 32, i32 8, i1 false) ; CHECK: Just Ref: call void @a_readonly_func(i8* %P) <-> call void @llvm.memset.p0i8.i64(i8* align 8 %P, i8 -51, i64 32, i1 false)
} }
define void @test7(i8* %P) #3 { define void @test7(i8* %P) #3 {

4
llvm/test/Analysis/BasicAA/gep-and-alias.ll
View File

@ -6,13 +6,13 @@ target triple = "i386-apple-macosx10.6.0"
; The load and store address in the loop body could alias so the load ; The load and store address in the loop body could alias so the load
; can't be hoisted above the store and out of the loop. ; can't be hoisted above the store and out of the loop.
declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i32, i1) declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1)
define i32 @foo(i32 %x, i32 %z, i32 %n) { define i32 @foo(i32 %x, i32 %z, i32 %n) {
entry: entry:
%pool = alloca [59 x i32], align 4 %pool = alloca [59 x i32], align 4
%tmp = bitcast [59 x i32]* %pool to i8* %tmp = bitcast [59 x i32]* %pool to i8*
call void @llvm.memset.p0i8.i32(i8* nonnull %tmp, i8 0, i32 236, i32 4, i1 false) call void @llvm.memset.p0i8.i32(i8* align 4 nonnull %tmp, i8 0, i32 236, i1 false)
%cmp3 = icmp eq i32 %n, 0 %cmp3 = icmp eq i32 %n, 0
br i1 %cmp3, label %for.end, label %for.body.lr.ph br i1 %cmp3, label %for.end, label %for.body.lr.ph

10
llvm/test/Analysis/BasicAA/getmodrefinfo-cs-cs.ll
View File

@ -12,15 +12,15 @@ define void @test0() {
ret void ret void
} }
; CHECK: NoModRef: call void @llvm.memset.p0i8.i64(i8* @A, i8 0, i64 1, i32 1, i1 false) <-> call void @llvm.memset.p0i8.i64(i8* @B, i8 0, i64 1, i32 1, i1 false) ; CHECK: NoModRef: call void @llvm.memset.p0i8.i64(i8* @A, i8 0, i64 1, i1 false) <-> call void @llvm.memset.p0i8.i64(i8* @B, i8 0, i64 1, i1 false)
; CHECK: NoModRef: call void @llvm.memset.p0i8.i64(i8* @B, i8 0, i64 1, i32 1, i1 false) <-> call void @llvm.memset.p0i8.i64(i8* @A, i8 0, i64 1, i32 1, i1 false) ; CHECK: NoModRef: call void @llvm.memset.p0i8.i64(i8* @B, i8 0, i64 1, i1 false) <-> call void @llvm.memset.p0i8.i64(i8* @A, i8 0, i64 1, i1 false)
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind
@A = external global i8 @A = external global i8
@B = external global i8 @B = external global i8
define void @test1() { define void @test1() {
call void @llvm.memset.p0i8.i64(i8* @A, i8 0, i64 1, i32 1, i1 false) call void @llvm.memset.p0i8.i64(i8* @A, i8 0, i64 1, i1 false)
call void @llvm.memset.p0i8.i64(i8* @B, i8 0, i64 1, i32 1, i1 false) call void @llvm.memset.p0i8.i64(i8* @B, i8 0, i64 1, i1 false)
ret void ret void
} }

12
llvm/test/Analysis/BasicAA/guards.ll
View File

@ -1,23 +1,23 @@
; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output 2>&1 | FileCheck %s ; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output 2>&1 | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) #0 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) #0
declare void @llvm.experimental.guard(i1, ...) declare void @llvm.experimental.guard(i1, ...)
declare void @unknown_but_readonly() readonly declare void @unknown_but_readonly() readonly
define void @test1(i8* %P, i8* %Q) { define void @test1(i8* %P, i8* %Q) {
tail call void(i1,...) @llvm.experimental.guard(i1 true) [ "deopt"() ] tail call void(i1,...) @llvm.experimental.guard(i1 true) [ "deopt"() ]
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
ret void ret void
; CHECK-LABEL: Function: test1: ; CHECK-LABEL: Function: test1:
; CHECK: Just Ref: Ptr: i8* %P <-> tail call void (i1, ...) @llvm.experimental.guard(i1 true) [ "deopt"() ] ; CHECK: Just Ref: Ptr: i8* %P <-> tail call void (i1, ...) @llvm.experimental.guard(i1 true) [ "deopt"() ]
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void (i1, ...) @llvm.experimental.guard(i1 true) [ "deopt"() ] ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void (i1, ...) @llvm.experimental.guard(i1 true) [ "deopt"() ]
; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Mod: Ptr: i8* %P <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: Ptr: i8* %Q <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Ref: tail call void (i1, ...) @llvm.experimental.guard(i1 true) [ "deopt"() ] <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) ; CHECK: Just Ref: tail call void (i1, ...) @llvm.experimental.guard(i1 true) [ "deopt"() ] <-> tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false)
; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) <-> tail call void (i1, ...) @llvm.experimental.guard(i1 true) [ "deopt"() ] ; CHECK: Just Mod: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i1 false) <-> tail call void (i1, ...) @llvm.experimental.guard(i1 true) [ "deopt"() ]
} }
define void @test2() { define void @test2() {

20
llvm/test/Analysis/BasicAA/modref.ll
View File

@ -11,7 +11,7 @@ define i32 @test0(i8* %P) {
store i32 0, i32* %A store i32 0, i32* %A
call void @llvm.memset.p0i8.i32(i8* %P, i8 0, i32 42, i32 1, i1 false) call void @llvm.memset.p0i8.i32(i8* %P, i8 0, i32 42, i1 false)
%B = load i32, i32* %A %B = load i32, i32* %A
ret i32 %B ret i32 %B
@ -27,7 +27,7 @@ define i8 @test1() {
store i8 2, i8* %B ;; Not written to by memcpy store i8 2, i8* %B ;; Not written to by memcpy
call void @llvm.memcpy.p0i8.p0i8.i8(i8* %A, i8* %B, i8 -1, i32 0, i1 false) call void @llvm.memcpy.p0i8.p0i8.i8(i8* %A, i8* %B, i8 -1, i1 false)
%C = load i8, i8* %B %C = load i8, i8* %B
ret i8 %C ret i8 %C
@ -38,7 +38,7 @@ define i8 @test2(i8* %P) {
; CHECK-LABEL: @test2 ; CHECK-LABEL: @test2
%P2 = getelementptr i8, i8* %P, i32 127 %P2 = getelementptr i8, i8* %P, i32 127
store i8 1, i8* %P2 ;; Not dead across memset store i8 1, i8* %P2 ;; Not dead across memset
call void @llvm.memset.p0i8.i8(i8* %P, i8 2, i8 127, i32 0, i1 false) call void @llvm.memset.p0i8.i8(i8* %P, i8 2, i8 127, i1 false)
%A = load i8, i8* %P2 %A = load i8, i8* %P2
ret i8 %A ret i8 %A
; CHECK: ret i8 1 ; CHECK: ret i8 1
@ -51,7 +51,7 @@ define i8 @test2a(i8* %P) {
;; FIXME: DSE isn't zapping this dead store. ;; FIXME: DSE isn't zapping this dead store.
store i8 1, i8* %P2 ;; Dead, clobbered by memset. store i8 1, i8* %P2 ;; Dead, clobbered by memset.
call void @llvm.memset.p0i8.i8(i8* %P, i8 2, i8 127, i32 0, i1 false) call void @llvm.memset.p0i8.i8(i8* %P, i8 2, i8 127, i1 false)
%A = load i8, i8* %P2 %A = load i8, i8* %P2
ret i8 %A ret i8 %A
; CHECK-NOT: load ; CHECK-NOT: load
@ -91,7 +91,7 @@ define void @test3a(i8* %P, i8 %X) {
define i32 @test4(i8* %P) { define i32 @test4(i8* %P) {
%tmp = load i32, i32* @G1 %tmp = load i32, i32* @G1
call void @llvm.memset.p0i8.i32(i8* bitcast ([4000 x i32]* @G2 to i8*), i8 0, i32 4000, i32 1, i1 false) call void @llvm.memset.p0i8.i32(i8* bitcast ([4000 x i32]* @G2 to i8*), i8 0, i32 4000, i1 false)
%tmp2 = load i32, i32* @G1 %tmp2 = load i32, i32* @G1
%sub = sub i32 %tmp2, %tmp %sub = sub i32 %tmp2, %tmp
ret i32 %sub ret i32 %sub
@ -106,7 +106,7 @@ define i32 @test4(i8* %P) {
; write to G1. ; write to G1.
define i32 @test5(i8* %P, i32 %Len) { define i32 @test5(i8* %P, i32 %Len) {
%tmp = load i32, i32* @G1 %tmp = load i32, i32* @G1
call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast ([4000 x i32]* @G2 to i8*), i8* bitcast (i32* @G1 to i8*), i32 %Len, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast ([4000 x i32]* @G2 to i8*), i8* bitcast (i32* @G1 to i8*), i32 %Len, i1 false)
%tmp2 = load i32, i32* @G1 %tmp2 = load i32, i32* @G1
%sub = sub i32 %tmp2, %tmp %sub = sub i32 %tmp2, %tmp
ret i32 %sub ret i32 %sub
@ -227,7 +227,7 @@ define i32 @test13(i32* %P, i32* %P2) {
; CHECK: ret i32 0 ; CHECK: ret i32 0
} }
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind
declare void @llvm.memset.p0i8.i8(i8* nocapture, i8, i8, i32, i1) nounwind declare void @llvm.memset.p0i8.i8(i8* nocapture, i8, i8, i1) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i8(i8* nocapture, i8* nocapture, i8, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i8(i8* nocapture, i8* nocapture, i8, i1) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind

4
llvm/test/Analysis/CallGraph/no-intrinsics.ll
View File

@ -3,10 +3,10 @@
; Check that intrinsics aren't added to the call graph ; Check that intrinsics aren't added to the call graph
declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i1)
define void @f(i8* %out, i8* %in) { define void @f(i8* %out, i8* %in) {
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %out, i8* %in, i32 100, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %out, i8* align 4 %in, i32 100, i1 false)
ret void ret void
} }

6
llvm/test/Analysis/ConstantFolding/gep-constanfolding-error.ll
View File

@ -43,10 +43,10 @@ entry:
%scevgep = getelementptr [6 x [6 x [7 x i8]]], [6 x [6 x [7 x i8]]]* @j, i32 0, i32 0, i32 %5, i32 %8 %scevgep = getelementptr [6 x [6 x [7 x i8]]], [6 x [6 x [7 x i8]]]* @j, i32 0, i32 0, i32 %5, i32 %8
%9 = add i32 %f.promoted, %smax %9 = add i32 %f.promoted, %smax
%10 = add i32 %9, 2 %10 = add i32 %9, 2
call void @llvm.memset.p0i8.i32(i8* %scevgep, i8 %conv6, i32 %10, i32 1, i1 false) call void @llvm.memset.p0i8.i32(i8* %scevgep, i8 %conv6, i32 %10, i1 false)
; CHECK: call void @llvm.memset.p0i8.i32(i8* getelementptr inbounds ([6 x [6 x [7 x i8]]], [6 x [6 x [7 x i8]]]* @j, i32 0, i{{32|64}} 5, i{{32|64}} 4, i32 1), i8 %conv6, i32 1, i32 1, i1 false) ; CHECK: call void @llvm.memset.p0i8.i32(i8* getelementptr inbounds ([6 x [6 x [7 x i8]]], [6 x [6 x [7 x i8]]]* @j, i32 0, i{{32|64}} 5, i{{32|64}} 4, i32 1), i8 %conv6, i32 1, i1 false)
; CHECK-NOT: call void @llvm.memset.p0i8.i32(i8* getelementptr ([6 x [6 x [7 x i8]]], [6 x [6 x [7 x i8]]]* @j, i64 1, i64 4, i64 4, i32 1) ; CHECK-NOT: call void @llvm.memset.p0i8.i32(i8* getelementptr ([6 x [6 x [7 x i8]]], [6 x [6 x [7 x i8]]]* @j, i64 1, i64 4, i64 4, i32 1)
ret i32 0 ret i32 0
} }
; Function Attrs: argmemonly nounwind ; Function Attrs: argmemonly nounwind
declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i32, i1) declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1)

2
llvm/test/Analysis/DependenceAnalysis/Preliminary.ll
View File

@ -696,4 +696,4 @@ while.end: ; preds = %while.end.loopexit,
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind

4
llvm/test/Analysis/GlobalsModRef/memset-escape.ll
View File

@ -22,7 +22,7 @@ entry:
%c = alloca [1 x i32], align 4 %c = alloca [1 x i32], align 4
store i32 0, i32* %retval, align 4 store i32 0, i32* %retval, align 4
%0 = bitcast [1 x i32]* %c to i8* %0 = bitcast [1 x i32]* %c to i8*
call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 4, i32 4, i1 false) call void @llvm.memset.p0i8.i64(i8* align 4 %0, i8 0, i64 4, i1 false)
store i32 1, i32* getelementptr inbounds ([3 x i32], [3 x i32]* @a, i64 0, i64 2), align 4 store i32 1, i32* getelementptr inbounds ([3 x i32], [3 x i32]* @a, i64 0, i64 2), align 4
store i32 0, i32* @b, align 4 store i32 0, i32* @b, align 4
br label %for.cond br label %for.cond
@ -59,7 +59,7 @@ if.end: ; preds = %for.end
} }
; Function Attrs: nounwind argmemonly ; Function Attrs: nounwind argmemonly
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind argmemonly declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind argmemonly
; Function Attrs: noreturn nounwind ; Function Attrs: noreturn nounwind
declare void @abort() noreturn nounwind declare void @abort() noreturn nounwind

2
llvm/test/Analysis/GlobalsModRef/no-escape.ll
View File

@ -59,7 +59,7 @@ for.end: ; preds = %for.cond
} }
; Function Attrs: nounwind argmemonly ; Function Attrs: nounwind argmemonly
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind argmemonly declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind argmemonly
; Function Attrs: noreturn nounwind ; Function Attrs: noreturn nounwind
declare void @abort() noreturn nounwind declare void @abort() noreturn nounwind

4
llvm/test/Analysis/GlobalsModRef/pr12351.ll
View File

@ -1,8 +1,8 @@
; RUN: opt < %s -basicaa -globals-aa -gvn -S -disable-verify | FileCheck %s ; RUN: opt < %s -basicaa -globals-aa -gvn -S -disable-verify | FileCheck %s
declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i1)
define void @foo(i8* %x, i8* %y) { define void @foo(i8* %x, i8* %y) {
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %x, i8* %y, i32 1, i32 1, i1 false); call void @llvm.memcpy.p0i8.p0i8.i32(i8* %x, i8* %y, i32 1, i1 false);
ret void ret void
} }

6
llvm/test/Analysis/GlobalsModRef/volatile-instrs.ll
View File

@ -10,7 +10,7 @@ target triple = "x86_64-apple-macosx10.8.0"
@.str = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1 @.str = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
declare i32 @printf(i8* nocapture, ...) nounwind declare i32 @printf(i8* nocapture, ...) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
; Make sure that the initial memcpy call does not go away ; Make sure that the initial memcpy call does not go away
@ -21,10 +21,10 @@ declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32,
define i32 @main() nounwind uwtable ssp { define i32 @main() nounwind uwtable ssp {
main_entry: main_entry:
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* bitcast (%struct.anon* @b to i8*), i8* bitcast (%struct.anon* @a to i8*), i64 12, i32 4, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 bitcast (%struct.anon* @b to i8*), i8* align 4 bitcast (%struct.anon* @a to i8*), i64 12, i1 false)
%0 = load volatile i32, i32* getelementptr inbounds (%struct.anon, %struct.anon* @b, i64 0, i32 0), align 4 %0 = load volatile i32, i32* getelementptr inbounds (%struct.anon, %struct.anon* @b, i64 0, i32 0), align 4
store i32 %0, i32* @c, align 4 store i32 %0, i32* @c, align 4
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* bitcast (%struct.anon* @b to i8*), i8* bitcast (%struct.anon* @a to i8*), i64 12, i32 4, i1 false) nounwind tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 bitcast (%struct.anon* @b to i8*), i8* align 4 bitcast (%struct.anon* @a to i8*), i64 12, i1 false) nounwind
%call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0) nounwind %call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0) nounwind
ret i32 0 ret i32 0
} }

8
llvm/test/Analysis/Lint/noalias-byval.ll
View File

@ -3,10 +3,10 @@
%s = type { i8 } %s = type { i8 }
; Function Attrs: argmemonly nounwind ; Function Attrs: argmemonly nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i32, i1) #0 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1) #0
; Function Attrs: argmemonly nounwind ; Function Attrs: argmemonly nounwind
declare void @llvm.memset.p0i8.i8.i32(i8* nocapture writeonly, i8, i32, i32, i1) #0 declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1) #0
declare void @f1(%s* noalias nocapture sret, %s* nocapture readnone) declare void @f1(%s* noalias nocapture sret, %s* nocapture readnone)
@ -16,7 +16,7 @@ entry:
%tmp = alloca %s %tmp = alloca %s
%0 = bitcast %s* %c to i8* %0 = bitcast %s* %c to i8*
%1 = bitcast %s* %tmp to i8* %1 = bitcast %s* %tmp to i8*
call void @llvm.memset.p0i8.i8.i32(i8* %0, i8 0, i32 1, i32 1, i1 false) call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 1, i1 false)
call void @f1(%s* sret %c, %s* %c) call void @f1(%s* sret %c, %s* %c)
ret void ret void
} }
@ -34,7 +34,7 @@ entry:
%tmp = alloca %s %tmp = alloca %s
%0 = bitcast %s* %c to i8* %0 = bitcast %s* %c to i8*
%1 = bitcast %s* %tmp to i8* %1 = bitcast %s* %tmp to i8*
call void @llvm.memset.p0i8.i8.i32(i8* %0, i8 0, i32 1, i32 1, i1 false) call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 1, i1 false)
call void @f3(%s* sret %c, %s* byval %c) call void @f3(%s* sret %c, %s* byval %c)
ret void ret void
} }

6
llvm/test/Analysis/MemorySSA/basicaa-memcpy.ll
View File

@ -1,16 +1,16 @@
; RUN: opt -disable-output -basicaa -print-memoryssa %s 2>&1 | FileCheck %s ; RUN: opt -disable-output -basicaa -print-memoryssa %s 2>&1 | FileCheck %s
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
define void @source_clobber(i8* %a, i8* %b) { define void @source_clobber(i8* %a, i8* %b) {
; CHECK-LABEL: @source_clobber( ; CHECK-LABEL: @source_clobber(
; CHECK-NEXT: ; 1 = MemoryDef(liveOnEntry) ; CHECK-NEXT: ; 1 = MemoryDef(liveOnEntry)
; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* %b, i64 128, i32 1, i1 false) ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* %b, i64 128, i1 false)
; CHECK-NEXT: ; MemoryUse(liveOnEntry) ; CHECK-NEXT: ; MemoryUse(liveOnEntry)
; CHECK-NEXT: [[X:%.*]] = load i8, i8* %b ; CHECK-NEXT: [[X:%.*]] = load i8, i8* %b
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* %b, i64 128, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* %b, i64 128, i1 false)
%x = load i8, i8* %b %x = load i8, i8* %b
ret void ret void
} }

12
llvm/test/Analysis/ScalarEvolution/avoid-smax-1.ll
View File

@ -172,7 +172,7 @@ bb23: ; preds = %bb24, %bb.nph
%55 = mul i32 %y.21, %w ; <i32> [#uses=1] %55 = mul i32 %y.21, %w ; <i32> [#uses=1]
%.sum5 = add i32 %55, %.sum3 ; <i32> [#uses=1] %.sum5 = add i32 %55, %.sum3 ; <i32> [#uses=1]
%56 = getelementptr i8, i8* %j, i32 %.sum5 ; <i8*> [#uses=1] %56 = getelementptr i8, i8* %j, i32 %.sum5 ; <i8*> [#uses=1]
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %56, i8* %54, i32 %w, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %56, i8* %54, i32 %w, i1 false)
%57 = add i32 %y.21, 1 ; <i32> [#uses=2] %57 = add i32 %y.21, 1 ; <i32> [#uses=2]
br label %bb24 br label %bb24
@ -189,7 +189,7 @@ bb26: ; preds = %bb24.bb26_crit_edge, %bb22
%60 = getelementptr i8, i8* %j, i32 %.sum4 ; <i8*> [#uses=1] %60 = getelementptr i8, i8* %j, i32 %.sum4 ; <i8*> [#uses=1]
%61 = mul i32 %x, %w ; <i32> [#uses=1] %61 = mul i32 %x, %w ; <i32> [#uses=1]
%62 = sdiv i32 %61, 2 ; <i32> [#uses=1] %62 = sdiv i32 %61, 2 ; <i32> [#uses=1]
tail call void @llvm.memset.p0i8.i32(i8* %60, i8 -128, i32 %62, i32 1, i1 false) tail call void @llvm.memset.p0i8.i32(i8* %60, i8 -128, i32 %62, i1 false)
ret void ret void
bb29: ; preds = %bb20, %entry bb29: ; preds = %bb20, %entry
@ -207,7 +207,7 @@ bb30: ; preds = %bb31, %bb.nph11
%67 = getelementptr i8, i8* %r, i32 %66 ; <i8*> [#uses=1] %67 = getelementptr i8, i8* %r, i32 %66 ; <i8*> [#uses=1]
%68 = mul i32 %y.310, %w ; <i32> [#uses=1] %68 = mul i32 %y.310, %w ; <i32> [#uses=1]
%69 = getelementptr i8, i8* %j, i32 %68 ; <i8*> [#uses=1] %69 = getelementptr i8, i8* %j, i32 %68 ; <i8*> [#uses=1]
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %69, i8* %67, i32 %w, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %69, i8* %67, i32 %w, i1 false)
%70 = add i32 %y.310, 1 ; <i32> [#uses=2] %70 = add i32 %y.310, 1 ; <i32> [#uses=2]
br label %bb31 br label %bb31
@ -223,12 +223,12 @@ bb33: ; preds = %bb31.bb33_crit_edge, %bb29
%73 = getelementptr i8, i8* %j, i32 %72 ; <i8*> [#uses=1] %73 = getelementptr i8, i8* %j, i32 %72 ; <i8*> [#uses=1]
%74 = mul i32 %x, %w ; <i32> [#uses=1] %74 = mul i32 %x, %w ; <i32> [#uses=1]
%75 = sdiv i32 %74, 2 ; <i32> [#uses=1] %75 = sdiv i32 %74, 2 ; <i32> [#uses=1]
tail call void @llvm.memset.p0i8.i32(i8* %73, i8 -128, i32 %75, i32 1, i1 false) tail call void @llvm.memset.p0i8.i32(i8* %73, i8 -128, i32 %75, i1 false)
ret void ret void
return: ; preds = %bb20 return: ; preds = %bb20
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind

4
llvm/test/Analysis/ScalarEvolution/trip-count.ll
View File

@ -41,7 +41,7 @@ define i32 @test2() {
entry: entry:
%bins = alloca [16 x i64], align 16 %bins = alloca [16 x i64], align 16
%0 = bitcast [16 x i64]* %bins to i8* %0 = bitcast [16 x i64]* %bins to i8*
call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 128, i32 16, i1 false) call void @llvm.memset.p0i8.i64(i8* align 16 %0, i8 0, i64 128, i1 false)
br label %preheader br label %preheader
preheader: ; preds = %for.inc.1, %entry preheader: ; preds = %for.inc.1, %entry
@ -88,7 +88,7 @@ for.inc.1: ; preds = %for.body.1, %for.in
} }
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) #0 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) #0
declare void @may_exit() nounwind declare void @may_exit() nounwind

6
llvm/test/Analysis/ScalarEvolution/trip-count3.ll
View File

@ -50,7 +50,7 @@ sha_update.exit.exitStub: ; preds = %bb3.i
bb2.i: ; preds = %bb3.i bb2.i: ; preds = %bb3.i
%1 = getelementptr %struct.SHA_INFO, %struct.SHA_INFO* %sha_info, i64 0, i32 3 %1 = getelementptr %struct.SHA_INFO, %struct.SHA_INFO* %sha_info, i64 0, i32 3
%2 = bitcast [16 x i32]* %1 to i8* %2 = bitcast [16 x i32]* %1 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %2, i8* %buffer_addr.0.i, i64 64, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %2, i8* %buffer_addr.0.i, i64 64, i1 false)
%3 = getelementptr %struct.SHA_INFO, %struct.SHA_INFO* %sha_info, i64 0, i32 3, i64 0 %3 = getelementptr %struct.SHA_INFO, %struct.SHA_INFO* %sha_info, i64 0, i32 3, i64 0
%4 = bitcast i32* %3 to i8* %4 = bitcast i32* %3 to i8*
br label %codeRepl br label %codeRepl
@ -74,7 +74,7 @@ bb3.i: ; preds = %byte_reverse.exit.i
declare void @sha_stream_bb3_2E_i_bb1_2E_i_2E_i(i8*) nounwind declare void @sha_stream_bb3_2E_i_bb1_2E_i_2E_i(i8*) nounwind
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind

6
llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
View File

@ -45,13 +45,13 @@ define void @test1_no(i32* %p) nounwind {
; CHECK: define void @test2_yes(i8* nocapture %p, i8* nocapture %q, i64 %n) #4 { ; CHECK: define void @test2_yes(i8* nocapture %p, i8* nocapture %q, i64 %n) #4 {
define void @test2_yes(i8* %p, i8* %q, i64 %n) nounwind { define void @test2_yes(i8* %p, i8* %q, i64 %n) nounwind {
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 %n, i32 1, i1 false), !tbaa !1 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 %n, i1 false), !tbaa !1
ret void ret void
} }
; CHECK: define void @test2_no(i8* nocapture %p, i8* nocapture readonly %q, i64 %n) #3 { ; CHECK: define void @test2_no(i8* nocapture %p, i8* nocapture readonly %q, i64 %n) #3 {
define void @test2_no(i8* %p, i8* %q, i64 %n) nounwind { define void @test2_no(i8* %p, i8* %q, i64 %n) nounwind {
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 %n, i32 1, i1 false), !tbaa !2 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 %n, i1 false), !tbaa !2
ret void ret void
} }
@ -70,7 +70,7 @@ define i32 @test3_no(i8* %p) nounwind {
} }
declare void @callee(i32* %p) nounwind declare void @callee(i32* %p) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i1) nounwind
; CHECK: attributes #0 = { norecurse nounwind readnone } ; CHECK: attributes #0 = { norecurse nounwind readnone }
; CHECK: attributes #1 = { norecurse nounwind } ; CHECK: attributes #1 = { norecurse nounwind }

8
llvm/test/Analysis/TypeBasedAliasAnalysis/memcpyopt.ll
View File

@ -6,17 +6,17 @@ target datalayout = "e-p:64:64:64"
; it has a TBAA tag which declares that it is unrelated. ; it has a TBAA tag which declares that it is unrelated.
; CHECK: @foo ; CHECK: @foo
; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 16, i32 1, i1 false), !tbaa !0 ; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %p, i8* align 1 %q, i64 16, i1 false), !tbaa !0
; CHECK-NEXT: store i8 2, i8* %s, align 1, !tbaa [[TAGA:!.*]] ; CHECK-NEXT: store i8 2, i8* %s, align 1, !tbaa [[TAGA:!.*]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
define void @foo(i8* nocapture %p, i8* nocapture %q, i8* nocapture %s) nounwind { define void @foo(i8* nocapture %p, i8* nocapture %q, i8* nocapture %s) nounwind {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 16, i32 1, i1 false), !tbaa !2 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 16, i1 false), !tbaa !2
store i8 2, i8* %s, align 1, !tbaa !1 store i8 2, i8* %s, align 1, !tbaa !1
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %q, i8* %p, i64 16, i32 1, i1 false), !tbaa !2 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %q, i8* %p, i64 16, i1 false), !tbaa !2
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
; CHECK: [[TAGA]] = !{[[TYPEA:!.*]], [[TYPEA]], i64 0} ; CHECK: [[TAGA]] = !{[[TYPEA:!.*]], [[TYPEA]], i64 0}
; CHECK: [[TYPEA]] = !{!"A", !{{.*}}} ; CHECK: [[TYPEA]] = !{!"A", !{{.*}}}

6
llvm/test/Bitcode/standardCIntrinsic.3.2.ll
View File

@ -7,10 +7,10 @@
define void @memcpyintrinsic(i8* %dest, i8* %src, i32 %len) { define void @memcpyintrinsic(i8* %dest, i8* %src, i32 %len) {
entry: entry:
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %len, i32 1, i1 true) ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %dest, i8* align 1 %src, i32 %len, i1 true)
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %len, i32 1, i1 true) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %len, i1 true)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %len, i32 %align, i1 %isvolatile) declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i1)

36
llvm/test/Bitcode/upgrade-memory-intrinsics.ll Normal file
View File

@ -0,0 +1,36 @@
; RUN: opt -S < %s | FileCheck %s
; Test to ensure that calls to the memcpy/memmove/memset intrinsics are auto-upgraded
; to remove the alignment parameter in favour of align attributes on the pointer args.
; Make sure a non-zero alignment is propagated
define void @test(i8* %p1, i8* %p2, i8* %p3) {
; CHECK-LABEL: @test
; CHECK: call void @llvm.memset.p0i8.i64(i8* align 4 %p1, i8 55, i64 100, i1 false)
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %p1, i8* align 4 %p2, i64 50, i1 false)
; CHECK: call void @llvm.memmove.p0i8.p0i8.i64(i8* align 4 %p2, i8* align 4 %p3, i64 1000, i1 false)
call void @llvm.memset.p0i8.i64(i8* %p1, i8 55, i64 100, i32 4, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p1, i8* %p2, i64 50, i32 4, i1 false)
call void @llvm.memmove.p0i8.p0i8.i64(i8* %p2, i8* %p3, i64 1000, i32 4, i1 false)
ret void
}
; Make sure that a zero alignment is handled properly
define void @test2(i8* %p1, i8* %p2, i8* %p3) {
; CHECK-LABEL: @test
; CHECK: call void @llvm.memset.p0i8.i64(i8* %p1, i8 55, i64 100, i1 false)
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p1, i8* %p2, i64 50, i1 false)
; CHECK: call void @llvm.memmove.p0i8.p0i8.i64(i8* %p2, i8* %p3, i64 1000, i1 false)
call void @llvm.memset.p0i8.i64(i8* %p1, i8 55, i64 100, i32 0, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p1, i8* %p2, i64 50, i32 0, i1 false)
call void @llvm.memmove.p0i8.p0i8.i64(i8* %p2, i8* %p3, i64 1000, i32 0, i1 false)
ret void
}
; CHECK: declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1)
; CHECK: declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1)
; CHECK: declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1)
declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i32, i1)
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly , i8* nocapture readonly, i64, i32, i1)
declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1)

12
llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
View File

@ -1147,7 +1147,7 @@ define void()* @test_global_func() {
ret void()* @allocai64 ret void()* @allocai64
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i32 %align, i1 %volatile) declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i1)
define void @test_memcpy(i8* %dst, i8* %src, i64 %size) { define void @test_memcpy(i8* %dst, i8* %src, i64 %size) {
; CHECK-LABEL: name: test_memcpy ; CHECK-LABEL: name: test_memcpy
; CHECK: [[DST:%[0-9]+]]:_(p0) = COPY %x0 ; CHECK: [[DST:%[0-9]+]]:_(p0) = COPY %x0
@ -1157,11 +1157,11 @@ define void @test_memcpy(i8* %dst, i8* %src, i64 %size) {
; CHECK: %x1 = COPY [[SRC]] ; CHECK: %x1 = COPY [[SRC]]
; CHECK: %x2 = COPY [[SIZE]] ; CHECK: %x2 = COPY [[SIZE]]
; CHECK: BL &memcpy, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit %x1, implicit %x2 ; CHECK: BL &memcpy, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit %x1, implicit %x2
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %src, i64 %size, i32 1, i1 0) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %src, i64 %size, i1 0)
ret void ret void
} }
declare void @llvm.memmove.p0i8.p0i8.i64(i8*, i8*, i64, i32 %align, i1 %volatile) declare void @llvm.memmove.p0i8.p0i8.i64(i8*, i8*, i64, i1)
define void @test_memmove(i8* %dst, i8* %src, i64 %size) { define void @test_memmove(i8* %dst, i8* %src, i64 %size) {
; CHECK-LABEL: name: test_memmove ; CHECK-LABEL: name: test_memmove
; CHECK: [[DST:%[0-9]+]]:_(p0) = COPY %x0 ; CHECK: [[DST:%[0-9]+]]:_(p0) = COPY %x0
@ -1171,11 +1171,11 @@ define void @test_memmove(i8* %dst, i8* %src, i64 %size) {
; CHECK: %x1 = COPY [[SRC]] ; CHECK: %x1 = COPY [[SRC]]
; CHECK: %x2 = COPY [[SIZE]] ; CHECK: %x2 = COPY [[SIZE]]
; CHECK: BL &memmove, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit %x1, implicit %x2 ; CHECK: BL &memmove, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit %x1, implicit %x2
call void @llvm.memmove.p0i8.p0i8.i64(i8* %dst, i8* %src, i64 %size, i32 1, i1 0) call void @llvm.memmove.p0i8.p0i8.i64(i8* %dst, i8* %src, i64 %size, i1 0)
ret void ret void
} }
declare void @llvm.memset.p0i8.i64(i8*, i8, i64, i32 %align, i1 %volatile) declare void @llvm.memset.p0i8.i64(i8*, i8, i64, i1)
define void @test_memset(i8* %dst, i8 %val, i64 %size) { define void @test_memset(i8* %dst, i8 %val, i64 %size) {
; CHECK-LABEL: name: test_memset ; CHECK-LABEL: name: test_memset
; CHECK: [[DST:%[0-9]+]]:_(p0) = COPY %x0 ; CHECK: [[DST:%[0-9]+]]:_(p0) = COPY %x0
@ -1187,7 +1187,7 @@ define void @test_memset(i8* %dst, i8 %val, i64 %size) {
; CHECK: %w1 = COPY [[SRC_TMP]] ; CHECK: %w1 = COPY [[SRC_TMP]]
; CHECK: %x2 = COPY [[SIZE]] ; CHECK: %x2 = COPY [[SIZE]]
; CHECK: BL &memset, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit %w1, implicit %x2 ; CHECK: BL &memset, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit %w1, implicit %x2
call void @llvm.memset.p0i8.i64(i8* %dst, i8 %val, i64 %size, i32 1, i1 0) call void @llvm.memset.p0i8.i64(i8* %dst, i8 %val, i64 %size, i1 0)
ret void ret void
} }

4
llvm/test/CodeGen/AArch64/PBQP-csr.ll
View File

@ -22,7 +22,7 @@ entry:
%z.i60 = getelementptr inbounds %rs, %rs* %r, i64 0, i32 9, i32 2 %z.i60 = getelementptr inbounds %rs, %rs* %r, i64 0, i32 9, i32 2
%na = getelementptr inbounds %rs, %rs* %r, i64 0, i32 0 %na = getelementptr inbounds %rs, %rs* %r, i64 0, i32 0
%0 = bitcast double* %x.i to i8* %0 = bitcast double* %x.i to i8*
call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 72, i32 8, i1 false) call void @llvm.memset.p0i8.i64(i8* align 8 %0, i8 0, i64 72, i1 false)
%1 = load i32, i32* %na, align 4 %1 = load i32, i32* %na, align 4
%cmp70 = icmp sgt i32 %1, 0 %cmp70 = icmp sgt i32 %1, 0
br i1 %cmp70, label %for.body.lr.ph, label %for.end br i1 %cmp70, label %for.body.lr.ph, label %for.end
@ -87,5 +87,5 @@ for.end: ; preds = %for.end.loopexit, %
} }
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1)

6
llvm/test/CodeGen/AArch64/aarch64-DAGCombine-findBetterNeighborChains-crash.ll
View File

@ -6,13 +6,13 @@ target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
declare void @extern(i8*) declare void @extern(i8*)
; Function Attrs: argmemonly nounwind ; Function Attrs: argmemonly nounwind
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) #0 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) #0
; Function Attrs: nounwind ; Function Attrs: nounwind
define void @func(float* noalias %arg, i32* noalias %arg1, i8* noalias %arg2, i8* noalias %arg3) #1 { define void @func(float* noalias %arg, i32* noalias %arg1, i8* noalias %arg2, i8* noalias %arg3) #1 {
bb: bb:
%tmp = getelementptr inbounds i8, i8* %arg2, i64 88 %tmp = getelementptr inbounds i8, i8* %arg2, i64 88
tail call void @llvm.memset.p0i8.i64(i8* noalias %arg2, i8 0, i64 40, i32 8, i1 false) tail call void @llvm.memset.p0i8.i64(i8* align 8 noalias %arg2, i8 0, i64 40, i1 false)
store i8 0, i8* %arg3 store i8 0, i8* %arg3
store i8 2, i8* %arg2 store i8 2, i8* %arg2
store float 0.000000e+00, float* %arg store float 0.000000e+00, float* %arg
@ -27,7 +27,7 @@ bb:
define void @func2(float* noalias %arg, i32* noalias %arg1, i8* noalias %arg2, i8* noalias %arg3) #1 { define void @func2(float* noalias %arg, i32* noalias %arg1, i8* noalias %arg2, i8* noalias %arg3) #1 {
bb: bb:
%tmp = getelementptr inbounds i8, i8* %arg2, i64 88 %tmp = getelementptr inbounds i8, i8* %arg2, i64 88
tail call void @llvm.memset.p0i8.i64(i8* noalias %arg2, i8 0, i64 40, i32 8, i1 false) tail call void @llvm.memset.p0i8.i64(i8* align 8 noalias %arg2, i8 0, i64 40, i1 false)
store i8 0, i8* %arg3 store i8 0, i8* %arg3
store i8 2, i8* %arg2 store i8 2, i8* %arg2
store float 0.000000e+00, float* %arg store float 0.000000e+00, float* %arg

4
llvm/test/CodeGen/AArch64/arm64-2012-05-07-MemcpyAlignBug.ll
View File

@ -14,8 +14,8 @@
; CHECK-NEXT: str [[VAL2]], [x0] ; CHECK-NEXT: str [[VAL2]], [x0]
define void @foo(i8* %a) { define void @foo(i8* %a) {
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast ([3 x i32]* @b to i8*), i64 12, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %a, i8* align 4 bitcast ([3 x i32]* @b to i8*), i64 12, i1 false)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind

4
llvm/test/CodeGen/AArch64/arm64-abi-varargs.ll
View File

@ -164,10 +164,10 @@ entry:
%4 = bitcast i8* %ap.align to %struct.s41* %4 = bitcast i8* %ap.align to %struct.s41*
%5 = bitcast %struct.s41* %vs to i8* %5 = bitcast %struct.s41* %vs to i8*
%6 = bitcast %struct.s41* %4 to i8* %6 = bitcast %struct.s41* %4 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %5, i8* %6, i64 16, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %5, i8* align 16 %6, i64 16, i1 false)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
define void @bar2(i32 %x, i128 %s41.coerce) nounwind { define void @bar2(i32 %x, i128 %s41.coerce) nounwind {
entry: entry:

18
llvm/test/CodeGen/AArch64/arm64-abi_align.ll
View File

@ -300,14 +300,14 @@ entry:
%tmp = alloca %struct.s42, align 4 %tmp = alloca %struct.s42, align 4
%tmp1 = alloca %struct.s42, align 4 %tmp1 = alloca %struct.s42, align 4
%0 = bitcast %struct.s42* %tmp to i8* %0 = bitcast %struct.s42* %tmp to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* bitcast (%struct.s42* @g42 to i8*), i64 24, i32 4, i1 false), !tbaa.struct !4 call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 bitcast (%struct.s42* @g42 to i8*), i64 24, i1 false), !tbaa.struct !4
%1 = bitcast %struct.s42* %tmp1 to i8* %1 = bitcast %struct.s42* %tmp1 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* bitcast (%struct.s42* @g42_2 to i8*), i64 24, i32 4, i1 false), !tbaa.struct !4 call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %1, i8* align 4 bitcast (%struct.s42* @g42_2 to i8*), i64 24, i1 false), !tbaa.struct !4
%call = call i32 @f42(i32 3, %struct.s42* %tmp, %struct.s42* %tmp1) #5 %call = call i32 @f42(i32 3, %struct.s42* %tmp, %struct.s42* %tmp1) #5
ret i32 %call ret i32 %call
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) #4 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) #4
declare i32 @f42_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, declare i32 @f42_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6,
i32 %i7, i32 %i8, i32 %i9, %struct.s42* nocapture %s1, i32 %i7, i32 %i8, i32 %i9, %struct.s42* nocapture %s1,
@ -346,9 +346,9 @@ entry:
%tmp = alloca %struct.s42, align 4 %tmp = alloca %struct.s42, align 4
%tmp1 = alloca %struct.s42, align 4 %tmp1 = alloca %struct.s42, align 4
%0 = bitcast %struct.s42* %tmp to i8* %0 = bitcast %struct.s42* %tmp to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* bitcast (%struct.s42* @g42 to i8*), i64 24, i32 4, i1 false), !tbaa.struct !4 call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 bitcast (%struct.s42* @g42 to i8*), i64 24, i1 false), !tbaa.struct !4
%1 = bitcast %struct.s42* %tmp1 to i8* %1 = bitcast %struct.s42* %tmp1 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* bitcast (%struct.s42* @g42_2 to i8*), i64 24, i32 4, i1 false), !tbaa.struct !4 call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %1, i8* align 4 bitcast (%struct.s42* @g42_2 to i8*), i64 24, i1 false), !tbaa.struct !4
%call = call i32 @f42_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, %call = call i32 @f42_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7,
i32 8, i32 9, %struct.s42* %tmp, %struct.s42* %tmp1) #5 i32 8, i32 9, %struct.s42* %tmp, %struct.s42* %tmp1) #5
ret i32 %call ret i32 %call
@ -414,9 +414,9 @@ entry:
%tmp = alloca %struct.s43, align 16 %tmp = alloca %struct.s43, align 16
%tmp1 = alloca %struct.s43, align 16 %tmp1 = alloca %struct.s43, align 16
%0 = bitcast %struct.s43* %tmp to i8* %0 = bitcast %struct.s43* %tmp to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* bitcast (%struct.s43* @g43 to i8*), i64 32, i32 16, i1 false), !tbaa.struct !4 call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %0, i8* align 16 bitcast (%struct.s43* @g43 to i8*), i64 32, i1 false), !tbaa.struct !4
%1 = bitcast %struct.s43* %tmp1 to i8* %1 = bitcast %struct.s43* %tmp1 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* bitcast (%struct.s43* @g43_2 to i8*), i64 32, i32 16, i1 false), !tbaa.struct !4 call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %1, i8* align 16 bitcast (%struct.s43* @g43_2 to i8*), i64 32, i1 false), !tbaa.struct !4
%call = call i32 @f43(i32 3, %struct.s43* %tmp, %struct.s43* %tmp1) #5 %call = call i32 @f43(i32 3, %struct.s43* %tmp, %struct.s43* %tmp1) #5
ret i32 %call ret i32 %call
} }
@ -465,9 +465,9 @@ entry:
%tmp = alloca %struct.s43, align 16 %tmp = alloca %struct.s43, align 16
%tmp1 = alloca %struct.s43, align 16 %tmp1 = alloca %struct.s43, align 16
%0 = bitcast %struct.s43* %tmp to i8* %0 = bitcast %struct.s43* %tmp to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* bitcast (%struct.s43* @g43 to i8*), i64 32, i32 16, i1 false), !tbaa.struct !4 call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %0, i8* align 16 bitcast (%struct.s43* @g43 to i8*), i64 32, i1 false), !tbaa.struct !4
%1 = bitcast %struct.s43* %tmp1 to i8* %1 = bitcast %struct.s43* %tmp1 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* bitcast (%struct.s43* @g43_2 to i8*), i64 32, i32 16, i1 false), !tbaa.struct !4 call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %1, i8* align 16 bitcast (%struct.s43* @g43_2 to i8*), i64 32, i1 false), !tbaa.struct !4
%call = call i32 @f43_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, %call = call i32 @f43_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7,
i32 8, i32 9, %struct.s43* %tmp, %struct.s43* %tmp1) #5 i32 8, i32 9, %struct.s43* %tmp, %struct.s43* %tmp1) #5
ret i32 %call ret i32 %call

24
llvm/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll
View File

@ -11,11 +11,11 @@ define void @t1() {
; ARM64: mov x2, #80 ; ARM64: mov x2, #80
; ARM64: uxtb w1, w9 ; ARM64: uxtb w1, w9
; ARM64: bl _memset ; ARM64: bl _memset
call void @llvm.memset.p0i8.i64(i8* getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i8 0, i64 80, i32 16, i1 false) call void @llvm.memset.p0i8.i64(i8* align 16 getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i8 0, i64 80, i1 false)
ret void ret void
} }
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1)
define void @t2() { define void @t2() {
; ARM64-LABEL: t2 ; ARM64-LABEL: t2
@ -25,11 +25,11 @@ define void @t2() {
; ARM64: add x1, x8, _message@PAGEOFF ; ARM64: add x1, x8, _message@PAGEOFF
; ARM64: mov x2, #80 ; ARM64: mov x2, #80
; ARM64: bl _memcpy ; ARM64: bl _memcpy
call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8], [80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i64 80, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 getelementptr inbounds ([80 x i8], [80 x i8]* @temp, i32 0, i32 0), i8* align 16 getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i64 80, i1 false)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1)
define void @t3() { define void @t3() {
; ARM64-LABEL: t3 ; ARM64-LABEL: t3
@ -39,11 +39,11 @@ define void @t3() {
; ARM64: add x1, x8, _message@PAGEOFF ; ARM64: add x1, x8, _message@PAGEOFF
; ARM64: mov x2, #20 ; ARM64: mov x2, #20
; ARM64: bl _memmove ; ARM64: bl _memmove
call void @llvm.memmove.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8], [80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i64 20, i32 16, i1 false) call void @llvm.memmove.p0i8.p0i8.i64(i8* align 16 getelementptr inbounds ([80 x i8], [80 x i8]* @temp, i32 0, i32 0), i8* align 16 getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i64 20, i1 false)
ret void ret void
} }
declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1)
define void @t4() { define void @t4() {
; ARM64-LABEL: t4 ; ARM64-LABEL: t4
@ -58,7 +58,7 @@ define void @t4() {
; ARM64: ldrb w11, [x9, #16] ; ARM64: ldrb w11, [x9, #16]
; ARM64: strb w11, [x8, #16] ; ARM64: strb w11, [x8, #16]
; ARM64: ret ; ARM64: ret
call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8], [80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i64 17, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 getelementptr inbounds ([80 x i8], [80 x i8]* @temp, i32 0, i32 0), i8* align 16 getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i64 17, i1 false)
ret void ret void
} }
@ -75,7 +75,7 @@ define void @t5() {
; ARM64: ldrb w11, [x9, #16] ; ARM64: ldrb w11, [x9, #16]
; ARM64: strb w11, [x8, #16] ; ARM64: strb w11, [x8, #16]
; ARM64: ret ; ARM64: ret
call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8], [80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i64 17, i32 8, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 getelementptr inbounds ([80 x i8], [80 x i8]* @temp, i32 0, i32 0), i8* align 8 getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i64 17, i1 false)
ret void ret void
} }
@ -92,7 +92,7 @@ define void @t6() {
; ARM64: ldrb w10, [x9, #8] ; ARM64: ldrb w10, [x9, #8]
; ARM64: strb w10, [x8, #8] ; ARM64: strb w10, [x8, #8]
; ARM64: ret ; ARM64: ret
call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8], [80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i64 9, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 getelementptr inbounds ([80 x i8], [80 x i8]* @temp, i32 0, i32 0), i8* align 4 getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i64 9, i1 false)
ret void ret void
} }
@ -111,7 +111,7 @@ define void @t7() {
; ARM64: ldrb w10, [x9, #6] ; ARM64: ldrb w10, [x9, #6]
; ARM64: strb w10, [x8, #6] ; ARM64: strb w10, [x8, #6]
; ARM64: ret ; ARM64: ret
call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8], [80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i64 7, i32 2, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 2 getelementptr inbounds ([80 x i8], [80 x i8]* @temp, i32 0, i32 0), i8* align 2 getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i64 7, i1 false)
ret void ret void
} }
@ -130,7 +130,7 @@ define void @t8() {
; ARM64: ldrb w10, [x9, #3] ; ARM64: ldrb w10, [x9, #3]
; ARM64: strb w10, [x8, #3] ; ARM64: strb w10, [x8, #3]
; ARM64: ret ; ARM64: ret
call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8], [80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i64 4, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 getelementptr inbounds ([80 x i8], [80 x i8]* @temp, i32 0, i32 0), i8* align 1 getelementptr inbounds ([80 x i8], [80 x i8]* @message, i32 0, i32 0), i64 4, i1 false)
ret void ret void
} }
@ -143,6 +143,6 @@ define void @test_distant_memcpy(i8* %dst) {
; ARM64: strb [[BYTE]], [x0] ; ARM64: strb [[BYTE]], [x0]
%array = alloca i8, i32 8192 %array = alloca i8, i32 8192
%elem = getelementptr i8, i8* %array, i32 8000 %elem = getelementptr i8, i8* %array, i32 8000
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %elem, i64 1, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %elem, i64 1, i1 false)
ret void ret void
} }

20
llvm/test/CodeGen/AArch64/arm64-memcpy-inline.ll
View File

@ -22,7 +22,7 @@ entry:
; CHECK: strh [[REG1]], [x[[BASEREG2]], #8] ; CHECK: strh [[REG1]], [x[[BASEREG2]], #8]
; CHECK: ldr [[REG2:x[0-9]+]], ; CHECK: ldr [[REG2:x[0-9]+]],
; CHECK: str [[REG2]], ; CHECK: str [[REG2]],
call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds (%struct.x, %struct.x* @dst, i32 0, i32 0), i8* getelementptr inbounds (%struct.x, %struct.x* @src, i32 0, i32 0), i32 11, i32 8, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @dst, i32 0, i32 0), i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @src, i32 0, i32 0), i32 11, i1 false)
ret i32 0 ret i32 0
} }
@ -33,7 +33,7 @@ entry:
; CHECK: stur [[DEST]], [x0, #15] ; CHECK: stur [[DEST]], [x0, #15]
; CHECK: ldr [[DEST:q[0-9]+]], [x[[BASEREG]]] ; CHECK: ldr [[DEST:q[0-9]+]], [x[[BASEREG]]]
; CHECK: str [[DEST]], [x0] ; CHECK: str [[DEST]], [x0]
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str1, i64 0, i64 0), i64 31, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str1, i64 0, i64 0), i64 31, i1 false)
ret void ret void
} }
@ -45,7 +45,7 @@ entry:
; CHECK: str [[REG3]], [x0, #32] ; CHECK: str [[REG3]], [x0, #32]
; CHECK: ldp [[DEST1:q[0-9]+]], [[DEST2:q[0-9]+]], [x{{[0-9]+}}] ; CHECK: ldp [[DEST1:q[0-9]+]], [[DEST2:q[0-9]+]], [x{{[0-9]+}}]
; CHECK: stp [[DEST1]], [[DEST2]], [x0] ; CHECK: stp [[DEST1]], [[DEST2]], [x0]
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str2, i64 0, i64 0), i64 36, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str2, i64 0, i64 0), i64 36, i1 false)
ret void ret void
} }
@ -56,7 +56,7 @@ entry:
; CHECK: str [[REG4]], [x0, #16] ; CHECK: str [[REG4]], [x0, #16]
; CHECK: ldr [[DEST:q[0-9]+]], [x[[BASEREG]]] ; CHECK: ldr [[DEST:q[0-9]+]], [x[[BASEREG]]]
; CHECK: str [[DEST]], [x0] ; CHECK: str [[DEST]], [x0]
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str3, i64 0, i64 0), i64 24, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str3, i64 0, i64 0), i64 24, i1 false)
ret void ret void
} }
@ -67,7 +67,7 @@ entry:
; CHECK: strh [[REG5]], [x0, #16] ; CHECK: strh [[REG5]], [x0, #16]
; CHECK: ldr [[REG6:q[0-9]+]], [x{{[0-9]+}}] ; CHECK: ldr [[REG6:q[0-9]+]], [x{{[0-9]+}}]
; CHECK: str [[REG6]], [x0] ; CHECK: str [[REG6]], [x0]
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str4, i64 0, i64 0), i64 18, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str4, i64 0, i64 0), i64 18, i1 false)
ret void ret void
} }
@ -80,7 +80,7 @@ entry:
; CHECK: mov [[REG8:w[0-9]+]], ; CHECK: mov [[REG8:w[0-9]+]],
; CHECK: movk [[REG8]], ; CHECK: movk [[REG8]],
; CHECK: str [[REG8]], [x0] ; CHECK: str [[REG8]], [x0]
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str5, i64 0, i64 0), i64 7, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str5, i64 0, i64 0), i64 7, i1 false)
ret void ret void
} }
@ -91,7 +91,7 @@ entry:
; CHECK: stur [[REG9]], [x{{[0-9]+}}, #6] ; CHECK: stur [[REG9]], [x{{[0-9]+}}, #6]
; CHECK: ldr ; CHECK: ldr
; CHECK: str ; CHECK: str
call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([512 x i8], [512 x i8]* @spool.splbuf, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str6, i64 0, i64 0), i64 14, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([512 x i8], [512 x i8]* @spool.splbuf, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str6, i64 0, i64 0), i64 14, i1 false)
ret void ret void
} }
@ -104,9 +104,9 @@ entry:
; CHECK: str [[REG10]], [x0] ; CHECK: str [[REG10]], [x0]
%0 = bitcast %struct.Foo* %a to i8* %0 = bitcast %struct.Foo* %a to i8*
%1 = bitcast %struct.Foo* %b to i8* %1 = bitcast %struct.Foo* %b to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* %1, i32 16, i32 4, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 %1, i32 16, i1 false)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind

8
llvm/test/CodeGen/AArch64/arm64-memset-inline.ll
View File

@ -5,7 +5,7 @@ entry:
; CHECK-LABEL: t1: ; CHECK-LABEL: t1:
; CHECK: str wzr, [x0, #8] ; CHECK: str wzr, [x0, #8]
; CHECK: str xzr, [x0] ; CHECK: str xzr, [x0]
call void @llvm.memset.p0i8.i64(i8* %c, i8 0, i64 12, i32 8, i1 false) call void @llvm.memset.p0i8.i64(i8* align 8 %c, i8 0, i64 12, i1 false)
ret void ret void
} }
@ -17,11 +17,11 @@ entry:
; CHECK: str xzr, [sp, #8] ; CHECK: str xzr, [sp, #8]
%buf = alloca [26 x i8], align 1 %buf = alloca [26 x i8], align 1
%0 = getelementptr inbounds [26 x i8], [26 x i8]* %buf, i32 0, i32 0 %0 = getelementptr inbounds [26 x i8], [26 x i8]* %buf, i32 0, i32 0
call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 26, i32 1, i1 false) call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 26, i1 false)
call void @something(i8* %0) nounwind call void @something(i8* %0) nounwind
ret void ret void
} }
declare void @something(i8*) nounwind declare void @something(i8*) nounwind
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind

8
llvm/test/CodeGen/AArch64/arm64-memset-to-bzero.ll
View File

@ -10,11 +10,11 @@
; CHECK-LINUX: {{b|bl}} memset ; CHECK-LINUX: {{b|bl}} memset
define void @fct1(i8* nocapture %ptr) { define void @fct1(i8* nocapture %ptr) {
entry: entry:
tail call void @llvm.memset.p0i8.i64(i8* %ptr, i8 0, i64 256, i32 1, i1 false) tail call void @llvm.memset.p0i8.i64(i8* %ptr, i8 0, i64 256, i1 false)
ret void ret void
} }
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1)
; CHECK-LABEL: fct2: ; CHECK-LABEL: fct2:
; When the size is bigger than 256, change into bzero. ; When the size is bigger than 256, change into bzero.
@ -22,7 +22,7 @@ declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1)
; CHECK-LINUX: {{b|bl}} memset ; CHECK-LINUX: {{b|bl}} memset
define void @fct2(i8* nocapture %ptr) { define void @fct2(i8* nocapture %ptr) {
entry: entry:
tail call void @llvm.memset.p0i8.i64(i8* %ptr, i8 0, i64 257, i32 1, i1 false) tail call void @llvm.memset.p0i8.i64(i8* %ptr, i8 0, i64 257, i1 false)
ret void ret void
} }
@ -33,7 +33,7 @@ entry:
define void @fct3(i8* nocapture %ptr, i32 %unknown) { define void @fct3(i8* nocapture %ptr, i32 %unknown) {
entry: entry:
%conv = sext i32 %unknown to i64 %conv = sext i32 %unknown to i64
tail call void @llvm.memset.p0i8.i64(i8* %ptr, i8 0, i64 %conv, i32 1, i1 false) tail call void @llvm.memset.p0i8.i64(i8* %ptr, i8 0, i64 %conv, i1 false)
ret void ret void
} }

4
llvm/test/CodeGen/AArch64/arm64-misaligned-memcpy-inline.ll
View File

@ -7,8 +7,8 @@ define void @t0(i8* %out, i8* %in) {
; CHECK: orr w2, wzr, #0x10 ; CHECK: orr w2, wzr, #0x10
; CHECK-NEXT: bl _memcpy ; CHECK-NEXT: bl _memcpy
entry: entry:
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %out, i8* %in, i64 16, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %out, i8* %in, i64 16, i1 false)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1)

6
llvm/test/CodeGen/AArch64/arm64-misched-basic-A53.ll
View File

@ -26,9 +26,9 @@ entry:
%yy = alloca i32, align 4 %yy = alloca i32, align 4
store i32 0, i32* %retval store i32 0, i32* %retval
%0 = bitcast [8 x i32]* %x to i8* %0 = bitcast [8 x i32]* %x to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* bitcast ([8 x i32]* @main.x to i8*), i64 32, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 bitcast ([8 x i32]* @main.x to i8*), i64 32, i1 false)
%1 = bitcast [8 x i32]* %y to i8* %1 = bitcast [8 x i32]* %y to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* bitcast ([8 x i32]* @main.y to i8*), i64 32, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %1, i8* align 4 bitcast ([8 x i32]* @main.y to i8*), i64 32, i1 false)
store i32 0, i32* %xx, align 4 store i32 0, i32* %xx, align 4
store i32 0, i32* %yy, align 4 store i32 0, i32* %yy, align 4
store i32 0, i32* %i, align 4 store i32 0, i32* %i, align 4
@ -105,7 +105,7 @@ define <4 x float> @neon4xfloat(<4 x float> %A, <4 x float> %B) {
} }
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #1 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) #1
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind } attributes #1 = { nounwind }

6
llvm/test/CodeGen/AArch64/arm64-misched-basic-A57.ll
View File

@ -32,9 +32,9 @@ entry:
%yy = alloca i32, align 4 %yy = alloca i32, align 4
store i32 0, i32* %retval store i32 0, i32* %retval
%0 = bitcast [8 x i32]* %x to i8* %0 = bitcast [8 x i32]* %x to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* bitcast ([8 x i32]* @main.x to i8*), i64 32, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 bitcast ([8 x i32]* @main.x to i8*), i64 32, i1 false)
%1 = bitcast [8 x i32]* %y to i8* %1 = bitcast [8 x i32]* %y to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* bitcast ([8 x i32]* @main.y to i8*), i64 32, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %1, i8* align 4 bitcast ([8 x i32]* @main.y to i8*), i64 32, i1 false)
store i32 0, i32* %xx, align 4 store i32 0, i32* %xx, align 4
store i32 0, i32* %yy, align 4 store i32 0, i32* %yy, align 4
store i32 0, i32* %i, align 4 store i32 0, i32* %i, align 4
@ -106,7 +106,7 @@ for.end: ; preds = %for.cond
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #1 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) #1
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind } attributes #1 = { nounwind }

4
llvm/test/CodeGen/AArch64/arm64-stur.ll
View File

@ -55,11 +55,11 @@ define void @foo(%struct.X* nocapture %p) nounwind optsize ssp {
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%B = getelementptr inbounds %struct.X, %struct.X* %p, i64 0, i32 1 %B = getelementptr inbounds %struct.X, %struct.X* %p, i64 0, i32 1
%val = bitcast i64* %B to i8* %val = bitcast i64* %B to i8*
call void @llvm.memset.p0i8.i64(i8* %val, i8 0, i64 16, i32 1, i1 false) call void @llvm.memset.p0i8.i64(i8* %val, i8 0, i64 16, i1 false)
ret void ret void
} }
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind
; Unaligned 16b stores are split into 8b stores for performance. ; Unaligned 16b stores are split into 8b stores for performance.
; radar://15424193 ; radar://15424193

4
llvm/test/CodeGen/AArch64/arm64-virtual_base.ll
View File

@ -43,9 +43,9 @@ entry:
%tmp14 = bitcast double* %arraydecay5.3.1 to i8* %tmp14 = bitcast double* %arraydecay5.3.1 to i8*
%arraydecay11.3.1 = getelementptr inbounds %struct.Bicubic_Patch_Struct, %struct.Bicubic_Patch_Struct* %Shape, i64 0, i32 12, i64 1, i64 3, i64 0 %arraydecay11.3.1 = getelementptr inbounds %struct.Bicubic_Patch_Struct, %struct.Bicubic_Patch_Struct* %Shape, i64 0, i32 12, i64 1, i64 3, i64 0
%tmp15 = bitcast double* %arraydecay11.3.1 to i8* %tmp15 = bitcast double* %arraydecay11.3.1 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp14, i8* %tmp15, i64 24, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp14, i8* %tmp15, i64 24, i1 false)
ret void ret void
} }
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1)

4
llvm/test/CodeGen/AArch64/fast-isel-memcpy.ll
View File

@ -8,8 +8,8 @@
define void @test(i64 %a, i8* %b) { define void @test(i64 %a, i8* %b) {
%1 = and i64 %a, 9223372036854775807 %1 = and i64 %a, 9223372036854775807
%2 = inttoptr i64 %1 to i8* %2 = inttoptr i64 %1 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %2, i8* %b, i64 8, i32 8, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %2, i8* align 8 %b, i64 8, i1 false)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i1)

4
llvm/test/CodeGen/AArch64/func-argpassing.ll
View File

@ -186,11 +186,11 @@ define void @check_i128_stackalign(i32 %val0, i32 %val1, i32 %val2, i32 %val3,
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i1)
define i32 @test_extern() { define i32 @test_extern() {
; CHECK-LABEL: test_extern: ; CHECK-LABEL: test_extern:
call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* undef, i32 undef, i32 4, i1 0) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 undef, i8* align 4 undef, i32 undef, i1 0)
; CHECK: bl memcpy ; CHECK: bl memcpy
ret i32 0 ret i32 0
} }

4
llvm/test/CodeGen/AArch64/ldp-stp-scaled-unscaled-pairs.ll
View File

@ -115,11 +115,11 @@ entry:
%C = getelementptr inbounds [12 x i8], [12 x i8]* %a2, i64 0, i64 4 %C = getelementptr inbounds [12 x i8], [12 x i8]* %a2, i64 0, i64 4
%1 = bitcast i8* %C to i64* %1 = bitcast i8* %C to i64*
store i64 0, i64* %1, align 4 store i64 0, i64* %1, align 4
call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 8, i32 8, i1 false) call void @llvm.memset.p0i8.i64(i8* align 8 %0, i8 0, i64 8, i1 false)
ret void ret void
} }
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1)
attributes #0 = { nounwind } attributes #0 = { nounwind }

4
llvm/test/CodeGen/AArch64/ldst-paired-aliasing.ll
View File

@ -5,7 +5,7 @@ target triple = "aarch64--linux-gnu"
declare void @f(i8*, i8*) declare void @f(i8*, i8*)
declare void @f2(i8*, i8*) declare void @f2(i8*, i8*)
declare void @_Z5setupv() declare void @_Z5setupv()
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) #3 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) #3
define i32 @main() local_unnamed_addr #1 { define i32 @main() local_unnamed_addr #1 {
; Make sure the stores happen in the correct order (the exact instructions could change). ; Make sure the stores happen in the correct order (the exact instructions could change).
@ -24,7 +24,7 @@ for.body.lr.ph.i.i.i.i.i.i63:
tail call void @_Z5setupv() tail call void @_Z5setupv()
%x2 = getelementptr inbounds [10 x i32], [10 x i32]* %b1, i64 0, i64 6 %x2 = getelementptr inbounds [10 x i32], [10 x i32]* %b1, i64 0, i64 6
%x3 = bitcast i32* %x2 to i8* %x3 = bitcast i32* %x2 to i8*
call void @llvm.memset.p0i8.i64(i8* %x3, i8 0, i64 16, i32 8, i1 false) call void @llvm.memset.p0i8.i64(i8* align 8 %x3, i8 0, i64 16, i1 false)
%arraydecay2 = getelementptr inbounds [10 x i32], [10 x i32]* %b1, i64 0, i64 0 %arraydecay2 = getelementptr inbounds [10 x i32], [10 x i32]* %b1, i64 0, i64 0
%x4 = bitcast [10 x i32]* %b1 to <4 x i32>* %x4 = bitcast [10 x i32]* %b1 to <4 x i32>*
store <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32>* %x4, align 16 store <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32>* %x4, align 16

4
llvm/test/CodeGen/AArch64/ldst-zero.ll
View File

@ -3,7 +3,7 @@
; Tests to check that zero stores which are generated as STP xzr, xzr aren't ; Tests to check that zero stores which are generated as STP xzr, xzr aren't
; scheduled incorrectly due to incorrect alias information ; scheduled incorrectly due to incorrect alias information
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1)
%struct.tree_common = type { i8*, i8*, i32 } %struct.tree_common = type { i8*, i8*, i32 }
; Original test case which exhibited the bug ; Original test case which exhibited the bug
@ -14,7 +14,7 @@ define void @test1(%struct.tree_common* %t, i32 %code, i8* %type) {
; CHECK-DAG: str xzr, [x0] ; CHECK-DAG: str xzr, [x0]
entry: entry:
%0 = bitcast %struct.tree_common* %t to i8* %0 = bitcast %struct.tree_common* %t to i8*
tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 24, i32 8, i1 false) tail call void @llvm.memset.p0i8.i64(i8* align 8 %0, i8 0, i64 24, i1 false)
%code1 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 2 %code1 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 2
store i32 %code, i32* %code1, align 8 store i32 %code, i32* %code1, align 8
%type2 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 1 %type2 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 1

4
llvm/test/CodeGen/AArch64/machine-combiner-madd.ll
View File

@ -19,7 +19,7 @@
%class.D = type { %class.basic_string.base, [4 x i8] } %class.D = type { %class.basic_string.base, [4 x i8] }
%class.basic_string.base = type <{ i64, i64, i32 }> %class.basic_string.base = type <{ i64, i64, i32 }>
@a = global %class.D* zeroinitializer, align 8 @a = global %class.D* zeroinitializer, align 8
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1)
define internal void @fun() section ".text.startup" { define internal void @fun() section ".text.startup" {
entry: entry:
%tmp.i.i = alloca %class.D, align 8 %tmp.i.i = alloca %class.D, align 8
@ -31,7 +31,7 @@ loop:
%x = load %class.D*, %class.D** getelementptr inbounds (%class.D*, %class.D** @a, i64 0), align 8 %x = load %class.D*, %class.D** getelementptr inbounds (%class.D*, %class.D** @a, i64 0), align 8
%arrayidx.i.i.i = getelementptr inbounds %class.D, %class.D* %x, i64 %conv11.i.i %arrayidx.i.i.i = getelementptr inbounds %class.D, %class.D* %x, i64 %conv11.i.i
%d = bitcast %class.D* %arrayidx.i.i.i to i8* %d = bitcast %class.D* %arrayidx.i.i.i to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* nonnull %y, i8* %d, i64 24, i32 8, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 nonnull %y, i8* align 8 %d, i64 24, i1 false)
%inc.i.i = add i64 %i, 1 %inc.i.i = add i64 %i, 1
%cmp.i.i = icmp slt i64 %inc.i.i, 0 %cmp.i.i = icmp slt i64 %inc.i.i, 0
br i1 %cmp.i.i, label %loop, label %exit br i1 %cmp.i.i, label %loop, label %exit

4
llvm/test/CodeGen/AArch64/memcpy-f128.ll
View File

@ -12,8 +12,8 @@ define void @test1() {
; CHECK: str q0 ; CHECK: str q0
; CHECK: ret ; CHECK: ret
entry: entry:
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* bitcast (%structA* @stubA to i8*), i64 48, i32 8, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 undef, i8* align 8 bitcast (%structA* @stubA to i8*), i64 48, i1 false)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1)

4
llvm/test/CodeGen/AArch64/merge-store-dependency.ll
View File

@ -14,7 +14,7 @@ entry:
; A53: str [[DATA]], {{.*}} ; A53: str [[DATA]], {{.*}}
%0 = bitcast %struct1* %fde to i8* %0 = bitcast %struct1* %fde to i8*
tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 40, i32 8, i1 false) tail call void @llvm.memset.p0i8.i64(i8* align 8 %0, i8 0, i64 40, i1 false)
%state = getelementptr inbounds %struct1, %struct1* %fde, i64 0, i32 4 %state = getelementptr inbounds %struct1, %struct1* %fde, i64 0, i32 4
store i16 256, i16* %state, align 8 store i16 256, i16* %state, align 8
%fd1 = getelementptr inbounds %struct1, %struct1* %fde, i64 0, i32 2 %fd1 = getelementptr inbounds %struct1, %struct1* %fde, i64 0, i32 2
@ -58,6 +58,6 @@ exit:
ret void ret void
} }
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1)
declare i32 @fcntl(i32, i32, ...) declare i32 @fcntl(i32, i32, ...)
declare noalias i8* @foo() declare noalias i8* @foo()

4
llvm/test/CodeGen/AArch64/mergestores_noimplicitfloat.ll
View File

@ -16,8 +16,8 @@ target triple = "arm64-apple-ios10.0.0"
; CHECK-DAG: str [[R3]], [x0, #24] ; CHECK-DAG: str [[R3]], [x0, #24]
define void @pr33475(i8* %p0, i8* %p1) noimplicitfloat { define void @pr33475(i8* %p0, i8* %p1) noimplicitfloat {
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p0, i8* %p1, i64 32, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %p0, i8* align 4 %p1, i64 32, i1 false)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i1)

4
llvm/test/CodeGen/AArch64/misched-stp.ll
View File

@ -30,7 +30,7 @@ entry:
ret void ret void
} }
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1)
%struct.tree_common = type { i8*, i8*, i32 } %struct.tree_common = type { i8*, i8*, i32 }
; CHECK-LABEL: test_zero ; CHECK-LABEL: test_zero
@ -41,7 +41,7 @@ declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1)
define void @test_zero(%struct.tree_common* %t, i32 %code, i8* %type) { define void @test_zero(%struct.tree_common* %t, i32 %code, i8* %type) {
entry: entry:
%0 = bitcast %struct.tree_common* %t to i8* %0 = bitcast %struct.tree_common* %t to i8*
tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 24, i32 8, i1 false) tail call void @llvm.memset.p0i8.i64(i8* align 8 %0, i8 0, i64 24, i1 false)
%code1 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 2 %code1 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 2
store i32 %code, i32* %code1, align 8 store i32 %code, i32* %code1, align 8
%type2 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 1 %type2 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 1

4
llvm/test/CodeGen/AArch64/pr33172.ll
View File

@ -21,12 +21,12 @@ entry:
%wide.load8291059.4 = load i64, i64* bitcast (float* getelementptr inbounds ([200 x float], [200 x float]* @main.b, i64 0, i64 18) to i64*), align 8 %wide.load8291059.4 = load i64, i64* bitcast (float* getelementptr inbounds ([200 x float], [200 x float]* @main.b, i64 0, i64 18) to i64*), align 8
store i64 %wide.load8281058.4, i64* bitcast (float* getelementptr inbounds ([200 x float], [200 x float]* @main.x, i64 0, i64 16) to i64*), align 8 store i64 %wide.load8281058.4, i64* bitcast (float* getelementptr inbounds ([200 x float], [200 x float]* @main.x, i64 0, i64 16) to i64*), align 8
store i64 %wide.load8291059.4, i64* bitcast (float* getelementptr inbounds ([200 x float], [200 x float]* @main.x, i64 0, i64 18) to i64*), align 8 store i64 %wide.load8291059.4, i64* bitcast (float* getelementptr inbounds ([200 x float], [200 x float]* @main.x, i64 0, i64 18) to i64*), align 8
tail call void @llvm.memset.p0i8.i64(i8* bitcast ([200 x float]* @main.b to i8*), i8 0, i64 undef, i32 8, i1 false) #2 tail call void @llvm.memset.p0i8.i64(i8* align 8 bitcast ([200 x float]* @main.b to i8*), i8 0, i64 undef, i1 false) #2
unreachable unreachable
} }
; Function Attrs: argmemonly nounwind ; Function Attrs: argmemonly nounwind
declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i32, i1) #1 declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1) #1
attributes #1 = { argmemonly nounwind } attributes #1 = { argmemonly nounwind }
attributes #2 = { nounwind } attributes #2 = { nounwind }

12
llvm/test/CodeGen/AArch64/tailcall-mem-intrinsics.ll
View File

@ -4,7 +4,7 @@
; CHECK: b memcpy ; CHECK: b memcpy
define void @tail_memcpy(i8* nocapture %p, i8* nocapture readonly %q, i32 %n) #0 { define void @tail_memcpy(i8* nocapture %p, i8* nocapture readonly %q, i32 %n) #0 {
entry: entry:
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i1 false)
ret void ret void
} }
@ -12,7 +12,7 @@ entry:
; CHECK: b memmove ; CHECK: b memmove
define void @tail_memmove(i8* nocapture %p, i8* nocapture readonly %q, i32 %n) #0 { define void @tail_memmove(i8* nocapture %p, i8* nocapture readonly %q, i32 %n) #0 {
entry: entry:
tail call void @llvm.memmove.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i32 1, i1 false) tail call void @llvm.memmove.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i1 false)
ret void ret void
} }
@ -20,12 +20,12 @@ entry:
; CHECK: b memset ; CHECK: b memset
define void @tail_memset(i8* nocapture %p, i8 %c, i32 %n) #0 { define void @tail_memset(i8* nocapture %p, i8 %c, i32 %n) #0 {
entry: entry:
tail call void @llvm.memset.p0i8.i32(i8* %p, i8 %c, i32 %n, i32 1, i1 false) tail call void @llvm.memset.p0i8.i32(i8* %p, i8 %c, i32 %n, i1 false)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) #0 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) #0
declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) #0 declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) #0
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) #0 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) #0
attributes #0 = { nounwind } attributes #0 = { nounwind }

4
llvm/test/CodeGen/AArch64/tailcall-string-rvo.ll
View File

@ -32,7 +32,7 @@ bb:
%tmp1 = bitcast %class.basic_string.11.42.73* %arg to %union.anon.8.39.70** %tmp1 = bitcast %class.basic_string.11.42.73* %arg to %union.anon.8.39.70**
store %union.anon.8.39.70* %tmp, %union.anon.8.39.70** %tmp1, align 8 store %union.anon.8.39.70* %tmp, %union.anon.8.39.70** %tmp1, align 8
%tmp2 = bitcast %union.anon.8.39.70* %tmp to i8* %tmp2 = bitcast %union.anon.8.39.70* %tmp to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp2, i8* nonnull undef, i64 13, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp2, i8* nonnull undef, i64 13, i1 false)
%tmp3 = getelementptr inbounds %class.basic_string.11.42.73, %class.basic_string.11.42.73* %arg, i64 0, i32 0, i32 0, i32 1 %tmp3 = getelementptr inbounds %class.basic_string.11.42.73, %class.basic_string.11.42.73* %arg, i64 0, i32 0, i32 0, i32 1
store i64 13, i64* %tmp3, align 8 store i64 13, i64* %tmp3, align 8
%tmp4 = getelementptr inbounds %class.basic_string.11.42.73, %class.basic_string.11.42.73* %arg, i64 0, i32 0, i32 0, i32 2, i32 1, i64 5 %tmp4 = getelementptr inbounds %class.basic_string.11.42.73, %class.basic_string.11.42.73* %arg, i64 0, i32 0, i32 0, i32 2, i32 1, i64 5
@ -42,6 +42,6 @@ bb:
} }
; Function Attrs: argmemonly nounwind ; Function Attrs: argmemonly nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #0 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) #0
attributes #0 = { argmemonly nounwind } attributes #0 = { argmemonly nounwind }

4
llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
View File

@ -1,6 +1,6 @@
; RUN: opt -mtriple=amdgcn-unknown-amdhsa -S -amdgpu-annotate-kernel-features < %s | FileCheck -check-prefix=HSA %s ; RUN: opt -mtriple=amdgcn-unknown-amdhsa -S -amdgpu-annotate-kernel-features < %s | FileCheck -check-prefix=HSA %s
declare void @llvm.memcpy.p1i32.p4i32.i32(i32 addrspace(1)* nocapture, i32 addrspace(4)* nocapture, i32, i32, i1) #0 declare void @llvm.memcpy.p1i32.p4i32.i32(i32 addrspace(1)* nocapture, i32 addrspace(4)* nocapture, i32, i1) #0
@lds.i32 = unnamed_addr addrspace(3) global i32 undef, align 4 @lds.i32 = unnamed_addr addrspace(3) global i32 undef, align 4
@lds.arr = unnamed_addr addrspace(3) global [256 x i32] undef, align 4 @lds.arr = unnamed_addr addrspace(3) global [256 x i32] undef, align 4
@ -68,7 +68,7 @@ define amdgpu_kernel void @cmpxchg_constant_cast_group_gv_gep_to_flat(i32 addrsp
; HSA: @memcpy_constant_cast_group_gv_gep_to_flat(i32 addrspace(1)* %out) #2 ; HSA: @memcpy_constant_cast_group_gv_gep_to_flat(i32 addrspace(1)* %out) #2
define amdgpu_kernel void @memcpy_constant_cast_group_gv_gep_to_flat(i32 addrspace(1)* %out) #1 { define amdgpu_kernel void @memcpy_constant_cast_group_gv_gep_to_flat(i32 addrspace(1)* %out) #1 {
call void @llvm.memcpy.p1i32.p4i32.i32(i32 addrspace(1)* %out, i32 addrspace(4)* getelementptr ([256 x i32], [256 x i32] addrspace(4)* addrspacecast ([256 x i32] addrspace(3)* @lds.arr to [256 x i32] addrspace(4)*), i64 0, i64 8), i32 32, i32 4, i1 false) call void @llvm.memcpy.p1i32.p4i32.i32(i32 addrspace(1)* align 4 %out, i32 addrspace(4)* align 4 getelementptr ([256 x i32], [256 x i32] addrspace(4)* addrspacecast ([256 x i32] addrspace(3)* @lds.arr to [256 x i32] addrspace(4)*), i64 0, i64 8), i32 32, i1 false)
ret void ret void
} }

128
llvm/test/CodeGen/AMDGPU/lds-alignment.ll
View File

@ -9,16 +9,16 @@
@lds.missing.align.0 = internal unnamed_addr addrspace(3) global [39 x i32] undef @lds.missing.align.0 = internal unnamed_addr addrspace(3) global [39 x i32] undef
@lds.missing.align.1 = internal unnamed_addr addrspace(3) global [7 x i64] undef @lds.missing.align.1 = internal unnamed_addr addrspace(3) global [7 x i64] undef
declare void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* nocapture, i8 addrspace(1)* nocapture readonly, i32, i32, i1) #0 declare void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* nocapture, i8 addrspace(1)* nocapture readonly, i32, i1) #0
declare void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* nocapture, i8 addrspace(3)* nocapture readonly, i32, i32, i1) #0 declare void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* nocapture, i8 addrspace(3)* nocapture readonly, i32, i1) #0
; HSA-LABEL: {{^}}test_no_round_size_1: ; HSA-LABEL: {{^}}test_no_round_size_1:
; HSA: workgroup_group_segment_byte_size = 38 ; HSA: workgroup_group_segment_byte_size = 38
define amdgpu_kernel void @test_no_round_size_1(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 { define amdgpu_kernel void @test_no_round_size_1(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 {
%lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)* %lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align16.0.bc, i8 addrspace(1)* %in, i32 38, i32 4, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 4 %lds.align16.0.bc, i8 addrspace(1)* align 4 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align16.0.bc, i32 38, i32 4, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 4 %out, i8 addrspace(3)* align 4 %lds.align16.0.bc, i32 38, i1 false)
ret void ret void
} }
@ -36,12 +36,12 @@ define amdgpu_kernel void @test_no_round_size_1(i8 addrspace(1)* %out, i8 addrsp
; HSA: group_segment_alignment = 4 ; HSA: group_segment_alignment = 4
define amdgpu_kernel void @test_round_size_2(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 { define amdgpu_kernel void @test_round_size_2(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 {
%lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)* %lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align16.0.bc, i8 addrspace(1)* %in, i32 38, i32 4, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 4 %lds.align16.0.bc, i8 addrspace(1)* align 4 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align16.0.bc, i32 38, i32 4, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 4 %out, i8 addrspace(3)* align 4 %lds.align16.0.bc, i32 38, i1 false)
%lds.align16.1.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.1 to i8 addrspace(3)* %lds.align16.1.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.1 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align16.1.bc, i8 addrspace(1)* %in, i32 38, i32 4, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 4 %lds.align16.1.bc, i8 addrspace(1)* align 4 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align16.1.bc, i32 38, i32 4, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 4 %out, i8 addrspace(3)* align 4 %lds.align16.1.bc, i32 38, i1 false)
ret void ret void
} }
@ -52,12 +52,12 @@ define amdgpu_kernel void @test_round_size_2(i8 addrspace(1)* %out, i8 addrspace
; HSA: group_segment_alignment = 4 ; HSA: group_segment_alignment = 4
define amdgpu_kernel void @test_round_size_2_align_8(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 { define amdgpu_kernel void @test_round_size_2_align_8(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 {
%lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)* %lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align16.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align16.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align16.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align16.0.bc, i32 38, i1 false)
%lds.align8.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align8.0 to i8 addrspace(3)* %lds.align8.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align8.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align8.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align8.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align8.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align8.0.bc, i32 38, i1 false)
ret void ret void
} }
@ -67,11 +67,11 @@ define amdgpu_kernel void @test_round_size_2_align_8(i8 addrspace(1)* %out, i8 a
; HSA: group_segment_alignment = 4 ; HSA: group_segment_alignment = 4
define amdgpu_kernel void @test_round_local_lds_and_arg(i8 addrspace(1)* %out, i8 addrspace(1)* %in, i8 addrspace(3)* %lds.arg) #1 { define amdgpu_kernel void @test_round_local_lds_and_arg(i8 addrspace(1)* %out, i8 addrspace(1)* %in, i8 addrspace(3)* %lds.arg) #1 {
%lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)* %lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align16.0.bc, i8 addrspace(1)* %in, i32 38, i32 4, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 4 %lds.align16.0.bc, i8 addrspace(1)* align 4 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align16.0.bc, i32 38, i32 4, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 4 %out, i8 addrspace(3)* align 4 %lds.align16.0.bc, i32 38, i1 false)
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.arg, i8 addrspace(1)* %in, i32 38, i32 4, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 4 %lds.arg, i8 addrspace(1)* align 4 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.arg, i32 38, i32 4, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 4 %out, i8 addrspace(3)* align 4 %lds.arg, i32 38, i1 false)
ret void ret void
} }
@ -79,8 +79,8 @@ define amdgpu_kernel void @test_round_local_lds_and_arg(i8 addrspace(1)* %out, i
; HSA: workgroup_group_segment_byte_size = 0 ; HSA: workgroup_group_segment_byte_size = 0
; HSA: group_segment_alignment = 4 ; HSA: group_segment_alignment = 4
define amdgpu_kernel void @test_round_lds_arg(i8 addrspace(1)* %out, i8 addrspace(1)* %in, i8 addrspace(3)* %lds.arg) #1 { define amdgpu_kernel void @test_round_lds_arg(i8 addrspace(1)* %out, i8 addrspace(1)* %in, i8 addrspace(3)* %lds.arg) #1 {
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.arg, i8 addrspace(1)* %in, i32 38, i32 4, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 4 %lds.arg, i8 addrspace(1)* align 4 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.arg, i32 38, i32 4, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 4 %out, i8 addrspace(3)* align 4 %lds.arg, i32 38, i1 false)
ret void ret void
} }
@ -89,8 +89,8 @@ define amdgpu_kernel void @test_round_lds_arg(i8 addrspace(1)* %out, i8 addrspac
; HSA: workgroup_group_segment_byte_size = 0 ; HSA: workgroup_group_segment_byte_size = 0
; HSA: group_segment_alignment = 4 ; HSA: group_segment_alignment = 4
define amdgpu_kernel void @test_high_align_lds_arg(i8 addrspace(1)* %out, i8 addrspace(1)* %in, i8 addrspace(3)* align 64 %lds.arg) #1 { define amdgpu_kernel void @test_high_align_lds_arg(i8 addrspace(1)* %out, i8 addrspace(1)* %in, i8 addrspace(3)* align 64 %lds.arg) #1 {
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.arg, i8 addrspace(1)* %in, i32 38, i32 64, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 64 %lds.arg, i8 addrspace(1)* align 64 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.arg, i32 38, i32 64, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 64 %out, i8 addrspace(3)* align 64 %lds.arg, i32 38, i1 false)
ret void ret void
} }
@ -100,12 +100,12 @@ define amdgpu_kernel void @test_high_align_lds_arg(i8 addrspace(1)* %out, i8 add
; HSA: group_segment_alignment = 4 ; HSA: group_segment_alignment = 4
define amdgpu_kernel void @test_missing_alignment_size_2_order0(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 { define amdgpu_kernel void @test_missing_alignment_size_2_order0(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 {
%lds.missing.align.0.bc = bitcast [39 x i32] addrspace(3)* @lds.missing.align.0 to i8 addrspace(3)* %lds.missing.align.0.bc = bitcast [39 x i32] addrspace(3)* @lds.missing.align.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.missing.align.0.bc, i8 addrspace(1)* %in, i32 160, i32 4, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 4 %lds.missing.align.0.bc, i8 addrspace(1)* align 4 %in, i32 160, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.missing.align.0.bc, i32 160, i32 4, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 4 %out, i8 addrspace(3)* align 4 %lds.missing.align.0.bc, i32 160, i1 false)
%lds.missing.align.1.bc = bitcast [7 x i64] addrspace(3)* @lds.missing.align.1 to i8 addrspace(3)* %lds.missing.align.1.bc = bitcast [7 x i64] addrspace(3)* @lds.missing.align.1 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.missing.align.1.bc, i8 addrspace(1)* %in, i32 56, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.missing.align.1.bc, i8 addrspace(1)* align 8 %in, i32 56, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.missing.align.1.bc, i32 56, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.missing.align.1.bc, i32 56, i1 false)
ret void ret void
} }
@ -116,12 +116,12 @@ define amdgpu_kernel void @test_missing_alignment_size_2_order0(i8 addrspace(1)*
; HSA: group_segment_alignment = 4 ; HSA: group_segment_alignment = 4
define amdgpu_kernel void @test_missing_alignment_size_2_order1(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 { define amdgpu_kernel void @test_missing_alignment_size_2_order1(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 {
%lds.missing.align.1.bc = bitcast [7 x i64] addrspace(3)* @lds.missing.align.1 to i8 addrspace(3)* %lds.missing.align.1.bc = bitcast [7 x i64] addrspace(3)* @lds.missing.align.1 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.missing.align.1.bc, i8 addrspace(1)* %in, i32 56, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.missing.align.1.bc, i8 addrspace(1)* align 8 %in, i32 56, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.missing.align.1.bc, i32 56, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.missing.align.1.bc, i32 56, i1 false)
%lds.missing.align.0.bc = bitcast [39 x i32] addrspace(3)* @lds.missing.align.0 to i8 addrspace(3)* %lds.missing.align.0.bc = bitcast [39 x i32] addrspace(3)* @lds.missing.align.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.missing.align.0.bc, i8 addrspace(1)* %in, i32 160, i32 4, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 4 %lds.missing.align.0.bc, i8 addrspace(1)* align 4 %in, i32 160, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.missing.align.0.bc, i32 160, i32 4, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 4 %out, i8 addrspace(3)* align 4 %lds.missing.align.0.bc, i32 160, i1 false)
ret void ret void
} }
@ -144,16 +144,16 @@ define amdgpu_kernel void @test_missing_alignment_size_2_order1(i8 addrspace(1)*
; HSA: group_segment_alignment = 4 ; HSA: group_segment_alignment = 4
define amdgpu_kernel void @test_round_size_3_order0(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 { define amdgpu_kernel void @test_round_size_3_order0(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 {
%lds.align32.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align32.0 to i8 addrspace(3)* %lds.align32.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align32.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align32.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align32.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align32.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align32.0.bc, i32 38, i1 false)
%lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)* %lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align16.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align16.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align16.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align16.0.bc, i32 38, i1 false)
%lds.align8.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align8.0 to i8 addrspace(3)* %lds.align8.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align8.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align8.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align8.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align8.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align8.0.bc, i32 38, i1 false)
ret void ret void
} }
@ -165,16 +165,16 @@ define amdgpu_kernel void @test_round_size_3_order0(i8 addrspace(1)* %out, i8 ad
; HSA: group_segment_alignment = 4 ; HSA: group_segment_alignment = 4
define amdgpu_kernel void @test_round_size_3_order1(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 { define amdgpu_kernel void @test_round_size_3_order1(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 {
%lds.align32.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align32.0 to i8 addrspace(3)* %lds.align32.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align32.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align32.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align32.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align32.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align32.0.bc, i32 38, i1 false)
%lds.align8.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align8.0 to i8 addrspace(3)* %lds.align8.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align8.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align8.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align8.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align8.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align8.0.bc, i32 38, i1 false)
%lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)* %lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align16.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align16.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align16.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align16.0.bc, i32 38, i1 false)
ret void ret void
} }
@ -186,16 +186,16 @@ define amdgpu_kernel void @test_round_size_3_order1(i8 addrspace(1)* %out, i8 ad
; HSA: group_segment_alignment = 4 ; HSA: group_segment_alignment = 4
define amdgpu_kernel void @test_round_size_3_order2(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 { define amdgpu_kernel void @test_round_size_3_order2(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 {
%lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)* %lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align16.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align16.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align16.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align16.0.bc, i32 38, i1 false)
%lds.align32.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align32.0 to i8 addrspace(3)* %lds.align32.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align32.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align32.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align32.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align32.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align32.0.bc, i32 38, i1 false)
%lds.align8.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align8.0 to i8 addrspace(3)* %lds.align8.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align8.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align8.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align8.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align8.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align8.0.bc, i32 38, i1 false)
ret void ret void
} }
@ -207,16 +207,16 @@ define amdgpu_kernel void @test_round_size_3_order2(i8 addrspace(1)* %out, i8 ad
; HSA: group_segment_alignment = 4 ; HSA: group_segment_alignment = 4
define amdgpu_kernel void @test_round_size_3_order3(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 { define amdgpu_kernel void @test_round_size_3_order3(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 {
%lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)* %lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align16.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align16.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align16.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align16.0.bc, i32 38, i1 false)
%lds.align8.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align8.0 to i8 addrspace(3)* %lds.align8.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align8.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align8.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align8.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align8.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align8.0.bc, i32 38, i1 false)
%lds.align32.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align32.0 to i8 addrspace(3)* %lds.align32.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align32.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align32.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align32.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align32.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align32.0.bc, i32 38, i1 false)
ret void ret void
} }
@ -228,16 +228,16 @@ define amdgpu_kernel void @test_round_size_3_order3(i8 addrspace(1)* %out, i8 ad
; HSA: group_segment_alignment = 4 ; HSA: group_segment_alignment = 4
define amdgpu_kernel void @test_round_size_3_order4(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 { define amdgpu_kernel void @test_round_size_3_order4(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 {
%lds.align8.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align8.0 to i8 addrspace(3)* %lds.align8.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align8.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align8.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align8.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align8.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align8.0.bc, i32 38, i1 false)
%lds.align32.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align32.0 to i8 addrspace(3)* %lds.align32.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align32.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align32.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align32.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align32.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align32.0.bc, i32 38, i1 false)
%lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)* %lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align16.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align16.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align16.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align16.0.bc, i32 38, i1 false)
ret void ret void
} }
@ -249,16 +249,16 @@ define amdgpu_kernel void @test_round_size_3_order4(i8 addrspace(1)* %out, i8 ad
; HSA: group_segment_alignment = 4 ; HSA: group_segment_alignment = 4
define amdgpu_kernel void @test_round_size_3_order5(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 { define amdgpu_kernel void @test_round_size_3_order5(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #1 {
%lds.align8.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align8.0 to i8 addrspace(3)* %lds.align8.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align8.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align8.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align8.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align8.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align8.0.bc, i32 38, i1 false)
%lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)* %lds.align16.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align16.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align16.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align16.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align16.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align16.0.bc, i32 38, i1 false)
%lds.align32.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align32.0 to i8 addrspace(3)* %lds.align32.0.bc = bitcast [38 x i8] addrspace(3)* @lds.align32.0 to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %lds.align32.0.bc, i8 addrspace(1)* %in, i32 38, i32 8, i1 false) call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 8 %lds.align32.0.bc, i8 addrspace(1)* align 8 %in, i32 38, i1 false)
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out, i8 addrspace(3)* %lds.align32.0.bc, i32 38, i32 8, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 8 %out, i8 addrspace(3)* align 8 %lds.align32.0.bc, i32 38, i1 false)
ret void ret void
} }

28
llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll
View File

@ -1,9 +1,9 @@
; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
declare void @llvm.memcpy.p3i8.p3i8.i32(i8 addrspace(3)* nocapture, i8 addrspace(3)* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p3i8.p3i8.i32(i8 addrspace(3)* nocapture, i8 addrspace(3)* nocapture, i32, i1) nounwind
declare void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(1)* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(1)* nocapture, i64, i1) nounwind
declare void @llvm.memcpy.p1i8.p2i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(2)* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p1i8.p2i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(2)* nocapture, i64, i1) nounwind
; FUNC-LABEL: {{^}}test_small_memcpy_i64_lds_to_lds_align1: ; FUNC-LABEL: {{^}}test_small_memcpy_i64_lds_to_lds_align1:
@ -83,7 +83,7 @@ declare void @llvm.memcpy.p1i8.p2i8.i64(i8 addrspace(1)* nocapture, i8 addrspace
define amdgpu_kernel void @test_small_memcpy_i64_lds_to_lds_align1(i64 addrspace(3)* noalias %out, i64 addrspace(3)* noalias %in) nounwind { define amdgpu_kernel void @test_small_memcpy_i64_lds_to_lds_align1(i64 addrspace(3)* noalias %out, i64 addrspace(3)* noalias %in) nounwind {
%bcin = bitcast i64 addrspace(3)* %in to i8 addrspace(3)* %bcin = bitcast i64 addrspace(3)* %in to i8 addrspace(3)*
%bcout = bitcast i64 addrspace(3)* %out to i8 addrspace(3)* %bcout = bitcast i64 addrspace(3)* %out to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p3i8.i32(i8 addrspace(3)* %bcout, i8 addrspace(3)* %bcin, i32 32, i32 1, i1 false) nounwind call void @llvm.memcpy.p3i8.p3i8.i32(i8 addrspace(3)* %bcout, i8 addrspace(3)* %bcin, i32 32, i1 false) nounwind
ret void ret void
} }
@ -128,7 +128,7 @@ define amdgpu_kernel void @test_small_memcpy_i64_lds_to_lds_align1(i64 addrspace
define amdgpu_kernel void @test_small_memcpy_i64_lds_to_lds_align2(i64 addrspace(3)* noalias %out, i64 addrspace(3)* noalias %in) nounwind { define amdgpu_kernel void @test_small_memcpy_i64_lds_to_lds_align2(i64 addrspace(3)* noalias %out, i64 addrspace(3)* noalias %in) nounwind {
%bcin = bitcast i64 addrspace(3)* %in to i8 addrspace(3)* %bcin = bitcast i64 addrspace(3)* %in to i8 addrspace(3)*
%bcout = bitcast i64 addrspace(3)* %out to i8 addrspace(3)* %bcout = bitcast i64 addrspace(3)* %out to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p3i8.i32(i8 addrspace(3)* %bcout, i8 addrspace(3)* %bcin, i32 32, i32 2, i1 false) nounwind call void @llvm.memcpy.p3i8.p3i8.i32(i8 addrspace(3)* align 2 %bcout, i8 addrspace(3)* align 2 %bcin, i32 32, i1 false) nounwind
ret void ret void
} }
@ -147,7 +147,7 @@ define amdgpu_kernel void @test_small_memcpy_i64_lds_to_lds_align2(i64 addrspace
define amdgpu_kernel void @test_small_memcpy_i64_lds_to_lds_align4(i64 addrspace(3)* noalias %out, i64 addrspace(3)* noalias %in) nounwind { define amdgpu_kernel void @test_small_memcpy_i64_lds_to_lds_align4(i64 addrspace(3)* noalias %out, i64 addrspace(3)* noalias %in) nounwind {
%bcin = bitcast i64 addrspace(3)* %in to i8 addrspace(3)* %bcin = bitcast i64 addrspace(3)* %in to i8 addrspace(3)*
%bcout = bitcast i64 addrspace(3)* %out to i8 addrspace(3)* %bcout = bitcast i64 addrspace(3)* %out to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p3i8.i32(i8 addrspace(3)* %bcout, i8 addrspace(3)* %bcin, i32 32, i32 4, i1 false) nounwind call void @llvm.memcpy.p3i8.p3i8.i32(i8 addrspace(3)* align 4 %bcout, i8 addrspace(3)* align 4 %bcin, i32 32, i1 false) nounwind
ret void ret void
} }
@ -164,7 +164,7 @@ define amdgpu_kernel void @test_small_memcpy_i64_lds_to_lds_align4(i64 addrspace
define amdgpu_kernel void @test_small_memcpy_i64_lds_to_lds_align8(i64 addrspace(3)* noalias %out, i64 addrspace(3)* noalias %in) nounwind { define amdgpu_kernel void @test_small_memcpy_i64_lds_to_lds_align8(i64 addrspace(3)* noalias %out, i64 addrspace(3)* noalias %in) nounwind {
%bcin = bitcast i64 addrspace(3)* %in to i8 addrspace(3)* %bcin = bitcast i64 addrspace(3)* %in to i8 addrspace(3)*
%bcout = bitcast i64 addrspace(3)* %out to i8 addrspace(3)* %bcout = bitcast i64 addrspace(3)* %out to i8 addrspace(3)*
call void @llvm.memcpy.p3i8.p3i8.i32(i8 addrspace(3)* %bcout, i8 addrspace(3)* %bcin, i32 32, i32 8, i1 false) nounwind call void @llvm.memcpy.p3i8.p3i8.i32(i8 addrspace(3)* align 8 %bcout, i8 addrspace(3)* align 8 %bcin, i32 32, i1 false) nounwind
ret void ret void
} }
@ -241,7 +241,7 @@ define amdgpu_kernel void @test_small_memcpy_i64_lds_to_lds_align8(i64 addrspace
define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align1(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind { define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align1(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
%bcin = bitcast i64 addrspace(1)* %in to i8 addrspace(1)* %bcin = bitcast i64 addrspace(1)* %in to i8 addrspace(1)*
%bcout = bitcast i64 addrspace(1)* %out to i8 addrspace(1)* %bcout = bitcast i64 addrspace(1)* %out to i8 addrspace(1)*
call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %bcout, i8 addrspace(1)* %bcin, i64 32, i32 1, i1 false) nounwind call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %bcout, i8 addrspace(1)* %bcin, i64 32, i1 false) nounwind
ret void ret void
} }
@ -284,7 +284,7 @@ define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align1(i64 add
define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align2(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind { define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align2(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
%bcin = bitcast i64 addrspace(1)* %in to i8 addrspace(1)* %bcin = bitcast i64 addrspace(1)* %in to i8 addrspace(1)*
%bcout = bitcast i64 addrspace(1)* %out to i8 addrspace(1)* %bcout = bitcast i64 addrspace(1)* %out to i8 addrspace(1)*
call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %bcout, i8 addrspace(1)* %bcin, i64 32, i32 2, i1 false) nounwind call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* align 2 %bcout, i8 addrspace(1)* align 2 %bcin, i64 32, i1 false) nounwind
ret void ret void
} }
@ -297,7 +297,7 @@ define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align2(i64 add
define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align4(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind { define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align4(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
%bcin = bitcast i64 addrspace(1)* %in to i8 addrspace(1)* %bcin = bitcast i64 addrspace(1)* %in to i8 addrspace(1)*
%bcout = bitcast i64 addrspace(1)* %out to i8 addrspace(1)* %bcout = bitcast i64 addrspace(1)* %out to i8 addrspace(1)*
call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %bcout, i8 addrspace(1)* %bcin, i64 32, i32 4, i1 false) nounwind call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* align 4 %bcout, i8 addrspace(1)* align 4 %bcin, i64 32, i1 false) nounwind
ret void ret void
} }
@ -310,7 +310,7 @@ define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align4(i64 add
define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align8(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind { define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align8(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
%bcin = bitcast i64 addrspace(1)* %in to i8 addrspace(1)* %bcin = bitcast i64 addrspace(1)* %in to i8 addrspace(1)*
%bcout = bitcast i64 addrspace(1)* %out to i8 addrspace(1)* %bcout = bitcast i64 addrspace(1)* %out to i8 addrspace(1)*
call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %bcout, i8 addrspace(1)* %bcin, i64 32, i32 8, i1 false) nounwind call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* align 8 %bcout, i8 addrspace(1)* align 8 %bcin, i64 32, i1 false) nounwind
ret void ret void
} }
@ -323,7 +323,7 @@ define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align8(i64 add
define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align16(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind { define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align16(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
%bcin = bitcast i64 addrspace(1)* %in to i8 addrspace(1)* %bcin = bitcast i64 addrspace(1)* %in to i8 addrspace(1)*
%bcout = bitcast i64 addrspace(1)* %out to i8 addrspace(1)* %bcout = bitcast i64 addrspace(1)* %out to i8 addrspace(1)*
call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %bcout, i8 addrspace(1)* %bcin, i64 32, i32 16, i1 false) nounwind call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* align 16 %bcout, i8 addrspace(1)* align 16 %bcin, i64 32, i1 false) nounwind
ret void ret void
} }
@ -342,7 +342,7 @@ define amdgpu_kernel void @test_small_memcpy_i64_global_to_global_align16(i64 ad
; SI-DAG: buffer_store_dwordx4 ; SI-DAG: buffer_store_dwordx4
define amdgpu_kernel void @test_memcpy_const_string_align4(i8 addrspace(1)* noalias %out) nounwind { define amdgpu_kernel void @test_memcpy_const_string_align4(i8 addrspace(1)* noalias %out) nounwind {
%str = bitcast [16 x i8] addrspace(2)* @hello.align4 to i8 addrspace(2)* %str = bitcast [16 x i8] addrspace(2)* @hello.align4 to i8 addrspace(2)*
call void @llvm.memcpy.p1i8.p2i8.i64(i8 addrspace(1)* %out, i8 addrspace(2)* %str, i64 32, i32 4, i1 false) call void @llvm.memcpy.p1i8.p2i8.i64(i8 addrspace(1)* align 4 %out, i8 addrspace(2)* align 4 %str, i64 32, i1 false)
ret void ret void
} }
@ -367,6 +367,6 @@ define amdgpu_kernel void @test_memcpy_const_string_align4(i8 addrspace(1)* noal
; SI: buffer_store_byte ; SI: buffer_store_byte
define amdgpu_kernel void @test_memcpy_const_string_align1(i8 addrspace(1)* noalias %out) nounwind { define amdgpu_kernel void @test_memcpy_const_string_align1(i8 addrspace(1)* noalias %out) nounwind {
%str = bitcast [16 x i8] addrspace(2)* @hello.align1 to i8 addrspace(2)* %str = bitcast [16 x i8] addrspace(2)* @hello.align1 to i8 addrspace(2)*
call void @llvm.memcpy.p1i8.p2i8.i64(i8 addrspace(1)* %out, i8 addrspace(2)* %str, i64 32, i32 1, i1 false) call void @llvm.memcpy.p1i8.p2i8.i64(i8 addrspace(1)* %out, i8 addrspace(2)* %str, i64 32, i1 false)
ret void ret void
} }

42
llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
View File

@ -1,16 +1,16 @@
; RUN: opt -S -amdgpu-lower-intrinsics %s | FileCheck -check-prefix=OPT %s ; RUN: opt -S -amdgpu-lower-intrinsics %s | FileCheck -check-prefix=OPT %s
declare void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(1)* nocapture readonly, i64, i32, i1) #1 declare void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(1)* nocapture readonly, i64, i1) #1
declare void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* nocapture, i8 addrspace(3)* nocapture readonly, i32, i32, i1) #1 declare void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* nocapture, i8 addrspace(3)* nocapture readonly, i32, i1) #1
declare void @llvm.memmove.p1i8.p1i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(1)* nocapture readonly, i64, i32, i1) #1 declare void @llvm.memmove.p1i8.p1i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(1)* nocapture readonly, i64, i1) #1
declare void @llvm.memset.p1i8.i64(i8 addrspace(1)* nocapture, i8, i64, i32, i1) #1 declare void @llvm.memset.p1i8.i64(i8 addrspace(1)* nocapture, i8, i64, i1) #1
; Test the upper bound for sizes to leave ; Test the upper bound for sizes to leave
; OPT-LABEL: @max_size_small_static_memcpy_caller0( ; OPT-LABEL: @max_size_small_static_memcpy_caller0(
; OPT: call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 1024, i32 1, i1 false) ; OPT: call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 1024, i1 false)
define amdgpu_kernel void @max_size_small_static_memcpy_caller0(i8 addrspace(1)* %dst, i8 addrspace(1)* %src) #0 { define amdgpu_kernel void @max_size_small_static_memcpy_caller0(i8 addrspace(1)* %dst, i8 addrspace(1)* %src) #0 {
call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 1024, i32 1, i1 false) call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 1024, i1 false)
ret void ret void
} }
@ -26,14 +26,14 @@ define amdgpu_kernel void @max_size_small_static_memcpy_caller0(i8 addrspace(1)*
; OPT-NEXT: [[T5:%[0-9]+]] = icmp ult i64 [[T4]], 1025 ; OPT-NEXT: [[T5:%[0-9]+]] = icmp ult i64 [[T4]], 1025
; OPT-NEXT: br i1 [[T5]], label %load-store-loop, label %memcpy-split ; OPT-NEXT: br i1 [[T5]], label %load-store-loop, label %memcpy-split
define amdgpu_kernel void @min_size_large_static_memcpy_caller0(i8 addrspace(1)* %dst, i8 addrspace(1)* %src) #0 { define amdgpu_kernel void @min_size_large_static_memcpy_caller0(i8 addrspace(1)* %dst, i8 addrspace(1)* %src) #0 {
call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 1025, i32 1, i1 false) call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 1025, i1 false)
ret void ret void
} }
; OPT-LABEL: @max_size_small_static_memmove_caller0( ; OPT-LABEL: @max_size_small_static_memmove_caller0(
; OPT: call void @llvm.memmove.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 1024, i32 1, i1 false) ; OPT: call void @llvm.memmove.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 1024, i1 false)
define amdgpu_kernel void @max_size_small_static_memmove_caller0(i8 addrspace(1)* %dst, i8 addrspace(1)* %src) #0 { define amdgpu_kernel void @max_size_small_static_memmove_caller0(i8 addrspace(1)* %dst, i8 addrspace(1)* %src) #0 {
call void @llvm.memmove.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 1024, i32 1, i1 false) call void @llvm.memmove.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 1024, i1 false)
ret void ret void
} }
@ -44,14 +44,14 @@ define amdgpu_kernel void @max_size_small_static_memmove_caller0(i8 addrspace(1)
; OPT: getelementptr ; OPT: getelementptr
; OPT-NEXT: store i8 ; OPT-NEXT: store i8
define amdgpu_kernel void @min_size_large_static_memmove_caller0(i8 addrspace(1)* %dst, i8 addrspace(1)* %src) #0 { define amdgpu_kernel void @min_size_large_static_memmove_caller0(i8 addrspace(1)* %dst, i8 addrspace(1)* %src) #0 {
call void @llvm.memmove.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 1025, i32 1, i1 false) call void @llvm.memmove.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 1025, i1 false)
ret void ret void
} }
; OPT-LABEL: @max_size_small_static_memset_caller0( ; OPT-LABEL: @max_size_small_static_memset_caller0(
; OPT: call void @llvm.memset.p1i8.i64(i8 addrspace(1)* %dst, i8 %val, i64 1024, i32 1, i1 false) ; OPT: call void @llvm.memset.p1i8.i64(i8 addrspace(1)* %dst, i8 %val, i64 1024, i1 false)
define amdgpu_kernel void @max_size_small_static_memset_caller0(i8 addrspace(1)* %dst, i8 %val) #0 { define amdgpu_kernel void @max_size_small_static_memset_caller0(i8 addrspace(1)* %dst, i8 %val) #0 {
call void @llvm.memset.p1i8.i64(i8 addrspace(1)* %dst, i8 %val, i64 1024, i32 1, i1 false) call void @llvm.memset.p1i8.i64(i8 addrspace(1)* %dst, i8 %val, i64 1024, i1 false)
ret void ret void
} }
@ -60,7 +60,7 @@ define amdgpu_kernel void @max_size_small_static_memset_caller0(i8 addrspace(1)*
; OPT: getelementptr ; OPT: getelementptr
; OPT: store i8 ; OPT: store i8
define amdgpu_kernel void @min_size_large_static_memset_caller0(i8 addrspace(1)* %dst, i8 %val) #0 { define amdgpu_kernel void @min_size_large_static_memset_caller0(i8 addrspace(1)* %dst, i8 %val) #0 {
call void @llvm.memset.p1i8.i64(i8 addrspace(1)* %dst, i8 %val, i64 1025, i32 1, i1 false) call void @llvm.memset.p1i8.i64(i8 addrspace(1)* %dst, i8 %val, i64 1025, i1 false)
ret void ret void
} }
@ -68,7 +68,7 @@ define amdgpu_kernel void @min_size_large_static_memset_caller0(i8 addrspace(1)*
; OPT-NOT: call ; OPT-NOT: call
; OPT: phi ; OPT: phi
define amdgpu_kernel void @variable_memcpy_caller0(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 %n) #0 { define amdgpu_kernel void @variable_memcpy_caller0(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 %n) #0 {
call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 %n, i32 1, i1 false) call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 %n, i1 false)
ret void ret void
} }
@ -76,7 +76,7 @@ define amdgpu_kernel void @variable_memcpy_caller0(i8 addrspace(1)* %dst, i8 add
; OPT-NOT: call ; OPT-NOT: call
; OPT: phi ; OPT: phi
define amdgpu_kernel void @variable_memcpy_caller1(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 %n) #0 { define amdgpu_kernel void @variable_memcpy_caller1(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 %n) #0 {
call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 %n, i32 1, i1 false) call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 %n, i1 false)
ret void ret void
} }
@ -87,8 +87,8 @@ define amdgpu_kernel void @variable_memcpy_caller1(i8 addrspace(1)* %dst, i8 add
; OPT: phi ; OPT: phi
; OPT-NOT: call ; OPT-NOT: call
define amdgpu_kernel void @memcpy_multi_use_one_function(i8 addrspace(1)* %dst0, i8 addrspace(1)* %dst1, i8 addrspace(1)* %src, i64 %n, i64 %m) #0 { define amdgpu_kernel void @memcpy_multi_use_one_function(i8 addrspace(1)* %dst0, i8 addrspace(1)* %dst1, i8 addrspace(1)* %src, i64 %n, i64 %m) #0 {
call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst0, i8 addrspace(1)* %src, i64 %n, i32 1, i1 false) call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst0, i8 addrspace(1)* %src, i64 %n, i1 false)
call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst1, i8 addrspace(1)* %src, i64 %m, i32 1, i1 false) call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst1, i8 addrspace(1)* %src, i64 %m, i1 false)
ret void ret void
} }
@ -99,7 +99,7 @@ define amdgpu_kernel void @memcpy_multi_use_one_function(i8 addrspace(1)* %dst0,
; OPT: getelementptr inbounds i8, i8 addrspace(1)* ; OPT: getelementptr inbounds i8, i8 addrspace(1)*
; OPT: store i8 ; OPT: store i8
define amdgpu_kernel void @memcpy_alt_type(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i32 %n) #0 { define amdgpu_kernel void @memcpy_alt_type(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i32 %n) #0 {
call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i32 %n, i32 1, i1 false) call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i32 %n, i1 false)
ret void ret void
} }
@ -110,10 +110,10 @@ define amdgpu_kernel void @memcpy_alt_type(i8 addrspace(1)* %dst, i8 addrspace(3
; OPT: getelementptr inbounds i8, i8 addrspace(1)* ; OPT: getelementptr inbounds i8, i8 addrspace(1)*
; OPT: store i8 ; OPT: store i8
; OPT: call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst1, i8 addrspace(1)* %src, i64 102, i32 1, i1 false) ; OPT: call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst1, i8 addrspace(1)* %src, i64 102, i1 false)
define amdgpu_kernel void @memcpy_multi_use_one_function_keep_small(i8 addrspace(1)* %dst0, i8 addrspace(1)* %dst1, i8 addrspace(1)* %src, i64 %n) #0 { define amdgpu_kernel void @memcpy_multi_use_one_function_keep_small(i8 addrspace(1)* %dst0, i8 addrspace(1)* %dst1, i8 addrspace(1)* %src, i64 %n) #0 {
call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst0, i8 addrspace(1)* %src, i64 %n, i32 1, i1 false) call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst0, i8 addrspace(1)* %src, i64 %n, i1 false)
call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst1, i8 addrspace(1)* %src, i64 102, i32 1, i1 false) call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst1, i8 addrspace(1)* %src, i64 102, i1 false)
ret void ret void
} }

30
llvm/test/CodeGen/AMDGPU/promote-alloca-mem-intrinsics.ll
View File

@ -1,52 +1,52 @@
; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -amdgpu-promote-alloca < %s | FileCheck %s ; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -amdgpu-promote-alloca < %s | FileCheck %s
declare void @llvm.memcpy.p0i8.p1i8.i32(i8* nocapture, i8 addrspace(1)* nocapture, i32, i32, i1) #0 declare void @llvm.memcpy.p0i8.p1i8.i32(i8* nocapture, i8 addrspace(1)* nocapture, i32, i1) #0
declare void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* nocapture, i8* nocapture, i32, i32, i1) #0 declare void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* nocapture, i8* nocapture, i32, i1) #0
declare void @llvm.memmove.p0i8.p1i8.i32(i8* nocapture, i8 addrspace(1)* nocapture, i32, i32, i1) #0 declare void @llvm.memmove.p0i8.p1i8.i32(i8* nocapture, i8 addrspace(1)* nocapture, i32, i1) #0
declare void @llvm.memmove.p1i8.p0i8.i32(i8 addrspace(1)* nocapture, i8* nocapture, i32, i32, i1) #0 declare void @llvm.memmove.p1i8.p0i8.i32(i8 addrspace(1)* nocapture, i8* nocapture, i32, i1) #0
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) #0 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) #0
declare i32 @llvm.objectsize.i32.p0i8(i8*, i1, i1) #1 declare i32 @llvm.objectsize.i32.p0i8(i8*, i1, i1) #1
; CHECK-LABEL: @promote_with_memcpy( ; CHECK-LABEL: @promote_with_memcpy(
; CHECK: getelementptr inbounds [64 x [17 x i32]], [64 x [17 x i32]] addrspace(3)* @promote_with_memcpy.alloca, i32 0, i32 %{{[0-9]+}} ; CHECK: getelementptr inbounds [64 x [17 x i32]], [64 x [17 x i32]] addrspace(3)* @promote_with_memcpy.alloca, i32 0, i32 %{{[0-9]+}}
; CHECK: call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %alloca.bc, i8 addrspace(1)* %in.bc, i32 68, i32 4, i1 false) ; CHECK: call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* align 4 %alloca.bc, i8 addrspace(1)* align 4 %in.bc, i32 68, i1 false)
; CHECK: call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out.bc, i8 addrspace(3)* %alloca.bc, i32 68, i32 4, i1 false) ; CHECK: call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 4 %out.bc, i8 addrspace(3)* align 4 %alloca.bc, i32 68, i1 false)
define amdgpu_kernel void @promote_with_memcpy(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 { define amdgpu_kernel void @promote_with_memcpy(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
%alloca = alloca [17 x i32], align 4 %alloca = alloca [17 x i32], align 4
%alloca.bc = bitcast [17 x i32]* %alloca to i8* %alloca.bc = bitcast [17 x i32]* %alloca to i8*
%in.bc = bitcast i32 addrspace(1)* %in to i8 addrspace(1)* %in.bc = bitcast i32 addrspace(1)* %in to i8 addrspace(1)*
%out.bc = bitcast i32 addrspace(1)* %out to i8 addrspace(1)* %out.bc = bitcast i32 addrspace(1)* %out to i8 addrspace(1)*
call void @llvm.memcpy.p0i8.p1i8.i32(i8* %alloca.bc, i8 addrspace(1)* %in.bc, i32 68, i32 4, i1 false) call void @llvm.memcpy.p0i8.p1i8.i32(i8* align 4 %alloca.bc, i8 addrspace(1)* align 4 %in.bc, i32 68, i1 false)
call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* %out.bc, i8* %alloca.bc, i32 68, i32 4, i1 false) call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* align 4 %out.bc, i8* align 4 %alloca.bc, i32 68, i1 false)
ret void ret void
} }
; CHECK-LABEL: @promote_with_memmove( ; CHECK-LABEL: @promote_with_memmove(
; CHECK: getelementptr inbounds [64 x [17 x i32]], [64 x [17 x i32]] addrspace(3)* @promote_with_memmove.alloca, i32 0, i32 %{{[0-9]+}} ; CHECK: getelementptr inbounds [64 x [17 x i32]], [64 x [17 x i32]] addrspace(3)* @promote_with_memmove.alloca, i32 0, i32 %{{[0-9]+}}
; CHECK: call void @llvm.memmove.p3i8.p1i8.i32(i8 addrspace(3)* %alloca.bc, i8 addrspace(1)* %in.bc, i32 68, i32 4, i1 false) ; CHECK: call void @llvm.memmove.p3i8.p1i8.i32(i8 addrspace(3)* align 4 %alloca.bc, i8 addrspace(1)* align 4 %in.bc, i32 68, i1 false)
; CHECK: call void @llvm.memmove.p1i8.p3i8.i32(i8 addrspace(1)* %out.bc, i8 addrspace(3)* %alloca.bc, i32 68, i32 4, i1 false) ; CHECK: call void @llvm.memmove.p1i8.p3i8.i32(i8 addrspace(1)* align 4 %out.bc, i8 addrspace(3)* align 4 %alloca.bc, i32 68, i1 false)
define amdgpu_kernel void @promote_with_memmove(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 { define amdgpu_kernel void @promote_with_memmove(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
%alloca = alloca [17 x i32], align 4 %alloca = alloca [17 x i32], align 4
%alloca.bc = bitcast [17 x i32]* %alloca to i8* %alloca.bc = bitcast [17 x i32]* %alloca to i8*
%in.bc = bitcast i32 addrspace(1)* %in to i8 addrspace(1)* %in.bc = bitcast i32 addrspace(1)* %in to i8 addrspace(1)*
%out.bc = bitcast i32 addrspace(1)* %out to i8 addrspace(1)* %out.bc = bitcast i32 addrspace(1)* %out to i8 addrspace(1)*
call void @llvm.memmove.p0i8.p1i8.i32(i8* %alloca.bc, i8 addrspace(1)* %in.bc, i32 68, i32 4, i1 false) call void @llvm.memmove.p0i8.p1i8.i32(i8* align 4 %alloca.bc, i8 addrspace(1)* align 4 %in.bc, i32 68, i1 false)
call void @llvm.memmove.p1i8.p0i8.i32(i8 addrspace(1)* %out.bc, i8* %alloca.bc, i32 68, i32 4, i1 false) call void @llvm.memmove.p1i8.p0i8.i32(i8 addrspace(1)* align 4 %out.bc, i8* align 4 %alloca.bc, i32 68, i1 false)
ret void ret void
} }
; CHECK-LABEL: @promote_with_memset( ; CHECK-LABEL: @promote_with_memset(
; CHECK: getelementptr inbounds [64 x [17 x i32]], [64 x [17 x i32]] addrspace(3)* @promote_with_memset.alloca, i32 0, i32 %{{[0-9]+}} ; CHECK: getelementptr inbounds [64 x [17 x i32]], [64 x [17 x i32]] addrspace(3)* @promote_with_memset.alloca, i32 0, i32 %{{[0-9]+}}
; CHECK: call void @llvm.memset.p3i8.i32(i8 addrspace(3)* %alloca.bc, i8 7, i32 68, i32 4, i1 false) ; CHECK: call void @llvm.memset.p3i8.i32(i8 addrspace(3)* align 4 %alloca.bc, i8 7, i32 68, i1 false)
define amdgpu_kernel void @promote_with_memset(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 { define amdgpu_kernel void @promote_with_memset(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
%alloca = alloca [17 x i32], align 4 %alloca = alloca [17 x i32], align 4
%alloca.bc = bitcast [17 x i32]* %alloca to i8* %alloca.bc = bitcast [17 x i32]* %alloca to i8*
%in.bc = bitcast i32 addrspace(1)* %in to i8 addrspace(1)* %in.bc = bitcast i32 addrspace(1)* %in to i8 addrspace(1)*
%out.bc = bitcast i32 addrspace(1)* %out to i8 addrspace(1)* %out.bc = bitcast i32 addrspace(1)* %out to i8 addrspace(1)*
call void @llvm.memset.p0i8.i32(i8* %alloca.bc, i8 7, i32 68, i32 4, i1 false) call void @llvm.memset.p0i8.i32(i8* align 4 %alloca.bc, i8 7, i32 68, i1 false)
ret void ret void
} }

4
llvm/test/CodeGen/AMDGPU/stack-size-overflow.ll
View File

@ -1,7 +1,7 @@
; RUN: not llc -march=amdgcn < %s 2>&1 | FileCheck -check-prefix=ERROR %s ; RUN: not llc -march=amdgcn < %s 2>&1 | FileCheck -check-prefix=ERROR %s
; RUN: not llc -march=amdgcn < %s | FileCheck -check-prefix=GCN %s ; RUN: not llc -march=amdgcn < %s | FileCheck -check-prefix=GCN %s
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) #1 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) #1
; ERROR: error: stack size limit exceeded (4294967296) in stack_size_limit ; ERROR: error: stack size limit exceeded (4294967296) in stack_size_limit
; GCN: ; ScratchSize: 4294967296 ; GCN: ; ScratchSize: 4294967296
@ -9,6 +9,6 @@ define amdgpu_kernel void @stack_size_limit() #0 {
entry: entry:
%alloca = alloca [1073741823 x i32], align 4 %alloca = alloca [1073741823 x i32], align 4
%bc = bitcast [1073741823 x i32]* %alloca to i8* %bc = bitcast [1073741823 x i32]* %alloca to i8*
call void @llvm.memset.p0i8.i32(i8* %bc, i8 9, i32 1073741823, i32 1, i1 true) call void @llvm.memset.p0i8.i32(i8* %bc, i8 9, i32 1073741823, i1 true)
ret void ret void
} }

4
llvm/test/CodeGen/ARM/2009-03-07-SpillerBug.ll
View File

@ -59,7 +59,7 @@ bb3: ; preds = %entry
%34 = fadd double %31, 0.000000e+00 %34 = fadd double %31, 0.000000e+00
%35 = fadd double %32, 0.000000e+00 %35 = fadd double %32, 0.000000e+00
%36 = bitcast %struct.ggPoint3* %x to i8* %36 = bitcast %struct.ggPoint3* %x to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* null, i8* %36, i32 24, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 null, i8* align 4 %36, i32 24, i1 false)
store double %33, double* null, align 8 store double %33, double* null, align 8
br i1 false, label %_Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit, label %bb5.i.i.i br i1 false, label %_Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit, label %bb5.i.i.i
@ -76,4 +76,4 @@ bb7: ; preds = %entry
ret i32 0 ret i32 0
} }
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind

4
llvm/test/CodeGen/ARM/2011-03-10-DAGCombineCrash.ll
View File

@ -16,7 +16,7 @@ bb: ; preds = %entry
bb1: ; preds = %entry bb1: ; preds = %entry
%0 = call %struct.ui* @vn_pp_to_ui(i32* undef) nounwind %0 = call %struct.ui* @vn_pp_to_ui(i32* undef) nounwind
call void @llvm.memset.p0i8.i32(i8* undef, i8 0, i32 40, i32 4, i1 false) call void @llvm.memset.p0i8.i32(i8* align 4 undef, i8 0, i32 40, i1 false)
%1 = getelementptr inbounds %struct.ui, %struct.ui* %0, i32 0, i32 0 %1 = getelementptr inbounds %struct.ui, %struct.ui* %0, i32 0, i32 0
store %struct.mo* undef, %struct.mo** %1, align 4 store %struct.mo* undef, %struct.mo** %1, align 4
%2 = getelementptr inbounds %struct.ui, %struct.ui* %0, i32 0, i32 5 %2 = getelementptr inbounds %struct.ui, %struct.ui* %0, i32 0, i32 5
@ -40,7 +40,7 @@ bb6: ; preds = %bb3
declare %struct.ui* @vn_pp_to_ui(i32*) declare %struct.ui* @vn_pp_to_ui(i32*)
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind
declare i32 @mo_create_nnm(%struct.mo*, i64, i32**) declare i32 @mo_create_nnm(%struct.mo*, i64, i32**)

4
llvm/test/CodeGen/ARM/2011-10-26-memset-inline.ll
View File

@ -14,8 +14,8 @@ target triple = "thumbv7-apple-ios5.0.0"
; CHECK-UNALIGNED: str ; CHECK-UNALIGNED: str
define void @foo(i8* nocapture %c) nounwind optsize { define void @foo(i8* nocapture %c) nounwind optsize {
entry: entry:
call void @llvm.memset.p0i8.i64(i8* %c, i8 -1, i64 5, i32 1, i1 false) call void @llvm.memset.p0i8.i64(i8* %c, i8 -1, i64 5, i1 false)
ret void ret void
} }
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind

4
llvm/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll
View File

@ -5,8 +5,8 @@
; CHECK: vst1.64 ; CHECK: vst1.64
define void @f_0_40(i8* nocapture %c) nounwind optsize { define void @f_0_40(i8* nocapture %c) nounwind optsize {
entry: entry:
call void @llvm.memset.p0i8.i64(i8* %c, i8 0, i64 40, i32 16, i1 false) call void @llvm.memset.p0i8.i64(i8* align 16 %c, i8 0, i64 40, i1 false)
ret void ret void
} }
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind

2
llvm/test/CodeGen/ARM/2012-04-24-SplitEHCriticalEdge.ll
View File

@ -19,7 +19,7 @@ declare i32 @llvm.eh.typeid.for(i8*) nounwind readnone
declare i8* @__cxa_begin_catch(i8*) declare i8* @__cxa_begin_catch(i8*)
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
declare void @__cxa_end_catch() declare void @__cxa_end_catch()

4
llvm/test/CodeGen/ARM/Windows/memset.ll
View File

@ -2,11 +2,11 @@
@source = common global [512 x i8] zeroinitializer, align 4 @source = common global [512 x i8] zeroinitializer, align 4
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind
define void @function() { define void @function() {
entry: entry:
call void @llvm.memset.p0i8.i32(i8* bitcast ([512 x i8]* @source to i8*), i8 0, i32 512, i32 0, i1 false) call void @llvm.memset.p0i8.i32(i8* bitcast ([512 x i8]* @source to i8*), i8 0, i32 512, i1 false)
unreachable unreachable
} }

8
llvm/test/CodeGen/ARM/Windows/no-aeabi.ll
View File

@ -1,14 +1,14 @@
; RUN: llc -mtriple=thumbv7-windows-itanium -mcpu=cortex-a9 -verify-machineinstrs -o - %s | FileCheck %s ; RUN: llc -mtriple=thumbv7-windows-itanium -mcpu=cortex-a9 -verify-machineinstrs -o - %s | FileCheck %s
declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
@source = common global [512 x i8] zeroinitializer, align 4 @source = common global [512 x i8] zeroinitializer, align 4
@target = common global [512 x i8] zeroinitializer, align 4 @target = common global [512 x i8] zeroinitializer, align 4
define void @move() nounwind { define void @move() nounwind {
entry: entry:
call void @llvm.memmove.p0i8.p0i8.i32(i8* bitcast ([512 x i8]* @target to i8*), i8* bitcast ([512 x i8]* @source to i8*), i32 512, i32 0, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* bitcast ([512 x i8]* @target to i8*), i8* bitcast ([512 x i8]* @source to i8*), i32 512, i1 false)
unreachable unreachable
} }
@ -16,7 +16,7 @@ entry:
define void @copy() nounwind { define void @copy() nounwind {
entry: entry:
call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast ([512 x i8]* @target to i8*), i8* bitcast ([512 x i8]* @source to i8*), i32 512, i32 0, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast ([512 x i8]* @target to i8*), i8* bitcast ([512 x i8]* @source to i8*), i32 512, i1 false)
unreachable unreachable
} }

14
llvm/test/CodeGen/ARM/arm-eabi.ll
View File

@ -39,7 +39,7 @@ define void @foo(i32* %t) {
%4 = bitcast %struct.my_s* %3 to i8* %4 = bitcast %struct.my_s* %3 to i8*
; CHECK-EABI: bl __aeabi_memcpy ; CHECK-EABI: bl __aeabi_memcpy
; CHECK-GNUEABI: bl memcpy ; CHECK-GNUEABI: bl memcpy
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %4, i8* inttoptr (i32 1 to i8*), i32 72, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %4, i8* align 4 inttoptr (i32 1 to i8*), i32 72, i1 false)
ret void ret void
} }
@ -50,22 +50,22 @@ entry:
; memmove ; memmove
; CHECK-EABI: bl __aeabi_memmove ; CHECK-EABI: bl __aeabi_memmove
; CHECK-GNUEABI: bl memmove ; CHECK-GNUEABI: bl memmove
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 0, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i1 false)
; memcpy ; memcpy
; CHECK-EABI: bl __aeabi_memcpy ; CHECK-EABI: bl __aeabi_memcpy
; CHECK-GNUEABI: bl memcpy ; CHECK-GNUEABI: bl memcpy
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 0, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i1 false)
; memset ; memset
; CHECK-EABI: mov r2, #1 ; CHECK-EABI: mov r2, #1
; CHECK-EABI: bl __aeabi_memset ; CHECK-EABI: bl __aeabi_memset
; CHECK-GNUEABI: mov r1, #1 ; CHECK-GNUEABI: mov r1, #1
; CHECK-GNUEABI: bl memset ; CHECK-GNUEABI: bl memset
call void @llvm.memset.p0i8.i32(i8* %dest, i8 1, i32 500, i32 0, i1 false) call void @llvm.memset.p0i8.i32(i8* %dest, i8 1, i32 500, i1 false)
ret void ret void
} }
declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind

4
llvm/test/CodeGen/ARM/constantpool-promote-ldrh.ll
View File

@ -12,10 +12,10 @@ target triple = "thumbv6m-arm-linux-gnueabi"
; CHECK: ldrh r{{[0-9]+}}, {{\[}}[[base]]] ; CHECK: ldrh r{{[0-9]+}}, {{\[}}[[base]]]
define hidden i32 @fn1() #0 { define hidden i32 @fn1() #0 {
entry: entry:
call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* bitcast ([4 x i16]* @fn1.a to i8*), i32 8, i32 2, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 2 undef, i8* align 2 bitcast ([4 x i16]* @fn1.a to i8*), i32 8, i1 false)
ret i32 undef ret i32 undef
} }
; Function Attrs: argmemonly nounwind ; Function Attrs: argmemonly nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1)
attributes #0 = { "target-features"="+strict-align" } attributes #0 = { "target-features"="+strict-align" }

14
llvm/test/CodeGen/ARM/constantpool-promote.ll
View File

@ -120,7 +120,7 @@ define void @fn1() "target-features"="+strict-align" {
entry: entry:
%a = alloca [4 x i16], align 2 %a = alloca [4 x i16], align 2
%0 = bitcast [4 x i16]* %a to i8* %0 = bitcast [4 x i16]* %a to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* bitcast ([4 x i16]* @fn1.a to i8*), i32 8, i32 2, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 2 %0, i8* align 2 bitcast ([4 x i16]* @fn1.a to i8*), i32 8, i1 false)
ret void ret void
} }
@ -128,7 +128,7 @@ define void @fn2() "target-features"="+strict-align" {
entry: entry:
%a = alloca [8 x i8], align 2 %a = alloca [8 x i8], align 2
%0 = bitcast [8 x i8]* %a to i8* %0 = bitcast [8 x i8]* %a to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* bitcast ([8 x i8]* @fn2.a to i8*), i32 16, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* bitcast ([8 x i8]* @fn2.a to i8*), i32 16, i1 false)
ret void ret void
} }
@ -156,7 +156,7 @@ define void @pr32130() #0 {
; CHECK-V7: [[x]]: ; CHECK-V7: [[x]]:
; CHECK-V7: .asciz "s\000\000" ; CHECK-V7: .asciz "s\000\000"
define void @test10(i8* %a) local_unnamed_addr #0 { define void @test10(i8* %a) local_unnamed_addr #0 {
call void @llvm.memmove.p0i8.p0i8.i32(i8* %a, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i32 0, i32 0), i32 1, i32 1, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* align 1 %a, i8* align 1 getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i32 0, i32 0), i32 1, i1 false)
ret void ret void
} }
@ -174,16 +174,16 @@ define void @test10(i8* %a) local_unnamed_addr #0 {
; CHECK-V7ARM: .short 3 ; CHECK-V7ARM: .short 3
; CHECK-V7ARM: .short 4 ; CHECK-V7ARM: .short 4
define void @test11(i16* %a) local_unnamed_addr #0 { define void @test11(i16* %a) local_unnamed_addr #0 {
call void @llvm.memmove.p0i16.p0i16.i32(i16* %a, i16* getelementptr inbounds ([2 x i16], [2 x i16]* @.arr1, i32 0, i32 0), i32 2, i32 2, i1 false) call void @llvm.memmove.p0i16.p0i16.i32(i16* align 2 %a, i16* align 2 getelementptr inbounds ([2 x i16], [2 x i16]* @.arr1, i32 0, i32 0), i32 2, i1 false)
ret void ret void
} }
declare void @b(i8*) #1 declare void @b(i8*) #1
declare void @c(i16*) #1 declare void @c(i16*) #1
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1)
declare void @llvm.memmove.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) local_unnamed_addr declare void @llvm.memmove.p0i8.p0i8.i32(i8*, i8*, i32, i1) local_unnamed_addr
declare void @llvm.memmove.p0i16.p0i16.i32(i16*, i16*, i32, i32, i1) local_unnamed_addr declare void @llvm.memmove.p0i16.p0i16.i32(i16*, i16*, i32, i1) local_unnamed_addr
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

6
llvm/test/CodeGen/ARM/crash-O0.ll
View File

@ -12,7 +12,7 @@ entry:
} }
@.str523 = private constant [256 x i8] c"<Unknown>\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 4 ; <[256 x i8]*> [#uses=1] @.str523 = private constant [256 x i8] c"<Unknown>\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 4 ; <[256 x i8]*> [#uses=1]
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
; This function uses the scavenger for an ADDri instruction. ; This function uses the scavenger for an ADDri instruction.
; ARMBaseRegisterInfo::estimateRSStackSizeLimit must return a 255 limit. ; ARMBaseRegisterInfo::estimateRSStackSizeLimit must return a 255 limit.
@ -21,8 +21,8 @@ entry:
%letter = alloca i8 ; <i8*> [#uses=0] %letter = alloca i8 ; <i8*> [#uses=0]
%prodvers = alloca [256 x i8] ; <[256 x i8]*> [#uses=1] %prodvers = alloca [256 x i8] ; <[256 x i8]*> [#uses=1]
%buildver = alloca [256 x i8] ; <[256 x i8]*> [#uses=0] %buildver = alloca [256 x i8] ; <[256 x i8]*> [#uses=0]
call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* getelementptr inbounds ([256 x i8], [256 x i8]* @.str523, i32 0, i32 0), i32 256, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 undef, i8* align 1 getelementptr inbounds ([256 x i8], [256 x i8]* @.str523, i32 0, i32 0), i32 256, i1 false)
%prodvers2 = bitcast [256 x i8]* %prodvers to i8* ; <i8*> [#uses=1] %prodvers2 = bitcast [256 x i8]* %prodvers to i8* ; <i8*> [#uses=1]
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %prodvers2, i8* getelementptr inbounds ([256 x i8], [256 x i8]* @.str523, i32 0, i32 0), i32 256, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %prodvers2, i8* align 1 getelementptr inbounds ([256 x i8], [256 x i8]* @.str523, i32 0, i32 0), i32 256, i1 false)
unreachable unreachable
} }

6
llvm/test/CodeGen/ARM/debug-info-blocks.ll
View File

@ -35,7 +35,7 @@ declare i8* @objc_msgSend(i8*, i8*, ...)
declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
define hidden void @foobar_func_block_invoke_0(i8* %.block_descriptor, %0* %loadedMydata, [4 x i32] %bounds.coerce0, [4 x i32] %data.coerce0) ssp !dbg !23 { define hidden void @foobar_func_block_invoke_0(i8* %.block_descriptor, %0* %loadedMydata, [4 x i32] %bounds.coerce0, [4 x i32] %data.coerce0) ssp !dbg !23 {
%1 = alloca %0*, align 4 %1 = alloca %0*, align 4
@ -77,7 +77,7 @@ define hidden void @foobar_func_block_invoke_0(i8* %.block_descriptor, %0* %load
%24 = bitcast i8* %23 to %struct.CR*, !dbg !143 %24 = bitcast i8* %23 to %struct.CR*, !dbg !143
%25 = bitcast %struct.CR* %24 to i8*, !dbg !143 %25 = bitcast %struct.CR* %24 to i8*, !dbg !143
%26 = bitcast %struct.CR* %data to i8*, !dbg !143 %26 = bitcast %struct.CR* %data to i8*, !dbg !143
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %25, i8* %26, i32 16, i32 4, i1 false), !dbg !143 call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %25, i8* align 4 %26, i32 16, i1 false), !dbg !143
%27 = getelementptr inbounds %2, %2* %6, i32 0, i32 6, !dbg !144 %27 = getelementptr inbounds %2, %2* %6, i32 0, i32 6, !dbg !144
%28 = load %3*, %3** %27, align 4, !dbg !144 %28 = load %3*, %3** %27, align 4, !dbg !144
%29 = load i32, i32* @"OBJC_IVAR_$_MyWork._bounds", !dbg !144 %29 = load i32, i32* @"OBJC_IVAR_$_MyWork._bounds", !dbg !144
@ -86,7 +86,7 @@ define hidden void @foobar_func_block_invoke_0(i8* %.block_descriptor, %0* %load
%32 = bitcast i8* %31 to %struct.CR*, !dbg !144 %32 = bitcast i8* %31 to %struct.CR*, !dbg !144
%33 = bitcast %struct.CR* %32 to i8*, !dbg !144 %33 = bitcast %struct.CR* %32 to i8*, !dbg !144
%34 = bitcast %struct.CR* %bounds to i8*, !dbg !144 %34 = bitcast %struct.CR* %bounds to i8*, !dbg !144
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %33, i8* %34, i32 16, i32 4, i1 false), !dbg !144 call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %33, i8* align 4 %34, i32 16, i1 false), !dbg !144
%35 = getelementptr inbounds %2, %2* %6, i32 0, i32 6, !dbg !145 %35 = getelementptr inbounds %2, %2* %6, i32 0, i32 6, !dbg !145
%36 = load %3*, %3** %35, align 4, !dbg !145 %36 = load %3*, %3** %35, align 4, !dbg !145
%37 = getelementptr inbounds %2, %2* %6, i32 0, i32 5, !dbg !145 %37 = getelementptr inbounds %2, %2* %6, i32 0, i32 5, !dbg !145

4
llvm/test/CodeGen/ARM/dyn-stackalloc.ll
View File

@ -51,7 +51,7 @@ define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) {
%tmp9 = call i8* @strcpy(i8* %tmp6, i8* %tag) %tmp9 = call i8* @strcpy(i8* %tmp6, i8* %tag)
%tmp6.len = call i32 @strlen(i8* %tmp6) %tmp6.len = call i32 @strlen(i8* %tmp6)
%tmp6.indexed = getelementptr i8, i8* %tmp6, i32 %tmp6.len %tmp6.indexed = getelementptr i8, i8* %tmp6, i32 %tmp6.len
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp6.indexed, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %tmp6.indexed, i8* align 1 getelementptr inbounds ([2 x i8], [2 x i8]* @str215, i32 0, i32 0), i32 2, i1 false)
%tmp15 = call i8* @strcat(i8* %tmp6, i8* %contents) %tmp15 = call i8* @strcat(i8* %tmp6, i8* %contents)
call fastcc void @comment_add(%struct.comment* %vc, i8* %tmp6) call fastcc void @comment_add(%struct.comment* %vc, i8* %tmp6)
ret void ret void
@ -65,4 +65,4 @@ declare fastcc void @comment_add(%struct.comment*, i8*)
declare i8* @strcpy(i8*, i8*) declare i8* @strcpy(i8*, i8*)
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind

20
llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
View File

@ -44,11 +44,11 @@ define void @t1() nounwind ssp {
; THUMB-LONG: movt r3, :upper16:L_memset$non_lazy_ptr ; THUMB-LONG: movt r3, :upper16:L_memset$non_lazy_ptr
; THUMB-LONG: ldr r3, [r3] ; THUMB-LONG: ldr r3, [r3]
; THUMB-LONG: blx r3 ; THUMB-LONG: blx r3
call void @llvm.memset.p0i8.i32(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @message1, i32 0, i32 5), i8 64, i32 10, i32 4, i1 false) call void @llvm.memset.p0i8.i32(i8* align 4 getelementptr inbounds ([60 x i8], [60 x i8]* @message1, i32 0, i32 5), i8 64, i32 10, i1 false)
ret void ret void
} }
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind
define void @t2() nounwind ssp { define void @t2() nounwind ssp {
; ARM-LABEL: t2: ; ARM-LABEL: t2:
@ -93,11 +93,11 @@ define void @t2() nounwind ssp {
; THUMB-LONG: movt r3, :upper16:L_memcpy$non_lazy_ptr ; THUMB-LONG: movt r3, :upper16:L_memcpy$non_lazy_ptr
; THUMB-LONG: ldr r3, [r3] ; THUMB-LONG: ldr r3, [r3]
; THUMB-LONG: blx r3 ; THUMB-LONG: blx r3
call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 17, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* align 4 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 17, i1 false)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
define void @t3() nounwind ssp { define void @t3() nounwind ssp {
; ARM-LABEL: t3: ; ARM-LABEL: t3:
@ -141,7 +141,7 @@ define void @t3() nounwind ssp {
; THUMB-LONG: movt r3, :upper16:L_memmove$non_lazy_ptr ; THUMB-LONG: movt r3, :upper16:L_memmove$non_lazy_ptr
; THUMB-LONG: ldr r3, [r3] ; THUMB-LONG: ldr r3, [r3]
; THUMB-LONG: blx r3 ; THUMB-LONG: blx r3
call void @llvm.memmove.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* align 1 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* align 1 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i1 false)
ret void ret void
} }
@ -173,11 +173,11 @@ define void @t4() nounwind ssp {
; THUMB: ldrh r1, [r0, #24] ; THUMB: ldrh r1, [r0, #24]
; THUMB: strh r1, [r0, #12] ; THUMB: strh r1, [r0, #12]
; THUMB: bx lr ; THUMB: bx lr
call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* align 4 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i1 false)
ret void ret void
} }
declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
define void @t5() nounwind ssp { define void @t5() nounwind ssp {
; ARM-LABEL: t5: ; ARM-LABEL: t5:
@ -215,7 +215,7 @@ define void @t5() nounwind ssp {
; THUMB: ldrh r1, [r0, #24] ; THUMB: ldrh r1, [r0, #24]
; THUMB: strh r1, [r0, #12] ; THUMB: strh r1, [r0, #12]
; THUMB: bx lr ; THUMB: bx lr
call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i32 2, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 2 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* align 2 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i1 false)
ret void ret void
} }
@ -275,14 +275,14 @@ define void @t6() nounwind ssp {
; THUMB: ldrb r1, [r0, #25] ; THUMB: ldrb r1, [r0, #25]
; THUMB: strb r1, [r0, #13] ; THUMB: strb r1, [r0, #13]
; THUMB: bx lr ; THUMB: bx lr
call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* align 1 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i1 false)
ret void ret void
} }
; rdar://13202135 ; rdar://13202135
define void @t7() nounwind ssp { define void @t7() nounwind ssp {
; Just make sure this doesn't assert when we have an odd length and an alignment of 2. ; Just make sure this doesn't assert when we have an odd length and an alignment of 2.
call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 3, i32 2, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 2 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* align 2 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 3, i1 false)
ret void ret void
} }

4
llvm/test/CodeGen/ARM/interval-update-remat.ll
View File

@ -85,7 +85,7 @@ _ZN7MessageD1Ev.exit33: ; preds = %delete.notnull.i.i.
if.end: ; preds = %_ZN7MessageD1Ev.exit33, %entry if.end: ; preds = %_ZN7MessageD1Ev.exit33, %entry
%message_.i.i = getelementptr inbounds %class.AssertionResult.24.249.299.1324.2349, %class.AssertionResult.24.249.299.1324.2349* %gtest_ar, i32 0, i32 1 %message_.i.i = getelementptr inbounds %class.AssertionResult.24.249.299.1324.2349, %class.AssertionResult.24.249.299.1324.2349* %gtest_ar, i32 0, i32 1
%call.i.i.i = call %class.scoped_ptr.23.248.298.1323.2348* @_ZN10scoped_ptrI25Trans_NS___1_basic_stringIciiEED2Ev(%class.scoped_ptr.23.248.298.1323.2348* %message_.i.i) %call.i.i.i = call %class.scoped_ptr.23.248.298.1323.2348* @_ZN10scoped_ptrI25Trans_NS___1_basic_stringIciiEED2Ev(%class.scoped_ptr.23.248.298.1323.2348* %message_.i.i)
call void @llvm.memset.p0i8.i32(i8* null, i8 0, i32 12, i32 4, i1 false) call void @llvm.memset.p0i8.i32(i8* align 4 null, i8 0, i32 12, i1 false)
call void @_ZN25Trans_NS___1_basic_stringIciiE5m_fn2Ev(%class.Trans_NS___1_basic_string.18.243.293.1318.2343* nonnull %ref.tmp) call void @_ZN25Trans_NS___1_basic_stringIciiE5m_fn2Ev(%class.Trans_NS___1_basic_string.18.243.293.1318.2343* nonnull %ref.tmp)
call void @_Z19CreateSOCKSv5Paramsv(%class.scoped_refptr.19.244.294.1319.2344* nonnull sret %agg.tmp16) call void @_Z19CreateSOCKSv5Paramsv(%class.scoped_refptr.19.244.294.1319.2344* nonnull sret %agg.tmp16)
%callback_.i = getelementptr inbounds %class.TestCompletionCallback.9.234.284.1309.2334, %class.TestCompletionCallback.9.234.284.1309.2334* %callback, i32 0, i32 1 %callback_.i = getelementptr inbounds %class.TestCompletionCallback.9.234.284.1309.2334, %class.TestCompletionCallback.9.234.284.1309.2334* %callback, i32 0, i32 1
@ -137,7 +137,7 @@ declare void @_ZN18ClientSocketHandle5m_fn3IPiEEvRK25Trans_NS___1_basic_stringIc
declare void @_Z19CreateSOCKSv5Paramsv(%class.scoped_refptr.19.244.294.1319.2344* sret) declare void @_Z19CreateSOCKSv5Paramsv(%class.scoped_refptr.19.244.294.1319.2344* sret)
; Function Attrs: argmemonly nounwind ; Function Attrs: argmemonly nounwind
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) #0 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) #0
declare %class.BoundNetLog.20.245.295.1320.2345* @_ZN11BoundNetLogD1Ev(%class.BoundNetLog.20.245.295.1320.2345* returned) unnamed_addr declare %class.BoundNetLog.20.245.295.1320.2345* @_ZN11BoundNetLogD1Ev(%class.BoundNetLog.20.245.295.1320.2345* returned) unnamed_addr

10
llvm/test/CodeGen/ARM/ldm-stm-base-materialization.ll
View File

@ -22,7 +22,7 @@ entry:
%2 = load i32*, i32** @b, align 4 %2 = load i32*, i32** @b, align 4
%arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1 %arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1
%3 = bitcast i32* %arrayidx1 to i8* %3 = bitcast i32* %arrayidx1 to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %1, i8* %3, i32 24, i32 4, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %3, i32 24, i1 false)
ret void ret void
} }
@ -43,7 +43,7 @@ entry:
%2 = load i32*, i32** @b, align 4 %2 = load i32*, i32** @b, align 4
%arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1 %arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1
%3 = bitcast i32* %arrayidx1 to i8* %3 = bitcast i32* %arrayidx1 to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %1, i8* %3, i32 28, i32 4, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %3, i32 28, i1 false)
ret void ret void
} }
@ -64,7 +64,7 @@ entry:
%2 = load i32*, i32** @b, align 4 %2 = load i32*, i32** @b, align 4
%arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1 %arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1
%3 = bitcast i32* %arrayidx1 to i8* %3 = bitcast i32* %arrayidx1 to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %1, i8* %3, i32 32, i32 4, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %3, i32 32, i1 false)
ret void ret void
} }
@ -85,9 +85,9 @@ entry:
%2 = load i32*, i32** @b, align 4 %2 = load i32*, i32** @b, align 4
%arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1 %arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1
%3 = bitcast i32* %arrayidx1 to i8* %3 = bitcast i32* %arrayidx1 to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %1, i8* %3, i32 36, i32 4, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %3, i32 36, i1 false)
ret void ret void
} }
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) #1 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) #1

4
llvm/test/CodeGen/ARM/machine-cse-cmp.ll
View File

@ -37,14 +37,14 @@ entry:
for.body.lr.ph: ; preds = %entry for.body.lr.ph: ; preds = %entry
%1 = icmp sgt i32 %0, 1 %1 = icmp sgt i32 %0, 1
%smax = select i1 %1, i32 %0, i32 1 %smax = select i1 %1, i32 %0, i32 1
call void @llvm.memset.p0i8.i32(i8* getelementptr inbounds ([250 x i8], [250 x i8]* @bar, i32 0, i32 0), i8 0, i32 %smax, i32 1, i1 false) call void @llvm.memset.p0i8.i32(i8* getelementptr inbounds ([250 x i8], [250 x i8]* @bar, i32 0, i32 0), i8 0, i32 %smax, i1 false)
unreachable unreachable
for.cond1.preheader: ; preds = %entry for.cond1.preheader: ; preds = %entry
ret void ret void
} }
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind
; rdar://12462006 ; rdar://12462006
define i8* @f3(i8* %base, i32* nocapture %offset, i32 %size) nounwind { define i8* @f3(i8* %base, i32* nocapture %offset, i32 %size) nounwind {

20
llvm/test/CodeGen/ARM/memcpy-inline.ll
View File

@ -23,7 +23,7 @@ entry:
; CHECK-T1: strb [[TREG1]], ; CHECK-T1: strb [[TREG1]],
; CHECK-T1: ldrh [[TREG2:r[0-9]]], ; CHECK-T1: ldrh [[TREG2:r[0-9]]],
; CHECK-T1: strh [[TREG2]] ; CHECK-T1: strh [[TREG2]]
call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds (%struct.x, %struct.x* @dst, i32 0, i32 0), i8* getelementptr inbounds (%struct.x, %struct.x* @src, i32 0, i32 0), i32 11, i32 8, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @dst, i32 0, i32 0), i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @src, i32 0, i32 0), i32 11, i1 false)
ret i32 0 ret i32 0
} }
@ -37,7 +37,7 @@ entry:
; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0] ; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]
; CHECK-T1-LABEL: t1: ; CHECK-T1-LABEL: t1:
; CHECK-T1: bl _memcpy ; CHECK-T1: bl _memcpy
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str1, i64 0, i64 0), i64 31, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str1, i64 0, i64 0), i64 31, i1 false)
ret void ret void
} }
@ -55,7 +55,7 @@ entry:
; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r3] ; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r3]
; CHECK-T1-LABEL: t2: ; CHECK-T1-LABEL: t2:
; CHECK-T1: bl _memcpy ; CHECK-T1: bl _memcpy
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str2, i64 0, i64 0), i64 36, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str2, i64 0, i64 0), i64 36, i1 false)
ret void ret void
} }
@ -68,7 +68,7 @@ entry:
; CHECK: vst1.8 {d{{[0-9]+}}}, [r0] ; CHECK: vst1.8 {d{{[0-9]+}}}, [r0]
; CHECK-T1-LABEL: t3: ; CHECK-T1-LABEL: t3:
; CHECK-T1: bl _memcpy ; CHECK-T1: bl _memcpy
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str3, i64 0, i64 0), i64 24, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str3, i64 0, i64 0), i64 24, i1 false)
ret void ret void
} }
@ -80,7 +80,7 @@ entry:
; CHECK: strh [[REG5:r[0-9]+]], [r0] ; CHECK: strh [[REG5:r[0-9]+]], [r0]
; CHECK-T1-LABEL: t4: ; CHECK-T1-LABEL: t4:
; CHECK-T1: bl _memcpy ; CHECK-T1: bl _memcpy
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str4, i64 0, i64 0), i64 18, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str4, i64 0, i64 0), i64 18, i1 false)
ret void ret void
} }
@ -96,7 +96,7 @@ entry:
; CHECK: str [[REG7]] ; CHECK: str [[REG7]]
; CHECK-T1-LABEL: t5: ; CHECK-T1-LABEL: t5:
; CHECK-T1: bl _memcpy ; CHECK-T1: bl _memcpy
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str5, i64 0, i64 0), i64 7, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str5, i64 0, i64 0), i64 7, i1 false)
ret void ret void
} }
@ -114,7 +114,7 @@ entry:
; CHECK-T1: strh [[TREG5]], ; CHECK-T1: strh [[TREG5]],
; CHECK-T1: ldr [[TREG6:r[0-9]]], ; CHECK-T1: ldr [[TREG6:r[0-9]]],
; CHECK-T1: str [[TREG6]] ; CHECK-T1: str [[TREG6]]
call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([512 x i8], [512 x i8]* @spool.splbuf, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str6, i64 0, i64 0), i64 14, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([512 x i8], [512 x i8]* @spool.splbuf, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str6, i64 0, i64 0), i64 14, i1 false)
ret void ret void
} }
@ -130,9 +130,9 @@ entry:
; CHECK-T1: str ; CHECK-T1: str
%0 = bitcast %struct.Foo* %a to i8* %0 = bitcast %struct.Foo* %a to i8*
%1 = bitcast %struct.Foo* %b to i8* %1 = bitcast %struct.Foo* %b to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* %1, i32 16, i32 4, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 %1, i32 16, i1 false)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind

20
llvm/test/CodeGen/ARM/memcpy-ldm-stm.ll
View File

@ -24,7 +24,7 @@ entry:
; Think of the monstrosity '{{\[}}[[LB]]]' as '[ [[LB]] ]' without the spaces. ; Think of the monstrosity '{{\[}}[[LB]]]' as '[ [[LB]] ]' without the spaces.
; CHECK-NEXT: ldrb{{(\.w)?}} {{.*}}, {{\[}}[[LB]]] ; CHECK-NEXT: ldrb{{(\.w)?}} {{.*}}, {{\[}}[[LB]]]
; CHECK-NEXT: strb{{(\.w)?}} {{.*}}, {{\[}}[[SB]]] ; CHECK-NEXT: strb{{(\.w)?}} {{.*}}, {{\[}}[[SB]]]
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast ([64 x i32]* @s to i8*), i8* bitcast ([64 x i32]* @d to i8*), i32 17, i32 4, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 bitcast ([64 x i32]* @s to i8*), i8* align 4 bitcast ([64 x i32]* @d to i8*), i32 17, i1 false)
ret void ret void
} }
@ -42,7 +42,7 @@ entry:
; CHECK-NEXT: ldrb{{(\.w)?}} {{.*}}, {{\[}}[[LB]], #2] ; CHECK-NEXT: ldrb{{(\.w)?}} {{.*}}, {{\[}}[[LB]], #2]
; CHECK-NEXT: strb{{(\.w)?}} {{.*}}, {{\[}}[[SB]], #2] ; CHECK-NEXT: strb{{(\.w)?}} {{.*}}, {{\[}}[[SB]], #2]
; CHECK-NEXT: strh{{(\.w)?}} {{.*}}, {{\[}}[[SB]]] ; CHECK-NEXT: strh{{(\.w)?}} {{.*}}, {{\[}}[[SB]]]
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast ([64 x i32]* @s to i8*), i8* bitcast ([64 x i32]* @d to i8*), i32 15, i32 4, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 bitcast ([64 x i32]* @s to i8*), i8* align 4 bitcast ([64 x i32]* @d to i8*), i32 15, i1 false)
ret void ret void
} }
@ -54,13 +54,13 @@ entry:
define void @t3() { define void @t3() {
call void @llvm.memcpy.p0i8.p0i8.i32( call void @llvm.memcpy.p0i8.p0i8.i32(
i8* getelementptr inbounds (%struct.T, %struct.T* @copy, i32 0, i32 0), i8* align 8 getelementptr inbounds (%struct.T, %struct.T* @copy, i32 0, i32 0),
i8* getelementptr inbounds (%struct.T, %struct.T* @etest, i32 0, i32 0), i8* align 8 getelementptr inbounds (%struct.T, %struct.T* @etest, i32 0, i32 0),
i32 24, i32 8, i1 false) i32 24, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i32( call void @llvm.memcpy.p0i8.p0i8.i32(
i8* getelementptr inbounds (%struct.T, %struct.T* @copy, i32 0, i32 0), i8* align 8 getelementptr inbounds (%struct.T, %struct.T* @copy, i32 0, i32 0),
i8* getelementptr inbounds (%struct.T, %struct.T* @etest, i32 0, i32 0), i8* align 8 getelementptr inbounds (%struct.T, %struct.T* @etest, i32 0, i32 0),
i32 24, i32 8, i1 false) i32 24, i1 false)
ret void ret void
} }
@ -70,7 +70,7 @@ define void @t3() {
define void @test3(%struct.S* %d, %struct.S* %s) #0 { define void @test3(%struct.S* %d, %struct.S* %s) #0 {
%1 = bitcast %struct.S* %d to i8* %1 = bitcast %struct.S* %d to i8*
%2 = bitcast %struct.S* %s to i8* %2 = bitcast %struct.S* %s to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %1, i8* %2, i32 48, i32 4, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %2, i32 48, i1 false)
; 3 ldm/stm pairs in v6; 2 in v7 ; 3 ldm/stm pairs in v6; 2 in v7
; CHECK: ldm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1:{.*}]] ; CHECK: ldm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1:{.*}]]
; CHECK: stm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1]] ; CHECK: stm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1]]
@ -91,4 +91,4 @@ declare void @g(i32*)
attributes #0 = { "no-frame-pointer-elim"="true" } attributes #0 = { "no-frame-pointer-elim"="true" }
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) #1 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) #1

6
llvm/test/CodeGen/ARM/memcpy-no-inline.ll
View File

@ -14,7 +14,7 @@ entry:
; CHECK-NOT: ldm ; CHECK-NOT: ldm
%mystring = alloca [31 x i8], align 1 %mystring = alloca [31 x i8], align 1
%0 = getelementptr inbounds [31 x i8], [31 x i8]* %mystring, i32 0, i32 0 %0 = getelementptr inbounds [31 x i8], [31 x i8]* %mystring, i32 0, i32 0
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i32 0, i32 0), i32 31, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %0, i8* align 1 getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i32 0, i32 0), i32 31, i1 false)
ret void ret void
} }
@ -24,10 +24,10 @@ entry:
; CHECK-NOT: __aeabi_memcpy ; CHECK-NOT: __aeabi_memcpy
%mystring = alloca [31 x i8], align 1 %mystring = alloca [31 x i8], align 1
%0 = getelementptr inbounds [31 x i8], [31 x i8]* %mystring, i32 0, i32 0 %0 = getelementptr inbounds [31 x i8], [31 x i8]* %mystring, i32 0, i32 0
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i32 0, i32 0), i32 21, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %0, i8* align 1 getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i32 0, i32 0), i32 21, i1 false)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) #1 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) #1
attributes #0 = { minsize noinline nounwind optsize } attributes #0 = { minsize noinline nounwind optsize }

90
llvm/test/CodeGen/ARM/memfunc.ll
View File

@ -16,13 +16,13 @@ entry:
; CHECK-DARWIN: bl _memmove ; CHECK-DARWIN: bl _memmove
; CHECK-EABI: bl __aeabi_memmove ; CHECK-EABI: bl __aeabi_memmove
; CHECK-GNUEABI: bl memmove ; CHECK-GNUEABI: bl memmove
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 0, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i1 false)
; CHECK-IOS: bl _memcpy ; CHECK-IOS: bl _memcpy
; CHECK-DARWIN: bl _memcpy ; CHECK-DARWIN: bl _memcpy
; CHECK-EABI: bl __aeabi_memcpy ; CHECK-EABI: bl __aeabi_memcpy
; CHECK-GNUEABI: bl memcpy ; CHECK-GNUEABI: bl memcpy
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 0, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i1 false)
; EABI memset swaps arguments ; EABI memset swaps arguments
; CHECK-IOS: mov r1, #1 ; CHECK-IOS: mov r1, #1
@ -33,7 +33,7 @@ entry:
; CHECK-EABI: bl __aeabi_memset ; CHECK-EABI: bl __aeabi_memset
; CHECK-GNUEABI: mov r1, #1 ; CHECK-GNUEABI: mov r1, #1
; CHECK-GNUEABI: bl memset ; CHECK-GNUEABI: bl memset
call void @llvm.memset.p0i8.i32(i8* %dest, i8 1, i32 500, i32 0, i1 false) call void @llvm.memset.p0i8.i32(i8* %dest, i8 1, i32 500, i1 false)
; EABI uses memclr if value set to 0 ; EABI uses memclr if value set to 0
; CHECK-IOS: mov r1, #0 ; CHECK-IOS: mov r1, #0
@ -42,7 +42,7 @@ entry:
; CHECK-DARWIN: bl _memset ; CHECK-DARWIN: bl _memset
; CHECK-EABI: bl __aeabi_memclr ; CHECK-EABI: bl __aeabi_memclr
; CHECK-GNUEABI: bl memset ; CHECK-GNUEABI: bl memset
call void @llvm.memset.p0i8.i32(i8* %dest, i8 0, i32 500, i32 0, i1 false) call void @llvm.memset.p0i8.i32(i8* %dest, i8 0, i32 500, i1 false)
; EABI uses aligned function variants if possible ; EABI uses aligned function variants if possible
@ -50,49 +50,49 @@ entry:
; CHECK-DARWIN: bl _memmove ; CHECK-DARWIN: bl _memmove
; CHECK-EABI: bl __aeabi_memmove4 ; CHECK-EABI: bl __aeabi_memmove4
; CHECK-GNUEABI: bl memmove ; CHECK-GNUEABI: bl memmove
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 4, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 500, i1 false)
; CHECK-IOS: bl _memcpy ; CHECK-IOS: bl _memcpy
; CHECK-DARWIN: bl _memcpy ; CHECK-DARWIN: bl _memcpy
; CHECK-EABI: bl __aeabi_memcpy4 ; CHECK-EABI: bl __aeabi_memcpy4
; CHECK-GNUEABI: bl memcpy ; CHECK-GNUEABI: bl memcpy
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 500, i1 false)
; CHECK-IOS: bl _memset ; CHECK-IOS: bl _memset
; CHECK-DARWIN: bl _memset ; CHECK-DARWIN: bl _memset
; CHECK-EABI: bl __aeabi_memset4 ; CHECK-EABI: bl __aeabi_memset4
; CHECK-GNUEABI: bl memset ; CHECK-GNUEABI: bl memset
call void @llvm.memset.p0i8.i32(i8* %dest, i8 1, i32 500, i32 4, i1 false) call void @llvm.memset.p0i8.i32(i8* align 4 %dest, i8 1, i32 500, i1 false)
; CHECK-IOS: bl _memset ; CHECK-IOS: bl _memset
; CHECK-DARWIN: bl _memset ; CHECK-DARWIN: bl _memset
; CHECK-EABI: bl __aeabi_memclr4 ; CHECK-EABI: bl __aeabi_memclr4
; CHECK-GNUEABI: bl memset ; CHECK-GNUEABI: bl memset
call void @llvm.memset.p0i8.i32(i8* %dest, i8 0, i32 500, i32 4, i1 false) call void @llvm.memset.p0i8.i32(i8* align 4 %dest, i8 0, i32 500, i1 false)
; CHECK-IOS: bl _memmove ; CHECK-IOS: bl _memmove
; CHECK-DARWIN: bl _memmove ; CHECK-DARWIN: bl _memmove
; CHECK-EABI: bl __aeabi_memmove8 ; CHECK-EABI: bl __aeabi_memmove8
; CHECK-GNUEABI: bl memmove ; CHECK-GNUEABI: bl memmove
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 8, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* align 8 %dest, i8* align 8 %src, i32 500, i1 false)
; CHECK-IOS: bl _memcpy ; CHECK-IOS: bl _memcpy
; CHECK-DARWIN: bl _memcpy ; CHECK-DARWIN: bl _memcpy
; CHECK-EABI: bl __aeabi_memcpy8 ; CHECK-EABI: bl __aeabi_memcpy8
; CHECK-GNUEABI: bl memcpy ; CHECK-GNUEABI: bl memcpy
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 8, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %dest, i8* align 8 %src, i32 500, i1 false)
; CHECK-IOS: bl _memset ; CHECK-IOS: bl _memset
; CHECK-DARWIN: bl _memset ; CHECK-DARWIN: bl _memset
; CHECK-EABI: bl __aeabi_memset8 ; CHECK-EABI: bl __aeabi_memset8
; CHECK-GNUEABI: bl memset ; CHECK-GNUEABI: bl memset
call void @llvm.memset.p0i8.i32(i8* %dest, i8 1, i32 500, i32 8, i1 false) call void @llvm.memset.p0i8.i32(i8* align 8 %dest, i8 1, i32 500, i1 false)
; CHECK-IOS: bl _memset ; CHECK-IOS: bl _memset
; CHECK-DARWIN: bl _memset ; CHECK-DARWIN: bl _memset
; CHECK-EABI: bl __aeabi_memclr8 ; CHECK-EABI: bl __aeabi_memclr8
; CHECK-GNUEABI: bl memset ; CHECK-GNUEABI: bl memset
call void @llvm.memset.p0i8.i32(i8* %dest, i8 0, i32 500, i32 8, i1 false) call void @llvm.memset.p0i8.i32(i8* align 8 %dest, i8 0, i32 500, i1 false)
unreachable unreachable
} }
@ -113,7 +113,7 @@ entry:
; CHECK-GNUEABI: bl memmove ; CHECK-GNUEABI: bl memmove
%arr0 = alloca [9 x i8], align 1 %arr0 = alloca [9 x i8], align 1
%0 = bitcast [9 x i8]* %arr0 to i8* %0 = bitcast [9 x i8]* %arr0 to i8*
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i32 0, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i1 false)
; CHECK: add r1, sp, #16 ; CHECK: add r1, sp, #16
; CHECK-IOS: bl _memcpy ; CHECK-IOS: bl _memcpy
@ -122,7 +122,7 @@ entry:
; CHECK-GNUEABI: bl memcpy ; CHECK-GNUEABI: bl memcpy
%arr1 = alloca [9 x i8], align 1 %arr1 = alloca [9 x i8], align 1
%1 = bitcast [9 x i8]* %arr1 to i8* %1 = bitcast [9 x i8]* %arr1 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i32 0, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i1 false)
; CHECK-IOS: mov r0, sp ; CHECK-IOS: mov r0, sp
; CHECK-IOS: mov r1, #1 ; CHECK-IOS: mov r1, #1
@ -138,7 +138,7 @@ entry:
; CHECK-GNUEABI: bl memset ; CHECK-GNUEABI: bl memset
%arr2 = alloca [9 x i8], align 1 %arr2 = alloca [9 x i8], align 1
%2 = bitcast [9 x i8]* %arr2 to i8* %2 = bitcast [9 x i8]* %arr2 to i8*
call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i32 0, i1 false) call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i1 false)
unreachable unreachable
} }
@ -155,7 +155,7 @@ entry:
; CHECK-GNUEABI: bl memmove ; CHECK-GNUEABI: bl memmove
%arr0 = alloca [7 x i8], align 1 %arr0 = alloca [7 x i8], align 1
%0 = bitcast [7 x i8]* %arr0 to i8* %0 = bitcast [7 x i8]* %arr0 to i8*
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i32 0, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i1 false)
; CHECK: {{add(.w)? r1, sp, #10|sub(.w)? r1, r(7|11), #22}} ; CHECK: {{add(.w)? r1, sp, #10|sub(.w)? r1, r(7|11), #22}}
; CHECK-IOS: bl _memcpy ; CHECK-IOS: bl _memcpy
@ -164,7 +164,7 @@ entry:
; CHECK-GNUEABI: bl memcpy ; CHECK-GNUEABI: bl memcpy
%arr1 = alloca [7 x i8], align 1 %arr1 = alloca [7 x i8], align 1
%1 = bitcast [7 x i8]* %arr1 to i8* %1 = bitcast [7 x i8]* %arr1 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i32 0, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i1 false)
; CHECK: {{add(.w)? r0, sp, #3|sub(.w)? r0, r(7|11), #29}} ; CHECK: {{add(.w)? r0, sp, #3|sub(.w)? r0, r(7|11), #29}}
; CHECK-IOS: mov r1, #1 ; CHECK-IOS: mov r1, #1
@ -177,7 +177,7 @@ entry:
; CHECK-GNUEABI: bl memset ; CHECK-GNUEABI: bl memset
%arr2 = alloca [7 x i8], align 1 %arr2 = alloca [7 x i8], align 1
%2 = bitcast [7 x i8]* %arr2 to i8* %2 = bitcast [7 x i8]* %arr2 to i8*
call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i32 0, i1 false) call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i1 false)
unreachable unreachable
} }
@ -194,7 +194,7 @@ entry:
; CHECK-GNUEABI: bl memmove ; CHECK-GNUEABI: bl memmove
%arr0 = alloca [9 x i8], align 1 %arr0 = alloca [9 x i8], align 1
%0 = getelementptr inbounds [9 x i8], [9 x i8]* %arr0, i32 0, i32 4 %0 = getelementptr inbounds [9 x i8], [9 x i8]* %arr0, i32 0, i32 4
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i32 0, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i1 false)
; CHECK: {{add(.w)? r., sp, #(10|14)|sub(.w) r., r(7|11), #26}} ; CHECK: {{add(.w)? r., sp, #(10|14)|sub(.w) r., r(7|11), #26}}
; CHECK-IOS: bl _memcpy ; CHECK-IOS: bl _memcpy
@ -203,7 +203,7 @@ entry:
; CHECK-GNUEABI: bl memcpy ; CHECK-GNUEABI: bl memcpy
%arr1 = alloca [9 x i8], align 1 %arr1 = alloca [9 x i8], align 1
%1 = getelementptr inbounds [9 x i8], [9 x i8]* %arr1, i32 0, i32 4 %1 = getelementptr inbounds [9 x i8], [9 x i8]* %arr1, i32 0, i32 4
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i32 0, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i1 false)
; CHECK: {{add(.w)? r., sp, #(1|5)|sub(.w) r., r(7|11), #35}} ; CHECK: {{add(.w)? r., sp, #(1|5)|sub(.w) r., r(7|11), #35}}
; CHECK-IOS: mov r1, #1 ; CHECK-IOS: mov r1, #1
@ -216,7 +216,7 @@ entry:
; CHECK-GNUEABI: bl memset ; CHECK-GNUEABI: bl memset
%arr2 = alloca [9 x i8], align 1 %arr2 = alloca [9 x i8], align 1
%2 = getelementptr inbounds [9 x i8], [9 x i8]* %arr2, i32 0, i32 4 %2 = getelementptr inbounds [9 x i8], [9 x i8]* %arr2, i32 0, i32 4
call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i32 0, i1 false) call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i1 false)
unreachable unreachable
} }
@ -233,7 +233,7 @@ entry:
; CHECK-GNUEABI: bl memmove ; CHECK-GNUEABI: bl memmove
%arr0 = alloca [13 x i8], align 1 %arr0 = alloca [13 x i8], align 1
%0 = getelementptr inbounds [13 x i8], [13 x i8]* %arr0, i32 0, i32 1 %0 = getelementptr inbounds [13 x i8], [13 x i8]* %arr0, i32 0, i32 1
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i32 0, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i1 false)
; CHECK: {{add(.w)? r., sp, #(10|14)|sub(.w)? r., r(7|11), #34}} ; CHECK: {{add(.w)? r., sp, #(10|14)|sub(.w)? r., r(7|11), #34}}
; CHECK-IOS: bl _memcpy ; CHECK-IOS: bl _memcpy
@ -242,7 +242,7 @@ entry:
; CHECK-GNUEABI: bl memcpy ; CHECK-GNUEABI: bl memcpy
%arr1 = alloca [13 x i8], align 1 %arr1 = alloca [13 x i8], align 1
%1 = getelementptr inbounds [13 x i8], [13 x i8]* %arr1, i32 0, i32 1 %1 = getelementptr inbounds [13 x i8], [13 x i8]* %arr1, i32 0, i32 1
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i32 0, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i1 false)
; CHECK: {{add(.w)? r., sp, #(1|5)|sub(.w)? r., r(7|11), #47}} ; CHECK: {{add(.w)? r., sp, #(1|5)|sub(.w)? r., r(7|11), #47}}
; CHECK-IOS: mov r1, #1 ; CHECK-IOS: mov r1, #1
@ -255,7 +255,7 @@ entry:
; CHECK-GNUEABI: bl memset ; CHECK-GNUEABI: bl memset
%arr2 = alloca [13 x i8], align 1 %arr2 = alloca [13 x i8], align 1
%2 = getelementptr inbounds [13 x i8], [13 x i8]* %arr2, i32 0, i32 1 %2 = getelementptr inbounds [13 x i8], [13 x i8]* %arr2, i32 0, i32 1
call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i32 0, i1 false) call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i1 false)
unreachable unreachable
} }
@ -272,7 +272,7 @@ entry:
; CHECK-GNUEABI: bl memmove ; CHECK-GNUEABI: bl memmove
%arr0 = alloca [13 x i8], align 1 %arr0 = alloca [13 x i8], align 1
%0 = getelementptr inbounds [13 x i8], [13 x i8]* %arr0, i32 0, i32 %i %0 = getelementptr inbounds [13 x i8], [13 x i8]* %arr0, i32 0, i32 %i
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i32 0, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i1 false)
; CHECK: {{add(.w)? r., sp, #(10|14)|sub(.w)? r., r(7|11), #42}} ; CHECK: {{add(.w)? r., sp, #(10|14)|sub(.w)? r., r(7|11), #42}}
; CHECK-IOS: bl _memcpy ; CHECK-IOS: bl _memcpy
@ -281,7 +281,7 @@ entry:
; CHECK-GNUEABI: bl memcpy ; CHECK-GNUEABI: bl memcpy
%arr1 = alloca [13 x i8], align 1 %arr1 = alloca [13 x i8], align 1
%1 = getelementptr inbounds [13 x i8], [13 x i8]* %arr1, i32 0, i32 %i %1 = getelementptr inbounds [13 x i8], [13 x i8]* %arr1, i32 0, i32 %i
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i32 0, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i1 false)
; CHECK: {{add(.w)? r., sp, #(1|5)|sub(.w)? r., r(7|11), #55}} ; CHECK: {{add(.w)? r., sp, #(1|5)|sub(.w)? r., r(7|11), #55}}
; CHECK-IOS: mov r1, #1 ; CHECK-IOS: mov r1, #1
@ -294,7 +294,7 @@ entry:
; CHECK-GNUEABI: bl memset ; CHECK-GNUEABI: bl memset
%arr2 = alloca [13 x i8], align 1 %arr2 = alloca [13 x i8], align 1
%2 = getelementptr inbounds [13 x i8], [13 x i8]* %arr2, i32 0, i32 %i %2 = getelementptr inbounds [13 x i8], [13 x i8]* %arr2, i32 0, i32 %i
call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i32 0, i1 false) call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i1 false)
unreachable unreachable
} }
@ -311,7 +311,7 @@ entry:
; CHECK-GNUEABI: bl memmove ; CHECK-GNUEABI: bl memmove
%arr0 = alloca [13 x i8], align 1 %arr0 = alloca [13 x i8], align 1
%0 = getelementptr [13 x i8], [13 x i8]* %arr0, i32 0, i32 4 %0 = getelementptr [13 x i8], [13 x i8]* %arr0, i32 0, i32 4
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i32 0, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i1 false)
; CHECK: {{add(.w)? r., sp, #(10|14)|sub(.w)? r., r(7|11), #34}} ; CHECK: {{add(.w)? r., sp, #(10|14)|sub(.w)? r., r(7|11), #34}}
; CHECK-IOS: bl _memcpy ; CHECK-IOS: bl _memcpy
@ -320,7 +320,7 @@ entry:
; CHECK-GNUEABI: bl memcpy ; CHECK-GNUEABI: bl memcpy
%arr1 = alloca [13 x i8], align 1 %arr1 = alloca [13 x i8], align 1
%1 = getelementptr [13 x i8], [13 x i8]* %arr1, i32 0, i32 4 %1 = getelementptr [13 x i8], [13 x i8]* %arr1, i32 0, i32 4
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i32 0, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i1 false)
; CHECK: {{add(.w)? r., sp, #(1|5)|sub(.w)? r., r(7|11), #47}} ; CHECK: {{add(.w)? r., sp, #(1|5)|sub(.w)? r., r(7|11), #47}}
; CHECK-IOS: mov r1, #1 ; CHECK-IOS: mov r1, #1
@ -333,7 +333,7 @@ entry:
; CHECK-GNUEABI: bl memset ; CHECK-GNUEABI: bl memset
%arr2 = alloca [13 x i8], align 1 %arr2 = alloca [13 x i8], align 1
%2 = getelementptr [13 x i8], [13 x i8]* %arr2, i32 0, i32 4 %2 = getelementptr [13 x i8], [13 x i8]* %arr2, i32 0, i32 4
call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i32 0, i1 false) call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i1 false)
unreachable unreachable
} }
@ -350,7 +350,7 @@ entry:
; CHECK-GNUEABI: bl memmove ; CHECK-GNUEABI: bl memmove
%arr0 = alloca [13 x i8], align 1 %arr0 = alloca [13 x i8], align 1
%0 = getelementptr inbounds [13 x i8], [13 x i8]* %arr0, i32 0, i32 16 %0 = getelementptr inbounds [13 x i8], [13 x i8]* %arr0, i32 0, i32 16
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i32 0, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %0, i32 %n, i1 false)
; CHECK: {{add(.w)? r., sp, #(10|14)|sub(.w)? r., r(7|11), #34}} ; CHECK: {{add(.w)? r., sp, #(10|14)|sub(.w)? r., r(7|11), #34}}
; CHECK-IOS: bl _memcpy ; CHECK-IOS: bl _memcpy
@ -359,7 +359,7 @@ entry:
; CHECK-GNUEABI: bl memcpy ; CHECK-GNUEABI: bl memcpy
%arr1 = alloca [13 x i8], align 1 %arr1 = alloca [13 x i8], align 1
%1 = getelementptr inbounds [13 x i8], [13 x i8]* %arr1, i32 0, i32 16 %1 = getelementptr inbounds [13 x i8], [13 x i8]* %arr1, i32 0, i32 16
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i32 0, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %1, i32 %n, i1 false)
; CHECK: {{add(.w)? r., sp, #(1|5)|sub(.w)? r., r(7|11), #47}} ; CHECK: {{add(.w)? r., sp, #(1|5)|sub(.w)? r., r(7|11), #47}}
; CHECK-IOS: mov r1, #1 ; CHECK-IOS: mov r1, #1
@ -372,7 +372,7 @@ entry:
; CHECK-GNUEABI: bl memset ; CHECK-GNUEABI: bl memset
%arr2 = alloca [13 x i8], align 1 %arr2 = alloca [13 x i8], align 1
%2 = getelementptr inbounds [13 x i8], [13 x i8]* %arr2, i32 0, i32 16 %2 = getelementptr inbounds [13 x i8], [13 x i8]* %arr2, i32 0, i32 16
call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i32 0, i1 false) call void @llvm.memset.p0i8.i32(i8* %2, i8 1, i32 %n, i1 false)
unreachable unreachable
} }
@ -390,15 +390,15 @@ entry:
@arr9 = weak_odr global [128 x i8] undef @arr9 = weak_odr global [128 x i8] undef
define void @f9(i8* %dest, i32 %n) "no-frame-pointer-elim"="true" { define void @f9(i8* %dest, i32 %n) "no-frame-pointer-elim"="true" {
entry: entry:
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr1, i32 0, i32 0), i32 %n, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr1, i32 0, i32 0), i32 %n, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @arr2, i32 0, i32 0), i32 %n, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @arr2, i32 0, i32 0), i32 %n, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr3, i32 0, i32 0), i32 %n, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr3, i32 0, i32 0), i32 %n, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @arr4, i32 0, i32 0), i32 %n, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @arr4, i32 0, i32 0), i32 %n, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr5, i32 0, i32 0), i32 %n, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr5, i32 0, i32 0), i32 %n, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr6, i32 0, i32 0), i32 %n, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr6, i32 0, i32 0), i32 %n, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr7, i32 0, i32 0), i32 %n, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr7, i32 0, i32 0), i32 %n, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([128 x i8], [128 x i8]* @arr8, i32 0, i32 0), i32 %n, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([128 x i8], [128 x i8]* @arr8, i32 0, i32 0), i32 %n, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([128 x i8], [128 x i8]* @arr9, i32 0, i32 0), i32 %n, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([128 x i8], [128 x i8]* @arr9, i32 0, i32 0), i32 %n, i1 false)
unreachable unreachable
} }
@ -428,6 +428,6 @@ entry:
; CHECK-NOT: arr7: ; CHECK-NOT: arr7:
declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind

12
llvm/test/CodeGen/ARM/memset-inline.ll
View File

@ -12,7 +12,7 @@ entry:
; CHECK-6M: str r1, [r0] ; CHECK-6M: str r1, [r0]
; CHECK-6M: str r1, [r0, #4] ; CHECK-6M: str r1, [r0, #4]
; CHECK-6M: str r1, [r0, #8] ; CHECK-6M: str r1, [r0, #8]
call void @llvm.memset.p0i8.i64(i8* %c, i8 0, i64 12, i32 8, i1 false) call void @llvm.memset.p0i8.i64(i8* align 8 %c, i8 0, i64 12, i1 false)
ret void ret void
} }
@ -33,7 +33,7 @@ entry:
; CHECK-6M: str [[REG]], [sp] ; CHECK-6M: str [[REG]], [sp]
%buf = alloca [26 x i8], align 1 %buf = alloca [26 x i8], align 1
%0 = getelementptr inbounds [26 x i8], [26 x i8]* %buf, i32 0, i32 0 %0 = getelementptr inbounds [26 x i8], [26 x i8]* %buf, i32 0, i32 0
call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 26, i32 1, i1 false) call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 26, i1 false)
call void @something(i8* %0) nounwind call void @something(i8* %0) nounwind
ret void ret void
} }
@ -54,7 +54,7 @@ entry:
for.body: for.body:
%i = phi i32 [ 0, %entry ], [ %inc, %for.body ] %i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
%0 = trunc i32 %i to i8 %0 = trunc i32 %i to i8
call void @llvm.memset.p0i8.i32(i8* %p, i8 %0, i32 4, i32 1, i1 false) call void @llvm.memset.p0i8.i32(i8* %p, i8 %0, i32 4, i1 false)
call void @something(i8* %p) call void @something(i8* %p)
%inc = add nuw nsw i32 %i, 1 %inc = add nuw nsw i32 %i, 1
%exitcond = icmp eq i32 %inc, 255 %exitcond = icmp eq i32 %inc, 255
@ -78,7 +78,7 @@ entry:
for.body: for.body:
%i = phi i32 [ 0, %entry ], [ %inc, %for.body ] %i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
%0 = trunc i32 %i to i8 %0 = trunc i32 %i to i8
call void @llvm.memset.p0i8.i32(i8* %p, i8 %0, i32 4, i32 2, i1 false) call void @llvm.memset.p0i8.i32(i8* align 2 %p, i8 %0, i32 4, i1 false)
call void @something(i8* %p) call void @something(i8* %p)
%inc = add nuw nsw i32 %i, 1 %inc = add nuw nsw i32 %i, 1
%exitcond = icmp eq i32 %inc, 255 %exitcond = icmp eq i32 %inc, 255
@ -89,5 +89,5 @@ for.end:
} }
declare void @something(i8*) nounwind declare void @something(i8*) nounwind
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind

4
llvm/test/CodeGen/ARM/stack-protector-bmovpcb_call.ll
View File

@ -15,13 +15,13 @@ define i32 @main() #0 {
entry: entry:
%title = alloca [15 x i8], align 1 %title = alloca [15 x i8], align 1
%0 = getelementptr inbounds [15 x i8], [15 x i8]* %title, i32 0, i32 0 %0 = getelementptr inbounds [15 x i8], [15 x i8]* %title, i32 0, i32 0
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @main.title, i32 0, i32 0), i32 15, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %0, i8* align 1 getelementptr inbounds ([15 x i8], [15 x i8]* @main.title, i32 0, i32 0), i32 15, i1 false)
%call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i32 0, i32 0), i8* %0) #3 %call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i32 0, i32 0), i8* %0) #3
ret i32 0 ret i32 0
} }
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) #1 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) #1
; Function Attrs: nounwind optsize ; Function Attrs: nounwind optsize
declare i32 @printf(i8* nocapture readonly, ...) #2 declare i32 @printf(i8* nocapture readonly, ...) #2

8
llvm/test/CodeGen/ARM/struct-byval-frame-index.ll
View File

@ -60,10 +60,10 @@ target triple = "armv7l-unknown-linux-gnueabihf"
@brefframe = external global [4 x [4 x i8]], align 1 @brefframe = external global [4 x [4 x i8]], align 1
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) #0 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) #0
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) #0 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) #0
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @SetMotionVectorsMB(%structK* nocapture, i32) #1 declare void @SetMotionVectorsMB(%structK* nocapture, i32) #1
@ -122,10 +122,10 @@ for.cond210.preheader: ; preds = %if.then169
unreachable unreachable
if.end230: ; preds = %if.end164 if.end230: ; preds = %if.end164
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* bitcast ([4 x i32]* @b8mode to i8*), i32 16, i32 4, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 undef, i8* align 4 bitcast ([4 x i32]* @b8mode to i8*), i32 16, i1 false)
%b8pdir = getelementptr inbounds %structK, %structK* %2, i32 %1, i32 15 %b8pdir = getelementptr inbounds %structK, %structK* %2, i32 %1, i32 15
%3 = bitcast [4 x i32]* %b8pdir to i8* %3 = bitcast [4 x i32]* %b8pdir to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %3, i8* bitcast ([4 x i32]* @b8pdir to i8*), i32 16, i32 4, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %3, i8* align 4 bitcast ([4 x i32]* @b8pdir to i8*), i32 16, i1 false)
br i1 undef, label %if.end236, label %if.then233 br i1 undef, label %if.end236, label %if.then233
if.then233: ; preds = %if.end230 if.then233: ; preds = %if.end230

12
llvm/test/CodeGen/ARM/tailcall-mem-intrinsics.ll
View File

@ -4,7 +4,7 @@
; CHECK: bl __aeabi_memcpy ; CHECK: bl __aeabi_memcpy
define i8* @tail_memcpy_ret(i8* nocapture %p, i8* nocapture readonly %q, i32 %n) #0 { define i8* @tail_memcpy_ret(i8* nocapture %p, i8* nocapture readonly %q, i32 %n) #0 {
entry: entry:
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i32 1, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i1 false)
ret i8* %p ret i8* %p
} }
@ -12,7 +12,7 @@ entry:
; CHECK: bl __aeabi_memmove ; CHECK: bl __aeabi_memmove
define i8* @tail_memmove_ret(i8* nocapture %p, i8* nocapture readonly %q, i32 %n) #0 { define i8* @tail_memmove_ret(i8* nocapture %p, i8* nocapture readonly %q, i32 %n) #0 {
entry: entry:
tail call void @llvm.memmove.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i32 1, i1 false) tail call void @llvm.memmove.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i1 false)
ret i8* %p ret i8* %p
} }
@ -20,12 +20,12 @@ entry:
; CHECK: bl __aeabi_memset ; CHECK: bl __aeabi_memset
define i8* @tail_memset_ret(i8* nocapture %p, i8 %c, i32 %n) #0 { define i8* @tail_memset_ret(i8* nocapture %p, i8 %c, i32 %n) #0 {
entry: entry:
tail call void @llvm.memset.p0i8.i32(i8* %p, i8 %c, i32 %n, i32 1, i1 false) tail call void @llvm.memset.p0i8.i32(i8* %p, i8 %c, i32 %n, i1 false)
ret i8* %p ret i8* %p
} }
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) #0 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) #0
declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) #0 declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) #0
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) #0 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) #0
attributes #0 = { nounwind } attributes #0 = { nounwind }

4
llvm/test/CodeGen/AVR/std-ldd-immediate-overflow.ll
View File

@ -8,11 +8,11 @@ define i32 @std_ldd_overflow() {
store i32 0, i32 *%1 store i32 0, i32 *%1
%2 = bitcast [4 x i8]* %dst to i8* %2 = bitcast [4 x i8]* %dst to i8*
%3 = bitcast [4 x i8]* %src to i8* %3 = bitcast [4 x i8]* %src to i8*
call void @llvm.memcpy.p0i8.p0i8.i16(i8* %2, i8* %3, i16 4, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i16(i8* %2, i8* %3, i16 4, i1 false)
; CHECK-NOT: std {{[XYZ]}}+64, {{r[0-9]+}} ; CHECK-NOT: std {{[XYZ]}}+64, {{r[0-9]+}}
; CHECK-NOT: ldd {{r[0-9]+}}, {{[XYZ]}}+64 ; CHECK-NOT: ldd {{r[0-9]+}}, {{[XYZ]}}+64
ret i32 0 ret i32 0
} }
declare void @llvm.memcpy.p0i8.p0i8.i16(i8* nocapture writeonly, i8* nocapture readonly, i16, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i16(i8* nocapture writeonly, i8* nocapture readonly, i16, i1)

4
llvm/test/CodeGen/BPF/byval.ll
View File

@ -16,7 +16,7 @@ entry:
store i32 3, i32* %arrayinit.element2, align 8 store i32 3, i32* %arrayinit.element2, align 8
%arrayinit.start = getelementptr inbounds %struct.S, %struct.S* %.compoundliteral, i64 0, i32 0, i64 3 %arrayinit.start = getelementptr inbounds %struct.S, %struct.S* %.compoundliteral, i64 0, i32 0, i64 3
%scevgep4 = bitcast i32* %arrayinit.start to i8* %scevgep4 = bitcast i32* %arrayinit.start to i8*
call void @llvm.memset.p0i8.i64(i8* %scevgep4, i8 0, i64 28, i32 4, i1 false) call void @llvm.memset.p0i8.i64(i8* align 4 %scevgep4, i8 0, i64 28, i1 false)
call void @foo(i32 %a, %struct.S* byval align 8 %.compoundliteral) #3 call void @foo(i32 %a, %struct.S* byval align 8 %.compoundliteral) #3
ret void ret void
} }
@ -24,4 +24,4 @@ entry:
declare void @foo(i32, %struct.S* byval align 8) #1 declare void @foo(i32, %struct.S* byval align 8) #1
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) #3 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) #3

6
llvm/test/CodeGen/BPF/ex1.ll
View File

@ -12,7 +12,7 @@ define i32 @bpf_prog1(%struct.bpf_context* nocapture %ctx) #0 section "events/ne
%devname = alloca [3 x i8], align 1 %devname = alloca [3 x i8], align 1
%fmt = alloca [15 x i8], align 1 %fmt = alloca [15 x i8], align 1
%1 = getelementptr inbounds [3 x i8], [3 x i8]* %devname, i64 0, i64 0 %1 = getelementptr inbounds [3 x i8], [3 x i8]* %devname, i64 0, i64 0
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @bpf_prog1.devname, i64 0, i64 0), i64 3, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @bpf_prog1.devname, i64 0, i64 0), i64 3, i1 false)
%2 = getelementptr inbounds %struct.bpf_context, %struct.bpf_context* %ctx, i64 0, i32 0 %2 = getelementptr inbounds %struct.bpf_context, %struct.bpf_context* %ctx, i64 0, i32 0
%3 = load i64, i64* %2, align 8 %3 = load i64, i64* %2, align 8
%4 = inttoptr i64 %3 to %struct.sk_buff* %4 = inttoptr i64 %3 to %struct.sk_buff*
@ -25,7 +25,7 @@ define i32 @bpf_prog1(%struct.bpf_context* nocapture %ctx) #0 section "events/ne
; <label>:10 ; preds = %0 ; <label>:10 ; preds = %0
%11 = getelementptr inbounds [15 x i8], [15 x i8]* %fmt, i64 0, i64 0 %11 = getelementptr inbounds [15 x i8], [15 x i8]* %fmt, i64 0, i64 0
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %11, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @bpf_prog1.fmt, i64 0, i64 0), i64 15, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %11, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @bpf_prog1.fmt, i64 0, i64 0), i64 15, i1 false)
%12 = call i32 (i8*, i32, ...) inttoptr (i64 11 to i32 (i8*, i32, ...)*)(i8* %11, i32 15, %struct.sk_buff* %4, i8* %7) #1 %12 = call i32 (i8*, i32, ...) inttoptr (i64 11 to i32 (i8*, i32, ...)*)(i8* %11, i32 15, %struct.sk_buff* %4, i8* %7) #1
; CHECK-LABEL: bpf_prog1: ; CHECK-LABEL: bpf_prog1:
; CHECK: call 4 ; CHECK: call 4
@ -43,4 +43,4 @@ define i32 @bpf_prog1(%struct.bpf_context* nocapture %ctx) #0 section "events/ne
} }
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) #1 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) #1

4
llvm/test/CodeGen/BPF/fi_ri.ll
View File

@ -10,7 +10,7 @@ define i32 @test() #0 {
; CHECK: *(u32 *)(r10 - 8) = r1 ; CHECK: *(u32 *)(r10 - 8) = r1
; CHECK: *(u64 *)(r10 - 16) = r1 ; CHECK: *(u64 *)(r10 - 16) = r1
; CHECK: *(u64 *)(r10 - 24) = r1 ; CHECK: *(u64 *)(r10 - 24) = r1
call void @llvm.memset.p0i8.i64(i8* %1, i8 0, i64 20, i32 4, i1 false) call void @llvm.memset.p0i8.i64(i8* align 4 %1, i8 0, i64 20, i1 false)
; CHECK: r1 = r10 ; CHECK: r1 = r10
; CHECK: r1 += -20 ; CHECK: r1 += -20
%2 = getelementptr inbounds %struct.key_t, %struct.key_t* %key, i64 0, i32 1, i64 0 %2 = getelementptr inbounds %struct.key_t, %struct.key_t* %key, i64 0, i32 1, i64 0
@ -20,6 +20,6 @@ define i32 @test() #0 {
} }
; Function Attrs: nounwind argmemonly ; Function Attrs: nounwind argmemonly
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) #1 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) #1
declare void @test1(i8*) #2 declare void @test1(i8*) #2

6
llvm/test/CodeGen/BPF/reloc.ll
View File

@ -12,7 +12,7 @@ define i32 @bpf_prog1(%struct.bpf_context* nocapture %ctx) #0 section "events/ne
%devname = alloca [3 x i8], align 1 %devname = alloca [3 x i8], align 1
%fmt = alloca [15 x i8], align 1 %fmt = alloca [15 x i8], align 1
%1 = getelementptr inbounds [3 x i8], [3 x i8]* %devname, i64 0, i64 0 %1 = getelementptr inbounds [3 x i8], [3 x i8]* %devname, i64 0, i64 0
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @bpf_prog1.devname, i64 0, i64 0), i64 3, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @bpf_prog1.devname, i64 0, i64 0), i64 3, i1 false)
%2 = getelementptr inbounds %struct.bpf_context, %struct.bpf_context* %ctx, i64 0, i32 0 %2 = getelementptr inbounds %struct.bpf_context, %struct.bpf_context* %ctx, i64 0, i32 0
%3 = load i64, i64* %2, align 8 %3 = load i64, i64* %2, align 8
%4 = inttoptr i64 %3 to %struct.sk_buff* %4 = inttoptr i64 %3 to %struct.sk_buff*
@ -25,7 +25,7 @@ define i32 @bpf_prog1(%struct.bpf_context* nocapture %ctx) #0 section "events/ne
; <label>:10 ; preds = %0 ; <label>:10 ; preds = %0
%11 = getelementptr inbounds [15 x i8], [15 x i8]* %fmt, i64 0, i64 0 %11 = getelementptr inbounds [15 x i8], [15 x i8]* %fmt, i64 0, i64 0
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %11, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @bpf_prog1.fmt, i64 0, i64 0), i64 15, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %11, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @bpf_prog1.fmt, i64 0, i64 0), i64 15, i1 false)
%12 = call i32 (i8*, i32, ...) inttoptr (i64 11 to i32 (i8*, i32, ...)*)(i8* %11, i32 15, %struct.sk_buff* %4, i8* %7) #1 %12 = call i32 (i8*, i32, ...) inttoptr (i64 11 to i32 (i8*, i32, ...)*)(i8* %11, i32 15, %struct.sk_buff* %4, i8* %7) #1
br label %13 br label %13
@ -38,6 +38,6 @@ define i32 @bpf_prog1(%struct.bpf_context* nocapture %ctx) #0 section "events/ne
} }
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) #1 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) #1
attributes #0 = { norecurse } attributes #0 = { norecurse }

Some files were not shown because too many files have changed in this diff Show More