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[ARM][MVE] MVE-I should not be disabled by -mfpu=none
Architecturally, it's allowed to have MVE-I without an FPU, thus -mfpu=none should not disable MVE-I, or moves to/from FP-registers. This patch removes `+/-fpregs` from features unconditionally added to target feature list, depending on FPU and moves the logic to Clang driver, where the negative form (`-fpregs`) is conditionally added to the target features list for the cases of `-mfloat-abi=soft`, or `-mfpu=none` without either `+mve` or `+mve.fp`. Only the negative form is added by the driver, the positive one is derived from other features in the backend. Differential Revision: https://reviews.llvm.org/D71843
This commit is contained in:
Momchil Velikov
parent
032a9393a7
commit
173b711e83
@ -63,12 +63,13 @@ static void getARMHWDivFeatures(const Driver &D, const Arg *A,
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}
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// Handle -mfpu=.
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static void getARMFPUFeatures(const Driver &D, const Arg *A,
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unsigned getARMFPUFeatures(const Driver &D, const Arg *A,
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const ArgList &Args, StringRef FPU,
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std::vector<StringRef> &Features) {
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unsigned FPUID = llvm::ARM::parseFPU(FPU);
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if (!llvm::ARM::getFPUFeatures(FPUID, Features))
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D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
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return FPUID;
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}
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// Decode ARM features from string like +[no]featureA+[no]featureB+...
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@ -388,18 +389,20 @@ void arm::getARMTargetFeatures(const ToolChain &TC,
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checkARMCPUName(D, CPUArg, Args, CPUName, ArchName,
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ExtensionFeatures, Triple);
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// Honor -mfpu=. ClangAs gives preference to -Wa,-mfpu=.
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unsigned FPUID = llvm::ARM::FK_INVALID;
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const Arg *FPUArg = Args.getLastArg(options::OPT_mfpu_EQ);
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if (WaFPU) {
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if (FPUArg)
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D.Diag(clang::diag::warn_drv_unused_argument)
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<< FPUArg->getAsString(Args);
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getARMFPUFeatures(D, WaFPU, Args, StringRef(WaFPU->getValue()).substr(6),
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Features);
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(void)getARMFPUFeatures(D, WaFPU, Args, StringRef(WaFPU->getValue()).substr(6),
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Features);
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} else if (FPUArg) {
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getARMFPUFeatures(D, FPUArg, Args, FPUArg->getValue(), Features);
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FPUID = getARMFPUFeatures(D, FPUArg, Args, FPUArg->getValue(), Features);
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} else if (Triple.isAndroid() && getARMSubArchVersionNumber(Triple) >= 7) {
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const char *AndroidFPU = "neon";
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if (!llvm::ARM::getFPUFeatures(llvm::ARM::parseFPU(AndroidFPU), Features))
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FPUID = llvm::ARM::parseFPU(AndroidFPU);
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if (!llvm::ARM::getFPUFeatures(FPUID, Features))
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D.Diag(clang::diag::err_drv_clang_unsupported)
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<< std::string("-mfpu=") + AndroidFPU;
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}
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@ -454,21 +457,21 @@ fp16_fml_fallthrough:
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if (ABI == arm::FloatABI::Soft) {
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llvm::ARM::getFPUFeatures(llvm::ARM::FK_NONE, Features);
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// Disable all features relating to hardware FP.
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// FIXME: Disabling fpregs should be enough all by itself, since all
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// the other FP features are dependent on it. However
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// there is currently no easy way to test this in clang, so for
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// now just be explicit and disable all known dependent features
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// as well.
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for (std::string Feature : {
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"vfp2", "vfp2sp",
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"vfp3", "vfp3sp", "vfp3d16", "vfp3d16sp",
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"vfp4", "vfp4sp", "vfp4d16", "vfp4d16sp",
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"fp-armv8", "fp-armv8sp", "fp-armv8d16", "fp-armv8d16sp",
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"fullfp16", "neon", "crypto", "dotprod", "fp16fml",
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"mve", "mve.fp",
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"fp64", "d32", "fpregs"})
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Features.push_back(Args.MakeArgString("-" + Feature));
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// Disable all features relating to hardware FP, not already disabled by the
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// above call.
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Features.insert(Features.end(), {"-neon", "-crypto", "-dotprod", "-fp16fml",
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"-mve", "-mve.fp", "-fpregs"});
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} else if (FPUID == llvm::ARM::FK_NONE) {
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// -mfpu=none is *very* similar to -mfloat-abi=soft, only that it should not
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// disable MVE-I.
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Features.insert(Features.end(),
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{"-neon", "-crypto", "-dotprod", "-fp16fml", "-mve.fp"});
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// Even though we remove MVE-FP, we still need to check if it was originally
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// present among the requested extensions, because it implies MVE-I, which
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// should not be disabled by -mfpu-none.
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if (!llvm::is_contained(Features, "+mve") &&
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!llvm::is_contained(Features, "+mve.fp"))
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Features.emplace_back("-fpregs");
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}
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// En/disable crc code generation.
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@ -1,23 +1,23 @@
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// REQUIRES: arm-registered-target
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// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu cortex-a8 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3
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// CHECK-VFP3: "target-features"="+armv7-a,+d32,+dsp,+fp64,+fpregs,+neon,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp"
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// CHECK-VFP3: "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp"
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// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu cortex-a5 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4
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// CHECK-VFP4: "target-features"="+armv7-a,+d32,+dsp,+fp16,+fp64,+fpregs,+neon,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp"
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// CHECK-VFP4: "target-features"="+armv7-a,+d32,+dsp,+fp16,+fp64,+neon,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp"
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// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu cortex-a7 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
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// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-a12 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
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// RUN: %clang_cc1 -triple thumbv7s-linux-gnueabi -target-cpu swift -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV-2
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// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu krait -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
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// CHECK-VFP4-DIV: "target-features"="+armv7-a,+d32,+dsp,+fp16,+fp64,+fpregs,+hwdiv,+hwdiv-arm,+neon,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp"
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// CHECK-VFP4-DIV-2: "target-features"="+armv7s,+d32,+dsp,+fp16,+fp64,+fpregs,+hwdiv,+hwdiv-arm,+neon,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp"
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// CHECK-VFP4-DIV: "target-features"="+armv7-a,+d32,+dsp,+fp16,+fp64,+hwdiv,+hwdiv-arm,+neon,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp"
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// CHECK-VFP4-DIV-2: "target-features"="+armv7s,+d32,+dsp,+fp16,+fp64,+hwdiv,+hwdiv-arm,+neon,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp"
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// RUN: %clang_cc1 -triple armv7-linux-gnueabihf -target-cpu cortex-a15 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV-ARM
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// RUN: %clang_cc1 -triple armv7-linux-gnueabihf -target-cpu cortex-a17 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV-ARM
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// CHECK-VFP4-DIV-ARM: "target-features"="+armv7-a,+d32,+dsp,+fp16,+fp64,+fpregs,+hwdiv,+hwdiv-arm,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp,-thumb-mode"
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// CHECK-VFP4-DIV-ARM: "target-features"="+armv7-a,+d32,+dsp,+fp16,+fp64,+hwdiv,+hwdiv-arm,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp,-thumb-mode"
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// RUN: %clang_cc1 -triple thumbv7s-apple-ios7.0 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
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// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a32 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
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@ -26,34 +26,34 @@
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// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a72 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
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// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a73 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
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// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu exynos-m3 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
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// CHECK-BASIC-V8: "target-features"="+armv8-a,+crc,+crypto,+d32,+dsp,+fp-armv8,+fp-armv8d16,+fp-armv8d16sp,+fp-armv8sp,+fp16,+fp64,+fpregs,+hwdiv,+hwdiv-arm,+neon,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp"
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// CHECK-BASIC-V8: "target-features"="+armv8-a,+crc,+crypto,+d32,+dsp,+fp-armv8,+fp-armv8d16,+fp-armv8d16sp,+fp-armv8sp,+fp16,+fp64,+hwdiv,+hwdiv-arm,+neon,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp"
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// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu exynos-m4 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V82
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// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu exynos-m5 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V82
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// CHECK-BASIC-V82: "target-features"="+armv8.2-a,+crc,+crypto,+d32,+dotprod,+dsp,+fp-armv8,+fp-armv8d16,+fp-armv8d16sp,+fp-armv8sp,+fp16,+fp64,+fpregs,+fullfp16,+hwdiv,+hwdiv-arm,+neon,+ras,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp"
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// CHECK-BASIC-V82: "target-features"="+armv8.2-a,+crc,+crypto,+d32,+dotprod,+dsp,+fp-armv8,+fp-armv8d16,+fp-armv8d16sp,+fp-armv8sp,+fp16,+fp64,+fullfp16,+hwdiv,+hwdiv-arm,+neon,+ras,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp"
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// RUN: %clang_cc1 -triple armv8-linux-gnueabi -target-cpu cortex-a53 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8-ARM
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// CHECK-BASIC-V8-ARM: "target-features"="+armv8-a,+crc,+crypto,+d32,+dsp,+fp-armv8,+fp-armv8d16,+fp-armv8d16sp,+fp-armv8sp,+fp16,+fp64,+fpregs,+hwdiv,+hwdiv-arm,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp,-thumb-mode"
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// CHECK-BASIC-V8-ARM: "target-features"="+armv8-a,+crc,+crypto,+d32,+dsp,+fp-armv8,+fp-armv8d16,+fp-armv8d16sp,+fp-armv8sp,+fp16,+fp64,+hwdiv,+hwdiv-arm,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,+vfp4,+vfp4d16,+vfp4d16sp,+vfp4sp,-thumb-mode"
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// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-r5 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-DIV
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// CHECK-VFP3-D16-DIV: "target-features"="+armv7-r,+dsp,+fp64,+fpregs,+hwdiv,+hwdiv-arm,+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp"
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// CHECK-VFP3-D16-DIV: "target-features"="+armv7-r,+dsp,+fp64,+hwdiv,+hwdiv-arm,+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp"
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// RUN: %clang_cc1 -triple armv7-linux-gnueabi -target-cpu cortex-r4f -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-THUMB-DIV
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// CHECK-VFP3-D16-THUMB-DIV: "target-features"="+armv7-r,+dsp,+fp64,+fpregs,+hwdiv,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp,-thumb-mode"
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// CHECK-VFP3-D16-THUMB-DIV: "target-features"="+armv7-r,+dsp,+fp64,+hwdiv,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp,-thumb-mode"
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// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-r7 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-FP16-DIV
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// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-r8 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-FP16-DIV
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// CHECK-VFP3-D16-FP16-DIV: "target-features"="+armv7-r,+dsp,+fp16,+fp64,+fpregs,+hwdiv,+hwdiv-arm,+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp"
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// CHECK-VFP3-D16-FP16-DIV: "target-features"="+armv7-r,+dsp,+fp16,+fp64,+hwdiv,+hwdiv-arm,+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp"
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// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-m4 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-D16-SP-THUMB-DIV
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// CHECK-VFP4-D16-SP-THUMB-DIV: "target-features"="+armv7e-m,+dsp,+fp16,+fpregs,+hwdiv,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp"
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// CHECK-VFP4-D16-SP-THUMB-DIV: "target-features"="+armv7e-m,+dsp,+fp16,+hwdiv,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp"
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// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-m7 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP5-D16-THUMB-DIV
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// CHECK-VFP5-D16-THUMB-DIV: "target-features"="+armv7e-m,+dsp,+fp-armv8d16,+fp-armv8d16sp,+fp16,+fp64,+fpregs,+hwdiv,+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp,+vfp4d16,+vfp4d16sp"
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// CHECK-VFP5-D16-THUMB-DIV: "target-features"="+armv7e-m,+dsp,+fp-armv8d16,+fp-armv8d16sp,+fp16,+fp64,+hwdiv,+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp,+vfp4d16,+vfp4d16sp"
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// RUN: %clang_cc1 -triple armv7-linux-gnueabi -target-cpu cortex-r4 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-THUMB-DIV
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@ -105,6 +105,6 @@
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// CHECK-ARMV8M-M23-LINUX: "target-features"="+armv8-m.base,+hwdiv,+thumb-mode"
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// RUN: %clang_cc1 -triple thumb-linux-gnueabi -target-cpu cortex-m33 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-ARMV8M-MAIN-LINUX
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// CHECK-ARMV8M-MAIN-LINUX: "target-features"="+armv8-m.main,+dsp,+fp-armv8d16sp,+fp16,+fpregs,+hwdiv,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp"
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// CHECK-ARMV8M-MAIN-LINUX: "target-features"="+armv8-m.main,+dsp,+fp-armv8d16sp,+fp16,+hwdiv,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp"
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void foo() {}
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@ -84,7 +84,7 @@
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// CHECK-VFP3-D16-DAG: "-target-feature" "-vfp4d16sp"
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// CHECK-VFP3-D16-DAG: "-target-feature" "-fp-armv8d16sp"
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// CHECK-VFP3-D16-DAG: "-target-feature" "+fp64"
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// CHECK-VFP3-D16-NOT: "-target-feature" "+d32"
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// CHECK-VFP3-D16-DAG: "-target-feature" "-d32"
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// CHECK-VFP3-D16-DAG: "-target-feature" "-neon"
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// RUN: %clang -target arm-linux-eabi -mfpu=vfpv3-d16-fp16 %s -### -o %t.o 2>&1 \
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@ -98,7 +98,7 @@
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// CHECK-VFP3-D16-FP16-DAG: "-target-feature" "-vfp4d16sp"
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// CHECK-VFP3-D16-FP16-DAG: "-target-feature" "-fp-armv8d16sp"
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// CHECK-VFP3-D16-FP16-DAG: "-target-feature" "+fp64"
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// CHECK-VFP3-D16-FP16-NOT: "-target-feature" "+d32"
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// CHECK-VFP3-D16-FP16-DAG: "-target-feature" "-d32"
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// CHECK-VFP3-D16-FP16-DAG: "-target-feature" "-neon"
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// CHECK-VFP3-D16-FP16-DAG: "-target-feature" "-crypto"
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@ -108,8 +108,8 @@
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// RUN: | FileCheck --check-prefix=CHECK-SOFT-ABI-FP-3 %s
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// CHECK-VFP3XD-NOT: "-target-feature" "+soft-float"
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// CHECK-VFP3XD-DAG: "-target-feature" "+soft-float-abi"
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// CHECK-VFP3XD-NOT: "-target-feature" "+fp64"
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// CHECK-VFP3XD-NOT: "-target-feature" "+d32"
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// CHECK-VFP3XD-DAG: "-target-feature" "-fp64"
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// CHECK-VFP3XD-DAG: "-target-feature" "-d32"
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// CHECK-VFP3XD-DAG: "-target-feature" "+vfp3d16sp"
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// CHECK-VFP3XD-DAG: "-target-feature" "-fp16"
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// CHECK-VFP3XD-DAG: "-target-feature" "-vfp4d16sp"
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@ -127,8 +127,8 @@
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// CHECK-VFP3XD-FP16-DAG: "-target-feature" "+fp16"
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// CHECK-VFP3XD-FP16-DAG: "-target-feature" "-vfp4d16sp"
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// CHECK-VFP3XD-FP16-DAG: "-target-feature" "-fp-armv8d16sp"
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// CHECK-VFP3XD-FP16-NOT: "-target-feature" "+fp64"
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// CHECK-VFP3XD-FP16-NOT: "-target-feature" "+d32"
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// CHECK-VFP3XD-FP16-DAG: "-target-feature" "-fp64"
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// CHECK-VFP3XD-FP16-DAG: "-target-feature" "-d32"
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// CHECK-VFP3XD-FP16-DAG: "-target-feature" "-neon"
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// CHECK-VFP3XD-FP16-DAG: "-target-feature" "-crypto"
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@ -162,7 +162,7 @@
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// CHECK-VFP4-D16-DAG: "-target-feature" "+vfp4d16"
|
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// CHECK-VFP4-D16-DAG: "-target-feature" "-fp-armv8d16sp"
|
||||
// CHECK-VFP4-D16-DAG: "-target-feature" "+fp64"
|
||||
// CHECK-VFP4-D16-NOT: "-target-feature" "+d32"
|
||||
// CHECK-VFP4-D16-DAG: "-target-feature" "-d32"
|
||||
// CHECK-VFP4-D16-DAG: "-target-feature" "-neon"
|
||||
|
||||
// RUN: %clang -target arm-linux-eabi -mfpu=fp4-sp-d16 %s -### -o %t.o 2>&1 \
|
||||
@ -175,8 +175,8 @@
|
||||
// CHECK-FP4-SP-D16-DAG: "-target-feature" "+soft-float-abi"
|
||||
// CHECK-FP4-SP-D16-DAG: "-target-feature" "+vfp4d16sp"
|
||||
// CHECK-FP4-SP-D16-DAG: "-target-feature" "-fp-armv8d16sp"
|
||||
// CHECK-FP4-SP-D16-NOT: "-target-feature" "+fp64"
|
||||
// CHECK-FP4-SP-D16-NOT: "-target-feature" "+d32"
|
||||
// CHECK-FP4-SP-D16-DAG: "-target-feature" "-fp64"
|
||||
// CHECK-FP4-SP-D16-DAG: "-target-feature" "-d32"
|
||||
// CHECK-FP4-SP-D16-DAG: "-target-feature" "-neon"
|
||||
|
||||
// RUN: %clang -target arm-linux-eabi -mfpu=fp5-sp-d16 %s -### -o %t.o 2>&1 \
|
||||
@ -189,8 +189,8 @@
|
||||
// CHECK-FP5-SP-D16-DAG: "-target-feature" "+soft-float-abi"
|
||||
// CHECK-FP5-SP-D16-DAG: "-target-feature" "+fp-armv8d16sp"
|
||||
// CHECK-FP5-SP-D16-DAG: "-target-feature" "-neon"
|
||||
// CHECK-FP5-SP-D16-NOT: "-target-feature" "+fp64"
|
||||
// CHECK-FP5-SP-D16-NOT: "-target-feature" "+d32"
|
||||
// CHECK-FP5-SP-D16-DAG: "-target-feature" "-fp64"
|
||||
// CHECK-FP5-SP-D16-DAG: "-target-feature" "-d32"
|
||||
// CHECK-FP5-SP-D16-DAG: "-target-feature" "-crypto"
|
||||
|
||||
// RUN: %clang -target arm-linux-eabi -mfpu=fp5-dp-d16 %s -### -o %t.o 2>&1 \
|
||||
@ -203,7 +203,7 @@
|
||||
// CHECK-FP5-DP-D16-DAG: "-target-feature" "+soft-float-abi"
|
||||
// CHECK-FP5-DP-D16-DAG: "-target-feature" "+fp-armv8d16"
|
||||
// CHECK-FP5-DP-D16-DAG: "-target-feature" "+fp64"
|
||||
// CHECK-FP5-DP-D16-NOT: "-target-feature" "+d32"
|
||||
// CHECK-FP5-DP-D16-DAG: "-target-feature" "-d32"
|
||||
// CHECK-FP5-DP-D16-DAG: "-target-feature" "-neon"
|
||||
// CHECK-FP5-DP-D16-DAG: "-target-feature" "-crypto"
|
||||
// CHECK-SOFT-ABI-FP-5-DAG: "-target-feature" "+soft-float"
|
||||
@ -323,8 +323,8 @@
|
||||
// CHECK-NO-FP-DAG: "-target-feature" "-vfp3d16sp"
|
||||
// CHECK-NO-FP-DAG: "-target-feature" "-vfp4d16sp"
|
||||
// CHECK-NO-FP-DAG: "-target-feature" "-fp-armv8d16sp"
|
||||
// CHECK-NO-FP-NOT: "-target-feature" "+fp64"
|
||||
// CHECK-NO-FP-NOT: "-target-feature" "+d32"
|
||||
// CHECK-NO-FP-DAG: "-target-feature" "-fp64"
|
||||
// CHECK-NO-FP-DAG: "-target-feature" "-d32"
|
||||
// CHECK-NO-FP-DAG: "-target-feature" "-neon"
|
||||
// CHECK-NO-FP-DAG: "-target-feature" "-crypto"
|
||||
|
||||
@ -382,8 +382,8 @@
|
||||
// CHECK-ARM7-ANDROID-FP-DEFAULT-NOT: "-target-feature" "+soft-float"
|
||||
// CHECK-ARM7-ANDROID-FP-DEFAULT-DAG: "-target-feature" "+soft-float-abi"
|
||||
// CHECK-ARM7-ANDROID-FP-DEFAULT-DAG: "-target-feature" "+vfp3"
|
||||
// CHECK-ARM7-ANDROID-FP-DEFAULT-NOT: "-target-feature" "+vfp4"
|
||||
// CHECK-ARM7-ANDROID-FP-DEFAULT-NOT: "-target-feature" "+fp-armv8"
|
||||
// CHECK-ARM7-ANDROID-FP-DEFAULT-DAG: "-target-feature" "-vfp4"
|
||||
// CHECK-ARM7-ANDROID-FP-DEFAULT-DAG: "-target-feature" "-fp-armv8"
|
||||
// CHECK-ARM7-ANDROID-FP-DEFAULT-DAG: "-target-feature" "+neon"
|
||||
// CHECK-ARM7-ANDROID-FP-DEFAULT-NOT: "-target-feature" "+crypto"
|
||||
|
||||
@ -391,7 +391,7 @@
|
||||
// RUN: | FileCheck --check-prefix=CHECK-ARM7-ANDROID-FP-D16 %s
|
||||
// CHECK-ARM7-ANDROID-FP-D16-NOT: "-target-feature" "+soft-float"
|
||||
// CHECK-ARM7-ANDROID-FP-D16-DAG: "-target-feature" "+soft-float-abi"
|
||||
// CHECK-ARM7-ANDROID-FP-D16-NOT: "-target-feature" "+d32"
|
||||
// CHECK-ARM7-ANDROID-FP-D16-DAG: "-target-feature" "-d32"
|
||||
// CHECK-ARM7-ANDROID-FP-D16-DAG: "-target-feature" "+vfp3d16"
|
||||
// CHECK-ARM7-ANDROID-FP-D16-NOT: "-target-feature" "+vfp4"
|
||||
// CHECK-ARM7-ANDROID-FP-D16-NOT: "-target-feature" "+fp-armv8"
|
||||
@ -403,3 +403,23 @@
|
||||
// CHECK-SOFTFLOATABI-INHIBITS-MVE-NOT: "-target-feature" "+mve"
|
||||
// CHECK-SOFTFLOATABI-INHIBITS-MVE-DAG: "-target-feature" "-mve"
|
||||
// CHECK-SOFTFLOATABI-INHIBITS-MVE-DAG: "-target-feature" "-mve.fp"
|
||||
|
||||
// RUN: %clang -target arm-none-none-eabi %s -march=armv8.1-m.main+mve.fp -mfpu=none -### -c 2>&1 \
|
||||
// RUN: | FileCheck --check-prefix=CHECK-MVEFP-FPUNONE %s
|
||||
// CHECK-MVEFP-FPUNONE-DAG: "-target-feature" "-vfp2sp"
|
||||
// CHECK-MVEFP-FPUNONE-DAG: "-target-feature" "-vfp3d16sp"
|
||||
// CHECK-MVEFP-FPUNONE-DAG: "-target-feature" "-vfp4d16sp"
|
||||
// CHECK-MVEFP-FPUNONE-DAG: "-target-feature" "-fp-armv8d16sp"
|
||||
// CHECK-MVEFP-FPUNONE-DAG: "-target-feature" "-fp64"
|
||||
// CHECK-MVEFP-FPUNONE-DAG: "-target-feature" "-d32"
|
||||
// CHECK-MVEFP-FPUNONE-DAG: "-target-feature" "-neon"
|
||||
// CHECK-MVEFP-FPUNONE-DAG: "-target-feature" "-crypto"
|
||||
// CHECK-MVEFP-FPUNONE-DAG: "-target-feature" "-mve.fp"
|
||||
// CHECK-MVEFP-FPUNONE-NOT: "-target-feature" "-fpregs"
|
||||
|
||||
|
||||
// RUN: %clang -target arm-none-none-eabi %s -march=armv8.1-m.main+mve -mfpu=none -### -c 2>&1 \
|
||||
// RUN: | FileCheck --check-prefix=CHECK-MVEI-FPUNONE %s
|
||||
// CHECK-MVEI-FPUNONE-DAG: "-target-feature" "-mve.fp"
|
||||
// CHECK-MVEI-FPUNONE-DAG: "-target-feature" "+mve"
|
||||
// CHECK-MVEI-FPUNONE-NOT: "-target-feature" "-fpregs"
|
||||
|
||||
@ -174,8 +174,6 @@ bool ARM::getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features) {
|
||||
// under FPURestriction::None, which is the only FPURestriction in
|
||||
// which they would be valid (since FPURestriction::SP doesn't
|
||||
// exist).
|
||||
|
||||
{"+fpregs", "-fpregs", FPUVersion::VFPV2, FPURestriction::SP_D16},
|
||||
{"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::D16},
|
||||
{"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16},
|
||||
{"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None},
|
||||
|
||||
@ -43,4 +43,4 @@ land.end: ; preds = %land.rhs, %entry
|
||||
ret void
|
||||
}
|
||||
|
||||
attributes #0 = { noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="preserve-sign" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cortex-m4" "target-features"="+armv7e-m,+dsp,+fp16,+fpregs,+hwdiv,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp,-aes,-crc,-crypto,-dotprod,-fp16fml,-fullfp16,-hwdiv-arm,-lob,-mve,-mve.fp,-ras,-sb,-sha2" "unsafe-fp-math"="false" "use-soft-float"="false" }
|
||||
attributes #0 = { noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="preserve-sign" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cortex-m4" "target-features"="+armv7e-m,+dsp,+fp16,+hwdiv,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp,-aes,-crc,-crypto,-dotprod,-fp16fml,-fullfp16,-hwdiv-arm,-lob,-mve,-mve.fp,-ras,-sb,-sha2" "unsafe-fp-math"="false" "use-soft-float"="false" }
|
||||
|
||||
@ -60,7 +60,7 @@
|
||||
declare void @llvm.masked.store.v4i32.p0v4i32(<4 x i32>, <4 x i32>*, i32 immarg, <4 x i1>) #3
|
||||
declare void @llvm.stackprotector(i8*, i8**) #5
|
||||
|
||||
attributes #0 = { nofree norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+fp-armv8d16sp,+fp16,+fpregs,+fullfp16,+hwdiv,+lob,+mve.fp,+ras,+strict-align,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp" "unsafe-fp-math"="true" "use-soft-float"="false" }
|
||||
attributes #0 = { nofree norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+fp-armv8d16sp,+fp16,+fullfp16,+hwdiv,+lob,+mve.fp,+ras,+strict-align,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp" "unsafe-fp-math"="true" "use-soft-float"="false" }
|
||||
attributes #1 = { noduplicate nounwind }
|
||||
attributes #2 = { nounwind readnone }
|
||||
attributes #3 = { argmemonly nounwind willreturn }
|
||||
|
||||
@ -62,7 +62,7 @@
|
||||
declare void @llvm.masked.store.v4i32.p0v4i32(<4 x i32>, <4 x i32>*, i32 immarg, <4 x i1>) #3
|
||||
declare void @llvm.stackprotector(i8*, i8**) #5
|
||||
|
||||
attributes #0 = { nofree norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+fp-armv8d16sp,+fp16,+fpregs,+fullfp16,+hwdiv,+lob,+mve.fp,+ras,+strict-align,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp" "unsafe-fp-math"="true" "use-soft-float"="false" }
|
||||
attributes #0 = { nofree norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+fp-armv8d16sp,+fp16,+fullfp16,+hwdiv,+lob,+mve.fp,+ras,+strict-align,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp" "unsafe-fp-math"="true" "use-soft-float"="false" }
|
||||
attributes #1 = { noduplicate nounwind }
|
||||
attributes #2 = { nounwind readnone }
|
||||
attributes #3 = { argmemonly nounwind willreturn }
|
||||
|
||||
@ -62,7 +62,7 @@
|
||||
declare void @llvm.masked.store.v4i32.p0v4i32(<4 x i32>, <4 x i32>*, i32 immarg, <4 x i1>) #3
|
||||
declare void @llvm.stackprotector(i8*, i8**) #5
|
||||
|
||||
attributes #0 = { nofree norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+fp-armv8d16sp,+fp16,+fpregs,+fullfp16,+hwdiv,+lob,+mve.fp,+ras,+strict-align,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp" "unsafe-fp-math"="true" "use-soft-float"="false" }
|
||||
attributes #0 = { nofree norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+fp-armv8d16sp,+fp16,+fullfp16,+hwdiv,+lob,+mve.fp,+ras,+strict-align,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp" "unsafe-fp-math"="true" "use-soft-float"="false" }
|
||||
attributes #1 = { noduplicate nounwind }
|
||||
attributes #2 = { nounwind readnone }
|
||||
attributes #3 = { argmemonly nounwind willreturn }
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp,+fp-armv8d16sp,+fp16,+fpregs,+fullfp16 -disable-mve-tail-predication=false %s -o - | FileCheck %s
|
||||
; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp,+fp-armv8d16sp,+fp16,+fullfp16 -disable-mve-tail-predication=false %s -o - | FileCheck %s
|
||||
|
||||
define arm_aapcs_vfpcc void @fast_float_mul(float* nocapture %a, float* nocapture readonly %b, float* nocapture readonly %c, i32 %N) {
|
||||
; CHECK-LABEL: fast_float_mul:
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp,+fp-armv8d16sp,+fp16,+fpregs,+fullfp16 %s -o - | FileCheck %s
|
||||
; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp,+fp-armv8d16sp,+fp16,+fullfp16 %s -o - | FileCheck %s
|
||||
|
||||
define arm_aapcs_vfpcc void @float_float_mul(float* nocapture readonly %a, float* nocapture readonly %b, float* nocapture %c, i32 %N) {
|
||||
; CHECK-LABEL: float_float_mul:
|
||||
|
||||
@ -84,4 +84,4 @@ exit:
|
||||
ret void
|
||||
}
|
||||
|
||||
attributes #0 = { nounwind "min-legal-vector-width"="0" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+fp-armv8d16sp,+fp16,+fpregs,+fullfp16,+hwdiv,+lob,+mve.fp,+ras,+strict-align,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp" "use-soft-float"="false" }
|
||||
attributes #0 = { nounwind "min-legal-vector-width"="0" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+fp-armv8d16sp,+fp16,+fullfp16,+hwdiv,+lob,+mve.fp,+ras,+strict-align,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp" "use-soft-float"="false" }
|
||||
|
||||
@ -84,4 +84,4 @@ while.end: ; preds = %while.body, %entry
|
||||
ret void
|
||||
}
|
||||
|
||||
attributes #0 = { "target-features"="+armv8.1-m.main,+fp-armv8d16,+fp-armv8d16sp,+fp16,+fp64,+fpregs,+fullfp16,+hwdiv,+lob,+mve.fp,+ras,+strict-align,+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp,+vfp4d16,+vfp4d16sp,-crypto,-d32,-fp-armv8,-fp-armv8sp,-neon,-vfp3,-vfp3sp,-vfp4,-vfp4sp" }
|
||||
attributes #0 = { "target-features"="+armv8.1-m.main,+fp-armv8d16,+fp-armv8d16sp,+fp16,+fp64,+fullfp16,+hwdiv,+lob,+mve.fp,+ras,+strict-align,+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp,+vfp4d16,+vfp4d16sp,-crypto,-d32,-fp-armv8,-fp-armv8sp,-neon,-vfp3,-vfp3sp,-vfp4,-vfp4sp" }
|
||||
|
||||
Loading…
Reference in New Issue
Block a user