Implemented cache mapping hi code support

code/core/arm9/Makefile

@@ -44,7 +44,8 @@ INCLUDES	:=	include source ../common ../../libs/mini-printf
 #---------------------------------------------------------------------------------
 # options for code generation
 #---------------------------------------------------------------------------------
-ARCH	:=	-marm -mthumb-interwork -march=armv5te -mtune=arm946e-s -DLIBTWL_ARM9 -DARM9
+ARCH	:=	-marm -mthumb-interwork -march=armv5te -mtune=arm946e-s \
+			-DLIBTWL_ARM9 -DARM9 -DGBAR3_HICODE_CACHE_MAPPING
 
 CFLAGS	:=	-g -Wall -O2\
 			 -fomit-frame-pointer\

code/core/arm9/source/MemoryEmulator/Arm/ArmDispatch.s

@@ -13,8 +13,16 @@ arm_func memu_armDispatch
     msr cpsr_c, #0x91 // switch to fiq mode
     ldr r11, DTCM(memu_inst_addr)
     ldr r12, DTCM(memu_arm_table_addr)
+
+#ifdef GBAR3_HICODE_CACHE_MAPPING
+    cmp r11, #0x08000000
+        bhs readInstructionFromCache
+#endif
+
     ldr lr, [r11, #-8] // lr = instruction
 
+armDispatchContinue:
+
 @ #ifndef GBAR3_TEST
 @     ldr sp,= dtcmStackEnd
 @     push {r0-r3,r12,lr}
@@ -46,4 +54,17 @@ arm_func memu_armDispatch
 
     bx r12
 
+#ifdef GBAR3_HICODE_CACHE_MAPPING
+
+readInstructionFromCache:
+    sub r11, r11, #8
+    bic r11, r11, #0xFE000000
+    tst r11, #0x800
+    orrne r11, r11, #0x40000000 // set
+    mcr p15, 3, r11, c15, c0, 0 // set index
+    mrc p15, 3, lr, c15, c3, 0 // read data
+    b armDispatchContinue
+
+#endif
+
 .end

code/core/arm9/source/MemoryEmulator/HiCodeCacheMapping.h

@@ -0,0 +1,15 @@
+#pragma once
+
+#ifdef GBAR3_HICODE_CACHE_MAPPING
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void hic_unmapRomBlock(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

code/core/arm9/source/MemoryEmulator/HiCodeCacheMapping.s

@@ -0,0 +1,78 @@
+.section ".itcm", "ax"
+
+#include "AsmMacros.inc"
+#include "SdCache/SdCacheDefs.h"
+
+#ifdef GBAR3_HICODE_CACHE_MAPPING
+
+/// @brief Unmaps the currently mapped rom block (if any).
+/// @param r0 Trashed
+/// @param lr Return address
+arm_func hic_unmapRomBlock
+    mov r0, #0
+    mcr p15, 0, r0, c9, c0, 1 // unlock icache
+    mcr	p15, 0, r0, c6, c4, 0 // disable mpu region
+    bx lr
+
+/// @brief Maps the 4 kB rom block at the given address into the instruction cache.
+/// @param r0 The GBA rom address 0x08000000-0x0DFFFFFF
+/// @param sp Stack pointer
+/// @param lr Return address
+arm_func hic_mapRomBlock
+    push {r4, lr}
+    bic r4, r0, #0x06000000
+    mov r4, r4, lsr #12
+    mov r4, r4, lsl #12
+    ldr r1,= (sdc_romBlockToCacheBlock - (0x08000000 >> (SDC_BLOCK_SHIFT - 2)))
+    //setup the pu region
+    orr r12, r4, #0x17
+    ldr r0, [r1, r4, lsr #(SDC_BLOCK_SHIFT - 2)]
+    mcr	p15, 0, r12, c6, c4, 0
+    
+    cmp r0, #0
+    moveq r0, r4
+    bleq sdc_loadRomBlockDirect
+
+    orr r1, r4, #(1 << 4) //valid flag
+
+    mov r12, #0x80000000 //load bit + segment 0
+    mcr p15, 0, r12, c9, c0, 1
+    bl prefetchCacheSet
+.rept 64
+    mcr p15, 3, r1, c15, c0, 0 //set index
+    mcr p15, 3, r1, c15, c1, 0 //write tag
+    add r1, r1, #32
+.endr
+    add r4, r4, #2048
+    ldr r1,= (sdc_romBlockToCacheBlock - (0x08000000 >> (SDC_BLOCK_SHIFT - 2)))
+    mov r12, #0x00000001 //segment 1
+    ldr r0, [r1, r4, lsr #(SDC_BLOCK_SHIFT - 2)]
+    mcr p15, 0, r12, c9, c0, 1
+
+    cmp r0, #0
+    moveq r0, r4
+    bleq sdc_loadRomBlockDirect
+
+    orr r1, r4, #(1 << 4) //valid flag
+
+    mov r12, #0x80000001 //load bit + segment 1
+    mcr p15, 0, r12, c9, c0, 1
+    bl prefetchCacheSet
+.rept 64
+    orr r3, r1, #(1 << 30)
+    mcr p15, 3, r3, c15, c0, 0 //set index
+    mcr p15, 3, r1, c15, c1, 0 //write tag
+    add r1, r1, #32
+.endr
+    mov r0, #0x00000002 //segment 2
+    mcr p15, 0, r0, c9, c0, 1
+    pop {r4, pc}
+
+prefetchCacheSet:
+.rept 64
+    mcr p15, 0, r0, c7, c13, 1 //prefetch
+    add r0, r0, #32
+.endr
+    bx lr
+
+#endif

code/core/arm9/source/MemoryEmulator/MemoryLoad16.s

@@ -48,16 +48,41 @@ arm_func memu_load16Undefined
     movs r13, r13, lsl #27
     msr cpsr_c, #0xD1
     ldr r10, [r10]
-    ldrcch r9, [r10] // arm
-    ldrcsh r9, [r10, #-4] // thumb
+    subcs r10, r10, #4
+    cmp r10, #0x08000000
+        bhs undefinedFromRom16
+
+    ldrh r9, [r10]
+undefined16Continue:
     tst r8, #1
         bxeq lr
     mov r9, r9, ror #8
     bx lr
 
+undefinedTmpR8:
+    .word 0
+undefinedTmpLr:
+    .word 0
+
+undefinedFromRom16:
+    str r8, undefinedTmpR8
+    str lr, undefinedTmpLr
+    mov r8, r10
+    bl memu_load16Rom
+    ldr r8, undefinedTmpR8
+    ldr lr, undefinedTmpLr
+    b undefined16Continue
+
 arm_func memu_load16Bios
     cmp r8, #0x4000
         bhs memu_load16Undefined
+    ldr r9,= 0xE3A02004
+    tst r8, #2
+        moveq r9, r9, lsl #16
+    mov r9, r9, lsr #16
+    tst r8, #1
+        bxeq lr
+    mov r9, r9, ror #8
     bx lr
 
 arm_func memu_load16Ewram
@@ -160,6 +185,12 @@ load16RomCacheMiss:
     // if not begin at the end of the stack
     movhs sp, r11
     push {r0-r3,lr}
+
+#ifdef GBAR3_HICODE_CACHE_MAPPING
+    bl hic_unmapRomBlock
+#endif
+
+    bl ic_invalidateAll
     mov r0, r8
     bl sdc_loadRomBlockDirect
     mov r9, r8, lsl #(32 - SDC_BLOCK_SHIFT)

code/core/arm9/source/MemoryEmulator/MemoryLoad32.s

@@ -47,21 +47,57 @@ arm_func memu_load32Undefined
     bcs thumbUndefined32
 
 armUndefined32:
+    cmp r10, #0x08000000
+        bhs undefinedFromRom32Arm
+
     ldr r10, [r10]
+armUndefined32Continue:
     mov r11, r8, lsl #3
     mov r9, r10, ror r11
     bx lr
 
 thumbUndefined32:
-    ldrh r11, [r10, #-4]
+    sub r10, r10, #4
+    cmp r10, #0x08000000
+        bhs undefinedFromRom32Thumb
+    ldrh r11, [r10]
+thumbUndefined32Continue:
     orr r10, r11, r11, lsl #16
     mov r11, r8, lsl #3
     mov r9, r10, ror r11
     bx lr
 
+undefinedTmpR8:
+    .word 0
+undefinedTmpLr:
+    .word 0
+
+undefinedFromRom32Arm:
+    str r8, undefinedTmpR8
+    str lr, undefinedTmpLr
+    mov r8, r10
+    bl memu_load32Rom
+    mov r10, r9
+    ldr r8, undefinedTmpR8
+    ldr lr, undefinedTmpLr
+    b armUndefined32Continue
+
+undefinedFromRom32Thumb:
+    str r8, undefinedTmpR8
+    str lr, undefinedTmpLr
+    mov r8, r10
+    bl memu_load16Rom
+    mov r11, r9
+    ldr r8, undefinedTmpR8
+    ldr lr, undefinedTmpLr
+    b thumbUndefined32Continue
+
 arm_func memu_load32Bios
     cmp r8, #0x4000
         bhs memu_load32Undefined
+    ldr r9,= 0xE3A02004
+    mov r11, r8, lsl #3
+    mov r9, r9, ror r11
     bx lr
 
 arm_func memu_load32Ewram
@@ -148,6 +184,12 @@ load32RomCacheMiss:
     // if not begin at the end of the stack
     movhs sp, r11
     push {r0-r3,lr}
+
+#ifdef GBAR3_HICODE_CACHE_MAPPING
+    bl hic_unmapRomBlock
+#endif
+
+    bl ic_invalidateAll
     mov r0, r8
     bl sdc_loadRomBlockDirect
     mov r9, r8, lsl #(32 - SDC_BLOCK_SHIFT)

code/core/arm9/source/MemoryEmulator/MemoryLoad8.s

@@ -35,24 +35,14 @@ arm_func memu_load8
     .word memu_load8Sram // 0F
 
 arm_func memu_load8Undefined
-    ldr r10,= memu_inst_addr
-    msr cpsr_c, #0xD7
-    ldr r13,= memu_inst_addr
-    str lr, [r13]
-    mrs r13, spsr
-    movs r13, r13, lsl #27
-    msr cpsr_c, #0xD1
-    ldr r10, [r10]
-    ldrcch r9, [r10] // arm
-    ldrcsh r9, [r10, #-4] // thumb
-    tst r8, #1
-        bxeq lr
-    mov r9, r9, ror #8
-    bx lr
+    b memu_load16Undefined
 
 arm_func memu_load8Bios
     cmp r8, #0x4000
         bhs memu_load8Undefined
+    ldr r9,= 0xE3A02004
+    mov r10, r8, lsl #3
+    mov r9, r9, ror r10
     bx lr
 
 arm_func memu_load8Ewram
@@ -141,6 +131,12 @@ load8RomCacheMiss:
     // if not begin at the end of the stack
     movhs sp, r11
     push {r0-r3,lr}
+
+#ifdef GBAR3_HICODE_CACHE_MAPPING
+    bl hic_unmapRomBlock
+#endif
+
+    bl ic_invalidateAll
     mov r0, r8
     bl sdc_loadRomBlockDirect
     mov r9, r8, lsl #(32 - SDC_BLOCK_SHIFT)

code/core/arm9/source/MemoryEmulator/PrefetchAbort.s

@@ -0,0 +1,31 @@
+.section ".itcm", "ax"
+.arm
+
+#include "AsmMacros.inc"
+#include "MemoryEmuDtcm.inc"
+
+arm_func memu_prefetchAbort
+    sub lr, lr, #4
+    cmp lr, #0x03000000
+        blo prefetchAbortRomRelative
+    cmp lr, #0x0C000000
+        blo prefetchAbortRomAbsolute
+badPrefetchAbort:
+    b .
+
+prefetchAbortRomRelative:
+    add lr, lr, #(0x08000000 - 0x02200000)
+
+prefetchAbortRomAbsolute:
+    cmp lr, #0x08200000
+        addlos pc, lr, #(0x02200000 - 0x08000000)
+
+#ifdef GBAR3_HICODE_CACHE_MAPPING
+    ldr sp,= dtcmStackEnd
+    push {r0-r3, r12, lr}
+    mov r0, lr
+    bl hic_mapRomBlock
+    ldmfd sp, {r0-r3, r12, pc}^
+#else
+    b badPrefetchAbort
+#endif

code/core/arm9/source/MemoryEmulator/Thumb/ThumbDispatch.s

@@ -12,8 +12,16 @@ thumb_dispatch_base:
 
 arm_func memu_thumbDispatch
     str r0, DTCM(memu_thumb_r0)
+
+#ifdef GBAR3_HICODE_CACHE_MAPPING
+    cmp lr, #0x08000000
+        bhs readInstructionFromCache
+#endif
+
     ldrh r0, [lr, #-8]
 
+thumbDispatchContinue:
+
 @ #ifndef GBAR3_TEST
 @     ldr sp,= dtcmStackEnd
 @     push {r0-r3,r12,lr}
@@ -49,4 +57,22 @@ arm_func memu_thumbDispatch
 
 generate make_memu_thumbGetRnRm, 64
 
+#ifdef GBAR3_HICODE_CACHE_MAPPING
+
+readInstructionFromCache:
+    ldr r0,= memu_inst_addr
+    str lr, [r0]
+    sub r0, lr, #8
+    bic r0, r0, #0xFE000000
+    tst r0, #0x800
+    orrne r0, r0, #0x40000000 // set
+    mcr p15, 3, r0, c15, c0, 0 // set index
+    mrc p15, 3, r0, c15, c3, 0 // read data
+    tst lr, #2
+    moveq r0, r0, lsl #16
+    mov r0, r0, lsr #16
+    b thumbDispatchContinue
+
+#endif
+
 .end

code/core/arm9/source/MemoryEmulator/Thumb/ThumbDtcm.s

@@ -7,7 +7,13 @@
 memu_thumbDispatchTable:
 
 .macro memu_instructionPointer2 a, b, rd, rd2
-    .if (\a == 0b01010) && (\b == 0b00)
+    .if \a == 0b01001
+#ifdef GBAR3_HICODE_CACHE_MAPPING
+        .short memu_thumbLdrPcR\rd
+#else
+        .short 0
+#endif
+    .elseif (\a == 0b01010) && (\b == 0b00)
         .short memu_thumbStrRegR\rd2
     .elseif (\a == 0b01010) && (\b == 0b01)
         .short memu_thumbStrhRegR\rd2

code/core/arm9/source/MemoryEmulator/Thumb/ThumbLoadPc.s

@@ -0,0 +1,32 @@
+.section ".itcm", "ax"
+.altmacro
+
+#include "AsmMacros.inc"
+#include "ThumbMacros.inc"
+#include "../MemoryEmuDtcm.inc"
+
+#ifdef GBAR3_HICODE_CACHE_MAPPING
+
+.macro memu_thumbLdrPcRd rd
+    arm_func memu_thumbLdrPcR\rd
+        ldr r10,= memu_inst_addr
+        and r8, r11, #0xFF
+        ldr r10, [r10]
+        sub r8, r8, #1
+        bic r10, r10, #3
+        add r8, r10, r8, lsl #2
+
+        and r10, r8, #0x0F000000
+        cmp r8, #0x10000000
+            addlo r9, r9, r10, lsr #22
+        ldr r10, [r9, #1] // memu_load32Table
+        // interlock
+        blx r10
+
+        mov r\rd, r9
+        memu_thumbReturn
+.endm
+
+generate memu_thumbLdrPcRd, 8
+
+#endif

code/core/arm9/source/Peripherals/DmaTransfer.c

@@ -6,6 +6,7 @@
 #include "MemCopy.h"
 #include "GbaIoRegOffsets.h"
 #include "SdCache/SdCache.h"
+#include "MemoryEmulator/HiCodeCacheMapping.h"
 #include "DmaTransfer.h"
 
 DTCM_DATA dma_state_t dma_state;
@@ -359,6 +360,9 @@ ITCM_CODE static void dmaStart(void* dmaIoBase, u32 value)
 
 ITCM_CODE void dma_CntHStore16(void* dmaIoBase, u32 value)
 {
+#ifdef GBAR3_HICODE_CACHE_MAPPING
+    hic_unmapRomBlock();
+#endif
     ic_invalidateAll();
     u32 oldCnt = *(u16*)(dmaIoBase + 0xA);
     if (!((oldCnt ^ value) & 0x8000))

code/core/arm9/source/SDCache/SdCache.c

@@ -2,6 +2,7 @@
 #include "Fat/ff.h"
 #include "Fat/diskio.h"
 #include "VirtualMachine/VMNestedIrq.h"
+#include "cp15.h"
 #include "SdCache.h"
 
 void* sdc_romBlockToCacheBlock[SDC_ROM_BLOCK_COUNT];
@@ -54,6 +55,7 @@ static void loadRomBlock(u32 romBlock, void* dst)
     u32 sector = fs->database + fs->csize * cluster;
     sector += csect;
     disk_read(fs->pdrv, dst, sector, SDC_BLOCK_SIZE / 512); 
+    dc_flushRange(dst, SDC_BLOCK_SIZE);
 }
 
 extern void logAddress(u32 address);
@@ -61,7 +63,6 @@ extern void logAddress(u32 address);
 const void* sdc_loadRomBlockDirect(u32 romAddress)
 {
     vm_enableNestedIrqs();
-    ic_invalidateAll();
     // logAddress(romAddress);
     u32 romBlock = ((romAddress << 7) >> 7) / SDC_BLOCK_SIZE;
     u32 blockIdx = getBlockToReplace();

code/core/arm9/source/SDCache/SdCache.h

@@ -1,5 +1,7 @@
 #pragma once
 #include "SdCacheDefs.h"
+#include "MemoryEmulator/HiCodeCacheMapping.h"
+#include "cp15.h"
 
 /// @brief The sd cache blocks.
 extern u8 sdc_cache[SDC_BLOCK_COUNT][SDC_BLOCK_SIZE];
@@ -25,6 +27,10 @@ static inline const void* sdc_getRomBlock(u32 romAddress)
     void* data = sdc_romBlockToCacheBlock[romBlock];
     if (data)
         return data;
+#ifdef GBAR3_HICODE_CACHE_MAPPING
+    hic_unmapRomBlock();
+#endif
+    ic_invalidateAll();
     return sdc_loadRomBlockDirect(romAddress);
 }
 

code/core/arm9/source/cp15.h

@@ -1,5 +1,13 @@
 #pragma once
 
-extern "C" void ic_invalidateAll(void);
-extern "C" void dc_drainWriteBuffer(void);
-extern "C" void dc_flushRange(void* start, u32 count);
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void ic_invalidateAll(void);
+extern void dc_drainWriteBuffer(void);
+extern void dc_flushRange(void* start, u32 count);
+
+#ifdef __cplusplus
+}
+#endif

code/core/arm9/source/crt0.s

@@ -24,11 +24,8 @@ _start:
     // mpu region 0: ITCM, DTCM, uncached mmem, IO, GBA slot (4 GB)
     ldr r0,= ((1 | (31 << 1)) + 0x00000000)
     mcr	p15, 0, r0, c6, c0, 0
-    @ // mpu region 1: Cached Main Memory (4 MB)
-    @ ldr r0,= ((1 | (21 << 1)) + 0x02000000)
-    @ mcr	p15, 0, r0, c6, c1, 0
-    // mpu region 1: Cached Main Memory (8 MB)
-    ldr r0,= ((1 | (22 << 1)) + 0x02000000)
+    // mpu region 1: Cached Main Memory (4 MB)
+    ldr r0,= ((1 | (21 << 1)) + 0x02000000)
     mcr	p15, 0, r0, c6, c1, 0
     // mpu region 2: VRAM (8 MB)
     ldr r0,= ((1 | (22 << 1)) + 0x06000000)
@@ -52,13 +49,13 @@ _start:
     ldr r0,= 0x33200121
     mcr p15, 0, r0, c5, c0, 2
     // code permissions
-    ldr r0,= 0x33300221
+    ldr r0,= 0x33330221
     mcr p15, 0, r0, c5, c0, 3
     // dcache
     ldr r0,= 0b11100010
     mcr p15, 0, r0, c2, c0, 0
     // icache
-    ldr r0,= 0b11100010
+    ldr r0,= 0b11110010
     mcr p15, 0, r0, c2, c0, 1
     // write buffer
     ldr r0,= 0b10100010

code/core/arm9/source/main.cpp

@@ -115,11 +115,12 @@ static void applyBiosVmPatches()
 
 static void loadGbaRom()
 {
+    UINT br;
     memset(&gFile, 0, sizeof(gFile));
+
     // f_open(&gFile, "/suite.gba", FA_OPEN_EXISTING | FA_READ);
-    // UINT br;
+    // sdc_init();
     // f_read(&gFile, (void*)0x02200000, f_size(&gFile), &br);
-    // f_close(&gFile);
     // // agb aging
     // // *(vu32*)0x022000C4 = 0xE1890090; // msr cpsr_cf, r0
     // // mgba suite
@@ -134,18 +135,14 @@ static void loadGbaRom()
     // *(vu32*)0x022500B0 = 0xEE64000E; // movs pc, lr
 
     // f_open(&gFile, "/Mario Kart - Super Circuit (Europe).gba", FA_OPEN_EXISTING | FA_READ);
-    // UINT br;
     // f_read(&gFile, (void*)0x02200000, 4 * 1024 * 1024, &br);
-    // // f_close(&gFile);
     // // mksc eu
     // *(vu32*)0x022000C0 = 0xE1890090; // msr cpsr_cf, r0
     // *(vu32*)0x022000D0 = 0xE1890090; // msr cpsr_cf, r0
 
     // f_open(&gFile, "/Donkey Kong Country 3 (Europe) (En,Fr,De,Es,It).gba", FA_OPEN_EXISTING | FA_READ);
     // sdc_init();
-    // UINT br;
     // f_read(&gFile, (void*)0x02200000, 2 * 1024 * 1024, &br);
-    // // f_close(&gFile);
     // *(vu32*)0x022000C4 = 0xE1890090; // msr cpsr_cf, r0
     // *(vu32*)0x022000D0 = 0xE1890090; // msr cpsr_cf, r0
     // *(vu32*)0x02200100 = 0xE1A00090; // mrs r0, cpsr
@@ -159,28 +156,46 @@ static void loadGbaRom()
     // *(vu32*)0x02200238 = 0xE1890093; // msr cpsr_cf, r3
     // *(vu32*)0x02200248 = 0xE1C90090; // msr spsr_cf, r0
 
-    f_open(&gFile, "/Sims, The - Bustin' Out (USA, Europe) (En,Fr,De,Es,It,Nl).gba", FA_OPEN_EXISTING | FA_READ);
+    // f_open(&gFile, "/Sims, The - Bustin' Out (USA, Europe) (En,Fr,De,Es,It,Nl).gba", FA_OPEN_EXISTING | FA_READ);
+    // sdc_init();
+    // f_read(&gFile, (void*)0x02200000, 2 * 1024 * 1024, &br);
+    // *(vu32*)0x022000C4 = 0xE1890090; // msr cpsr_cf, r0
+    // *(vu32*)0x022000D0 = 0xE1890090; // msr cpsr_cf, r0
+    // *(vu32*)0x02200134 = 0xE1A00090; // mrs r0, cpsr
+    // *(vu32*)0x0220013C = 0xE1890090; // msr cpsr_cf, r0
+    // *(vu32*)0x0220014C = 0xE1A00090; // mrs r0, cpsr
+    // *(vu32*)0x02200154 = 0xE1890090; // msr cpsr_cf, r0
+    // *(vu32*)0x02200170 = 0xE1E00090; // mrs r0, spsr
+    // *(vu32*)0x02200238 = 0xE1A00093; // mrs r3, cpsr
+    // *(vu32*)0x02200244 = 0xE1890093; // msr cpsr_cf, r3
+    // *(vu32*)0x02200264 = 0xE1A00093; // mrs r3, cpsr
+    // *(vu32*)0x02200270 = 0xE1890093; // msr cpsr_cf, r3
+    // *(vu32*)0x02200280 = 0xE1C90090; // msr spsr_cf, r0
+
+    // f_open(&gFile, "/Asterix & Obelix XXL (Europe) (En,Fr,De,Es,It,Nl).gba", FA_OPEN_EXISTING | FA_READ);
+    // sdc_init();
+    // f_read(&gFile, (void*)0x02200000, 2 * 1024 * 1024, &br);
+    // *(vu32*)0x02250000 = 0xE1A00090; // mrs r0, cpsr
+    // *(vu32*)0x0225000C = 0xE1890090; // msr cpsr_cf, r0
+    // *(vu32*)0x02250014 = 0xE1A00090; // mrs r0, cpsr
+    // *(vu32*)0x02250020 = 0xE1890090; // msr cpsr_cf, r0
+    // *(vu32*)0x02250028 = 0xE1A00090; // mrs r0, cpsr
+    // *(vu32*)0x02250034 = 0xE1890090; // msr cpsr_cf, r0
+
+    f_open(&gFile, "/DK - King of Swing (Europe) (En,Fr,De,Es,It).gba", FA_OPEN_EXISTING | FA_READ);
     sdc_init();
-    UINT br;
     f_read(&gFile, (void*)0x02200000, 2 * 1024 * 1024, &br);
-    // f_close(&gFile);
     *(vu32*)0x022000C4 = 0xE1890090; // msr cpsr_cf, r0
     *(vu32*)0x022000D0 = 0xE1890090; // msr cpsr_cf, r0
-    *(vu32*)0x02200134 = 0xE1A00090; // mrs r0, cpsr
-    *(vu32*)0x0220013C = 0xE1890090; // msr cpsr_cf, r0
-    *(vu32*)0x0220014C = 0xE1A00090; // mrs r0, cpsr
-    *(vu32*)0x02200154 = 0xE1890090; // msr cpsr_cf, r0
-    *(vu32*)0x02200170 = 0xE1E00090; // mrs r0, spsr
-    *(vu32*)0x02200238 = 0xE1A00093; // mrs r3, cpsr
-    *(vu32*)0x02200244 = 0xE1890093; // msr cpsr_cf, r3
-    *(vu32*)0x02200264 = 0xE1A00093; // mrs r3, cpsr
-    *(vu32*)0x02200270 = 0xE1890093; // msr cpsr_cf, r3
-    *(vu32*)0x02200280 = 0xE1C90090; // msr spsr_cf, r0
+    *(vu32*)0x02200414 = 0xE1E00090; // mrs r0, spsr
+    *(vu32*)0x02200460 = 0xE1A00093; // mrs r3, cpsr
+    *(vu32*)0x0220046C = 0xE1890093; // msr cpsr_cf, r3
+    *(vu32*)0x02200488 = 0xE1A00093; // mrs r3, cpsr
+    *(vu32*)0x02200494 = 0xE1890093; // msr cpsr_cf, r3
+    *(vu32*)0x022004A4 = 0xE1C90090; // msr spsr_cf, r0
 
     // f_open(&gFile, "/gba-niccc.gba", FA_OPEN_EXISTING | FA_READ);
-    // UINT br;
     // f_read(&gFile, (void*)0x02200000, f_size(&gFile), &br);
-    // f_close(&gFile);
     // *(vu32*)0x022000EC = 0xE1890090; // msr cpsr_cf, r0
     // *(vu32*)0x022000F8 = 0xE1890090; // msr cpsr_cf, r0
     // *(vu32*)0x027A426C = 0xE1E00092; // mrs r2, spsr
@@ -191,9 +206,7 @@ static void loadGbaRom()
     // *(vu32*)0x027A42B0 = 0xE1C90092; // msr spsr_cf, r2
 
     // f_open(&gFile, "/varooom-3d_bad_audio.gba", FA_OPEN_EXISTING | FA_READ);
-    // UINT br;
     // f_read(&gFile, (void*)0x02200000, f_size(&gFile), &br);
-    // f_close(&gFile);
     // *(vu32*)0x022000EC = 0xE1890090; // msr cpsr_cf, r0
     // *(vu32*)0x022000F8 = 0xE1890090; // msr cpsr_cf, r0
     // *(vu32*)0x02467968 = 0xE1E00092; // mrs r2, spsr
@@ -204,9 +217,7 @@ static void loadGbaRom()
     // *(vu32*)0x024679AC = 0xE1C90092; // msr spsr_cf, r2
 
     // f_open(&gFile, "/dma_demo.gba", FA_OPEN_EXISTING | FA_READ);
-    // UINT br;
     // f_read(&gFile, (void*)0x02200000, f_size(&gFile), &br);
-    // f_close(&gFile);
     // *(vu32*)0x022000EC = 0xE1890090; // msr cpsr_cf, r0
     // *(vu32*)0x022000F8 = 0xE1890090; // msr cpsr_cf, r0
 }

code/core/arm9/source/vectors.s

@@ -8,7 +8,7 @@ vec_undef:
 vec_swi:
     b .
 vec_prefetchAbort:
-    b prefetchAbort
+    b memu_prefetchAbort
 vec_dataAbort:
     mrs r13, spsr
     // r13 = ???? ?000 0000 0000 0000 0000 00T1 0000
@@ -17,14 +17,3 @@ vec_irq:
     b .
 vec_fiq:
     b .
-
-prefetchAbort:
-    sub lr, lr, #4
-    sub lr, lr, #0x08000000
-    cmp lr, #0x02000000
-    bhs badPrefetchAbort
-    bic lr, lr, #0xFE000000
-    adds pc, lr, #0x02200000
-
-badPrefetchAbort:
-    b .