mirror of
https://github.com/ApacheThunder/omega-kernel-boot-to-nor.git
synced 2025-06-18 19:25:32 -04:00
fixed fire emblem
This commit is contained in:
ezflash
parent
4b08b37291
commit
d5684a76e9
@ -417,6 +417,16 @@ void IWRAM_CODE Set_RTC_status(u16 status)
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*(u16 *)0x9fc0000 = 0x1500;
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}
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// --------------------------------------------------------------------
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void IWRAM_CODE Set_AUTO_save(u16 mode)
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{
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*(u16 *)0x9fe0000 = 0xd200;
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*(u16 *)0x8000000 = 0x1500;
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*(u16 *)0x8020000 = 0xd200;
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*(u16 *)0x8040000 = 0x1500;
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*(u16 *)0x96C0000 = mode;
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*(u16 *)0x9fc0000 = 0x1500;
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}
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// --------------------------------------------------------------------
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void IWRAM_CODE Check_FW_update(u16 Current_FW_ver,u16 Built_in_ver)
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{
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@ -434,7 +444,8 @@ void IWRAM_CODE Check_FW_update(u16 Current_FW_ver,u16 Built_in_ver)
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//if( get_crc32 != 0x22475DDC) //fw3
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//if( get_crc32 != 0xEE2DACE7) //fw4
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if( get_crc32 != 0x5B6B5129) //fw5
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//if( get_crc32 != 0x5B6B5129) //fw5
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if( get_crc32 != 0x7E6212AB) //fw6
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{
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sprintf(msg,"check crc32 error!");
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DrawHZText12(msg,0,2,offset_Y+0*line_x, RGB(31,00,00),1);
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90
source/Fire_Emblem_0378_patch.s
Normal file
90
source/Fire_Emblem_0378_patch.s
Normal file
@ -0,0 +1,90 @@
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@;--------------------------------------------------------------------
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.section .text,"ax",%progbits
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.global Fire_Emblem_0378_patch_start
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.global Fire_Emblem_0378_patch_end
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@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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.thumb
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Fire_Emblem_0378_patch_start:
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MOV R9, R4
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POP {R4-R7}
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POP {R0}
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PUSH {R0-R5}
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LDR R1, =0x80987AF
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CMP R1, R0
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BNE exit
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Set:
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BL Set_save
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exit:
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POP {R0-R5}
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BX R0
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@;----------------------------------
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MOV R9, R4
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POP {R4-R6}
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POP {R0}
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PUSH {R0-R5}
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LDR R1, =0x808847D
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CMP R1, R0
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BNE exit
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B Set
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@;----------------------------------
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POP {R4,R5}
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POP {R0}
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PUSH {R0-R5}
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LDR R1, =0x8088551
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CMP R1, R0
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BNE exit
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B Set
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@;----------------------------------
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PUSH {R0-R5}
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BNE exit2
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BL Set_save
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exit2:
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POP {R0-R5}
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MOV R8, R3
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POP {R4-R7}
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POP {R0}
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BX R0
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@;----------------------------------
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PUSH {R0-R3}
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BL Set_save
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POP {R0-R3}
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POP {R4-R7}
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POP {R0}
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BX R0
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@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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Set_save:
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PUSH {R1-R7,LR}
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MOV R0,#0x02
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BL Set_AUTO_save
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MOV R0,#0x00
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BL Set_AUTO_save
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POP {R1-R7}
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POP {R0}
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BX R0
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@;----------------------------------
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Set_AUTO_save:
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LDR R2, =0xFFFFD200
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LDR R3, =0x9FE0000
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MOVS R1, #0x80
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STRH R2, [R3]
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MOVS R3, #0xA8
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LSL R1, R1, #0x14
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LSL R3, R3, #5
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STRH R3, [R1]
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LDR R1, =0x8020000
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STRH R2, [R1]
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LDR R2, =0x8040000
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STRH R3, [R2]
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LDR R2, =0x96C0000
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STRH R0, [R2]
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LDR R2, =0x9FC0000
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STRH R3, [R2]
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BX LR
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.ltorg
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.align
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Fire_Emblem_0378_patch_end:
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.end
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88
source/Fire_Emblem_1692_patch.s
Normal file
88
source/Fire_Emblem_1692_patch.s
Normal file
@ -0,0 +1,88 @@
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@;--------------------------------------------------------------------
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.section .text,"ax",%progbits
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.global Fire_Emblem_1692_patch_start
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.global Fire_Emblem_1692_patch_end
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@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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.thumb
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Fire_Emblem_1692_patch_start:
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PUSH {R0-R4}
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BL Set_save
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POP {R0-R4}
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POP {R4,R5}
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POP {R0}
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BX R0
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@;----------------------------------
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PUSH {R0-R4}
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BL Set_save
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POP {R0-R4}
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POP {R4-R6}
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POP {R0}
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BX R0
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@;----------------------------------
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PUSH {R0-R4}
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BL Set_save
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POP {R0-R4}
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MOV R9, R4
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POP {R4-R7}
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POP {R0}
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BX R0
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@;----------------------------------
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PUSH {R0-R4}
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BL Set_save
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POP {R0-R4}
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MOV R10, R5
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POP {R4-R7}
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POP {R0}
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BX R0
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@;----------------------------------
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MOV R10, R5
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POP {R4-R7}
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POP {R0}
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PUSH {R0}
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PUSH {R1-R5}
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LDR R1, =0x80BA8EF
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CMP R0, R1
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BNE exit
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BL Set_save
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exit:
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POP {R1-R5}
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POP {R0}
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BX R0
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@;----------------------------------
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@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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Set_save:
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PUSH {R1-R7,LR}
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MOV R0,#0x02
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BL Set_AUTO_save
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MOV R0,#0x00
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BL Set_AUTO_save
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POP {R1-R7}
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POP {R0}
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BX R0
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@;----------------------------------
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Set_AUTO_save:
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LDR R2, =0xFFFFD200
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LDR R3, =0x9FE0000
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MOVS R1, #0x80
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STRH R2, [R3]
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MOVS R3, #0xA8
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LSL R1, R1, #0x14
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LSL R3, R3, #5
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STRH R3, [R1]
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LDR R1, =0x8020000
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STRH R2, [R1]
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LDR R2, =0x8040000
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STRH R3, [R2]
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LDR R2, =0x96C0000
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STRH R0, [R2]
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LDR R2, =0x9FC0000
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STRH R3, [R2]
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BX LR
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.ltorg
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.align
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Fire_Emblem_1692_patch_end:
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.end
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87
source/Fire_Emblem_A_patch.s
Normal file
87
source/Fire_Emblem_A_patch.s
Normal file
@ -0,0 +1,87 @@
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@;--------------------------------------------------------------------
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.section .text,"ax",%progbits
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.global Fire_Emblem_A_patch_start
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.global Fire_Emblem_A_patch_end
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.global Modify_address_A
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@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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.thumb
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Fire_Emblem_A_patch_start:
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PUSH {R0-R4}
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BL Set_save
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POP {R0-R4}
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POP {R4,R5}
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POP {R0}
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BX R0
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@;----------------------------------
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PUSH {R0-R4}
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BL Set_save
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POP {R0-R4}
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POP {R4-R6}
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POP {R0}
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BX R0
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@;----------------------------------
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PUSH {R0-R4}
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BL Set_save
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POP {R0-R4}
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MOV R8, R3
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POP {R4-R7}
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POP {R0}
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BX R0
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@;----------------------------------
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MOV R10, R5
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POP {R4-R7}
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POP {R0}
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PUSH {R0}
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PUSH {R1-R5}
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LDR R1, =0x80B2F8B
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CMP R0, R1
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BNE exit
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BL Set_save
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exit:
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POP {R1-R5}
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POP {R0}
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BX R0
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@;----------------------------------
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@; PUSH {R0-R5}
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@; BL Set_save
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@; POP {R0-R5}
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@; MOV R10, R5
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@; POP {R4-R7}
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@; POP {R0}
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@; BX R0
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@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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Set_save:
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PUSH {R1-R7,LR}
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MOV R0,#0x02
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BL Set_AUTO_save
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MOV R0,#0x00
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BL Set_AUTO_save
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POP {R1-R7}
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POP {R0}
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BX R0
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@;----------------------------------
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Set_AUTO_save:
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LDR R2, =0xFFFFD200
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LDR R3, =0x9FE0000
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MOVS R1, #0x80
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STRH R2, [R3]
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MOVS R3, #0xA8
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LSL R1, R1, #0x14
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LSL R3, R3, #5
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STRH R3, [R1]
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LDR R1, =0x8020000
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STRH R2, [R1]
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LDR R2, =0x8040000
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STRH R3, [R2]
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LDR R2, =0x96C0000
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STRH R0, [R2]
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LDR R2, =0x9FC0000
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STRH R3, [R2]
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BX LR
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Modify_address_A:
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.ltorg
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.align
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Fire_Emblem_A_patch_end:
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.end
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80
source/Fire_Emblem_B_patch.s
Normal file
80
source/Fire_Emblem_B_patch.s
Normal file
@ -0,0 +1,80 @@
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@;--------------------------------------------------------------------
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.section .text,"ax",%progbits
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.global Fire_Emblem_B_patch_start
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.global Fire_Emblem_B_patch_end
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.global Modify_address_B
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@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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.thumb
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Fire_Emblem_B_patch_start:
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PUSH {R0-R4}
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BL Set_save
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POP {R0-R4}
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POP {R4,R5}
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POP {R0}
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BX R0
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@;----------------------------------
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PUSH {R0-R4}
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BL Set_save
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POP {R0-R4}
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POP {R4-R6}
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POP {R0}
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BX R0
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@;----------------------------------
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PUSH {R0-R4}
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BL Set_save
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POP {R0-R4}
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MOV R10, R5
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POP {R4-R7}
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POP {R0}
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BX R0
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@;----------------------------------
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MOV R10, R5
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POP {R4-R7}
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POP {R0}
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PUSH {R0}
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PUSH {R1-R5}
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LDR R1, =0x80B5D6B
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CMP R0, R1
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BNE exit
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BL Set_save
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exit:
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POP {R1-R5}
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POP {R0}
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BX R0
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@;----------------------------------
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@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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Set_save:
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PUSH {R1-R7,LR}
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MOV R0,#0x02
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BL Set_AUTO_save
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MOV R0,#0x00
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BL Set_AUTO_save
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POP {R1-R7}
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POP {R0}
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BX R0
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@;----------------------------------
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Set_AUTO_save:
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LDR R2, =0xFFFFD200
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LDR R3, =0x9FE0000
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MOVS R1, #0x80
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STRH R2, [R3]
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MOVS R3, #0xA8
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LSL R1, R1, #0x14
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LSL R3, R3, #5
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STRH R3, [R1]
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LDR R1, =0x8020000
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STRH R2, [R1]
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LDR R2, =0x8040000
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STRH R3, [R2]
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LDR R2, =0x96C0000
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STRH R0, [R2]
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LDR R2, =0x9FC0000
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STRH R3, [R2]
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BX LR
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Modify_address_B:
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.ltorg
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.align
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Fire_Emblem_B_patch_end:
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.end
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@ -492,6 +492,50 @@ void Patch_RTS_Cheat(u32 *Data)
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Write(iTrimSize, patchbuffer,copysize);
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}
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//------------------------------------------------------------------
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void Patch_RTS_only(u32 *Data)
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{
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Patch_B_address();
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u32 Return_address = 0x8000000+ EA_offset*4 + 8;
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u8 * p_patch_start = (u8*)RTS_only_ReplaceIRQ_start;
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u8 * p_patch_end = (u8*)RTS_only_ReplaceIRQ_end;
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u8 * p_patch_Return_address_L = (u8*)RTS_only_Return_address_L;
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u8* patchbuffer = (u8*)_UnusedVram ;
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u32 Return_address_offset = p_patch_Return_address_L-p_patch_start;
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dmaCopy((void*)p_patch_start,patchbuffer, p_patch_end-p_patch_start);
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*(vu32*)(patchbuffer+Return_address_offset) = Return_address;//modify gba_sleep_patch_bin return address
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if(spend_address != 0x0){
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*(vu32*)(patchbuffer+Return_address_offset+4) = spend_address;
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}
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u16 read5 = Read_SET_info(5);
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u16 read6 = Read_SET_info(6);
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u16 read7 = Read_SET_info(7);
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u16 read8 = Read_SET_info(8);
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u16 read9 = Read_SET_info(9);
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u16 read10 = Read_SET_info(10);
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u16 RTS_only_SAVE_key_val = ~((1<< read5) | (1<< read6) | (1<< read7));
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u16 RTS_only_LOAD_key_val = ~((1<< read8) | (1<< read9) | (1<< read10));
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u32 RTS_only_SAVE_key_offset = (u8*)RTS_only_SAVE_key - p_patch_start;
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u32 RTS_only_LOAD_key_offset = (u8*)RTS_only_LOAD_key - p_patch_start;
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*(vu32*)(patchbuffer+RTS_only_SAVE_key_offset) = RTS_only_SAVE_key_val&0x3FF;
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*(vu32*)(patchbuffer+RTS_only_LOAD_key_offset) = RTS_only_LOAD_key_val&0x3FF;
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u32 copysize = p_patch_end - p_patch_start ;
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if( iTrimSize+copysize > 0x2000000){
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copysize = 0x2000000 - iTrimSize; //????
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}
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//DEBUG_printf("iTrimSize =%x %x", iTrimSize,copysize);
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Write(iTrimSize, patchbuffer,copysize);
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}
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//------------------------------------------------------------------
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void GBApatch_Cleanrom(u32* address,int filesize)//Only once
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{
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windows_offset = 0;
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@ -499,6 +543,7 @@ void GBApatch_Cleanrom(u32* address,int filesize)//Only once
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CheckNes(address);
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PatchNes(address);
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PatchDragonBallZ(address);
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Check_Fire_Emblem();
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}
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//------------------------------------------------------------------
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u32 Get_spend_address(u32* Data)
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@ -550,13 +595,18 @@ void GBApatch_PSRAM(u32* address,int filesize)//Only once
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CheckNes(address);
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PatchNes(address);
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PatchDragonBallZ(address);
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if((gl_rts_on==1) || ((gl_cheat_on==1)&& (gl_cheat_count>0) ) )
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Check_Fire_Emblem();
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if( (gl_rts_on==1) && (gl_cheat_on == 0) && (gl_reset_on == 0) && (gl_sleep_on == 0) ) {
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spend_address = Get_spend_address(address);
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Patch_RTS_only(address);
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}
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else if((gl_rts_on==1) || ((gl_cheat_on==1)&& (gl_cheat_count>0) ) )
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{
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spend_address = Get_spend_address(address);
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//DEBUG_printf("spend_address =%x",spend_address);
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Patch_RTS_Cheat(address);
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}
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}
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else
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{
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Patch_Reset_Sleep(address);
|
||||
@ -573,6 +623,7 @@ void GBApatch_Cleanrom_NOR(u32* address,u32 offset)
|
||||
}
|
||||
PatchNes(address);
|
||||
PatchDragonBallZ(address);
|
||||
Check_Fire_Emblem();
|
||||
}
|
||||
//------------------------------------------------------------------
|
||||
void GBApatch_NOR(u32* address,int filesize,u32 offset)
|
||||
@ -591,11 +642,15 @@ void GBApatch_NOR(u32* address,int filesize,u32 offset)
|
||||
}
|
||||
PatchNes(address);
|
||||
PatchDragonBallZ(address);
|
||||
|
||||
if((gl_rts_on==1) || ((gl_cheat_on==1)&& (gl_cheat_count>0) ) )
|
||||
Check_Fire_Emblem();
|
||||
|
||||
if( (gl_rts_on==1) && (gl_cheat_on == 0) && (gl_reset_on == 0) && (gl_sleep_on == 0) ) {
|
||||
Patch_RTS_only(address);
|
||||
}
|
||||
else if((gl_rts_on==1) || ((gl_cheat_on==1)&& (gl_cheat_count>0) ) )
|
||||
{
|
||||
Patch_RTS_Cheat(address);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
Patch_Reset_Sleep(address);
|
||||
@ -1130,4 +1185,196 @@ void Patch_SpecialROM_TrimSize(void)
|
||||
iTrimSize = 0x738000;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
//------------------------------------------------------------------
|
||||
void Check_Fire_Emblem(void)
|
||||
{
|
||||
u32 code1 = 0x47004800;
|
||||
u32 address1[5];
|
||||
u32 code2[5];
|
||||
u32 patchaddress;
|
||||
u32 Baseaddress=0x08000000;
|
||||
u8* patchbuffer = (u8*)_UnusedVram ;
|
||||
u8 * p_patch_start;
|
||||
u8 * p_patch_end;
|
||||
u8 * p_modify_address;
|
||||
u32 modify_val=0;
|
||||
|
||||
u8 have=0;
|
||||
|
||||
memset(address1,0x00,sizeof(address1));
|
||||
switch(*(u32*)GAMECODE)
|
||||
{
|
||||
case 0x4A454641://0378 - Fire Emblem - Fuuin no Tsurugi(JP)
|
||||
{
|
||||
address1[0]=0x858B0;
|
||||
address1[1]=0x85048;
|
||||
address1[2]=0x84FF0;
|
||||
address1[3]=0x85194;
|
||||
address1[4]=0x850F8;
|
||||
patchaddress=0x7FF100;
|
||||
code2[0]=Baseaddress+patchaddress+0x1;
|
||||
code2[1]=Baseaddress+patchaddress+0x17;
|
||||
code2[2]=Baseaddress+patchaddress+0x27;
|
||||
code2[3]=Baseaddress+patchaddress+0x35;
|
||||
code2[4]=Baseaddress+patchaddress+0x47;
|
||||
p_patch_start = (u8*)Fire_Emblem_0378_patch_start;
|
||||
p_patch_end = (u8*)Fire_Emblem_0378_patch_end;
|
||||
have = 1;
|
||||
}break;
|
||||
case 0x4A384542://1692 - Fire Emblem - Seima no Kouseki(JP)
|
||||
{
|
||||
address1[0]=0xA9844;
|
||||
address1[1]=0xA989C;
|
||||
address1[2]=0xA99F8;
|
||||
address1[3]=0xA9B14;
|
||||
address1[4]=0xAA5D0;
|
||||
patchaddress=0xF00000;
|
||||
code2[0]=Baseaddress+patchaddress+0x1;
|
||||
code2[1]=Baseaddress+patchaddress+0xF;
|
||||
code2[2]=Baseaddress+patchaddress+0x1D;
|
||||
code2[3]=Baseaddress+patchaddress+0x2D;
|
||||
code2[4]=Baseaddress+patchaddress+0x3D;
|
||||
p_patch_start = (u8*)Fire_Emblem_1692_patch_start;
|
||||
p_patch_end = (u8*)Fire_Emblem_1692_patch_end;
|
||||
have = 1;
|
||||
}break;
|
||||
case 0x4A374541://0979 - Fire Emblem - Rekka no Ken(JP)
|
||||
{
|
||||
address1[0]=0xA0FE0;
|
||||
address1[1]=0xA1038;
|
||||
address1[2]=0xA1178;
|
||||
address1[3]=0xA1264;
|
||||
address1[4]=0xA1BA8;
|
||||
patchaddress=0xFFF900;
|
||||
code2[0]=Baseaddress+patchaddress+0x1;
|
||||
code2[1]=Baseaddress+patchaddress+0xF;
|
||||
code2[2]=Baseaddress+patchaddress+0x1D;
|
||||
code2[3]=Baseaddress+patchaddress+0x1D;
|
||||
code2[4]=Baseaddress+patchaddress+0x2D;
|
||||
p_patch_start = (u8*)Fire_Emblem_A_patch_start;
|
||||
p_patch_end = (u8*)Fire_Emblem_A_patch_end;
|
||||
p_modify_address = (u8*)Modify_address_A;
|
||||
modify_val = 0x80B3DAF;
|
||||
have = 1;
|
||||
}break;
|
||||
case 0x45374541://1235 - Fire Emblem(US)
|
||||
{
|
||||
address1[0]=0xA0654;
|
||||
address1[1]=0xA06AC;
|
||||
address1[2]=0xA07EC;
|
||||
address1[3]=0xA08D8;
|
||||
address1[4]=0xA1214;
|
||||
patchaddress=0xFFF900;
|
||||
code2[0]=Baseaddress+patchaddress+0x1;
|
||||
code2[1]=Baseaddress+patchaddress+0xF;
|
||||
code2[2]=Baseaddress+patchaddress+0x1D;
|
||||
code2[3]=Baseaddress+patchaddress+0x1D;
|
||||
code2[4]=Baseaddress+patchaddress+0x2D;
|
||||
p_patch_start = (u8*)Fire_Emblem_A_patch_start;
|
||||
p_patch_end = (u8*)Fire_Emblem_A_patch_end;
|
||||
p_modify_address = (u8*)Modify_address_A;
|
||||
modify_val = 0x80B2F8B;
|
||||
have = 1;
|
||||
}break;
|
||||
case 0x58374541://1574 - Fire Emblem(EU)
|
||||
{
|
||||
address1[0]=0xA09C8;
|
||||
address1[1]=0xA0A20;
|
||||
address1[2]=0xA0B60;
|
||||
address1[3]=0xA0C4C;
|
||||
address1[4]=0xA1560;
|
||||
patchaddress=0xFFF900;
|
||||
code2[0]=Baseaddress+patchaddress+0x1;
|
||||
code2[1]=Baseaddress+patchaddress+0xF;
|
||||
code2[2]=Baseaddress+patchaddress+0x1D;
|
||||
code2[3]=Baseaddress+patchaddress+0x1D;
|
||||
code2[4]=Baseaddress+patchaddress+0x2D;
|
||||
p_patch_start = (u8*)Fire_Emblem_A_patch_start;
|
||||
p_patch_end = (u8*)Fire_Emblem_A_patch_end;
|
||||
p_modify_address = (u8*)Modify_address_A;
|
||||
modify_val = 0x80B3A57;
|
||||
have = 1;
|
||||
}break;
|
||||
case 0x59374541://1575 - Fire Emblem(EU)
|
||||
{
|
||||
address1[0]=0xA09CC;
|
||||
address1[1]=0xA0A24;
|
||||
address1[2]=0xA0B64;
|
||||
address1[3]=0xA0C50;
|
||||
address1[4]=0xA1564;
|
||||
patchaddress=0xFFF900;
|
||||
code2[0]=Baseaddress+patchaddress+0x1;
|
||||
code2[1]=Baseaddress+patchaddress+0xF;
|
||||
code2[2]=Baseaddress+patchaddress+0x1D;
|
||||
code2[3]=Baseaddress+patchaddress+0x1D;
|
||||
code2[4]=Baseaddress+patchaddress+0x2D;
|
||||
p_patch_start = (u8*)Fire_Emblem_A_patch_start;
|
||||
p_patch_end = (u8*)Fire_Emblem_A_patch_end;
|
||||
p_modify_address = (u8*)Modify_address_A;
|
||||
modify_val = 0x80B3A3B;
|
||||
have = 1;
|
||||
}break;
|
||||
case 0x45384542://1997 - Fire Emblem - The Sacred Stones(US)
|
||||
{
|
||||
address1[0]=0xA4E00;
|
||||
address1[1]=0xA4E58;
|
||||
address1[2]=0xA4FDC;
|
||||
address1[3]=0xA50FC;
|
||||
address1[4]=0xA5BB8;
|
||||
patchaddress=0xFFF900;
|
||||
code2[0]=Baseaddress+patchaddress+0x1;
|
||||
code2[1]=Baseaddress+patchaddress+0xF;
|
||||
code2[2]=Baseaddress+patchaddress+0x1D;
|
||||
code2[3]=Baseaddress+patchaddress+0x1D;
|
||||
code2[4]=Baseaddress+patchaddress+0x2D;
|
||||
p_patch_start = (u8*)Fire_Emblem_B_patch_start;
|
||||
p_patch_end = (u8*)Fire_Emblem_B_patch_end;
|
||||
p_modify_address = (u8*)Modify_address_B;
|
||||
modify_val = 0x80B5D6B;
|
||||
have = 1;
|
||||
}break;
|
||||
case 0x50384542://2215 - Fire Emblem - The Sacred Stones(EU)
|
||||
{
|
||||
address1[0]=0xA5738;
|
||||
address1[1]=0xA5790;
|
||||
address1[2]=0xA5914;
|
||||
address1[3]=0xA5A34;
|
||||
address1[4]=0xA64F0;
|
||||
patchaddress=0x1FFDD00;
|
||||
code2[0]=Baseaddress+patchaddress+0x1;
|
||||
code2[1]=Baseaddress+patchaddress+0xF;
|
||||
code2[2]=Baseaddress+patchaddress+0x1D;
|
||||
code2[3]=Baseaddress+patchaddress+0x1D;
|
||||
code2[4]=Baseaddress+patchaddress+0x2D;
|
||||
p_patch_start = (u8*)Fire_Emblem_B_patch_start;
|
||||
p_patch_end = (u8*)Fire_Emblem_B_patch_end;
|
||||
p_modify_address = (u8*)Modify_address_B;
|
||||
modify_val = 0x80B670F;
|
||||
have = 1;
|
||||
}break;
|
||||
}
|
||||
|
||||
if(have){
|
||||
for(u32 i=0;i<5;i++)
|
||||
{
|
||||
if(address1[i] != 0){
|
||||
Write(address1[i],(u8*)&code1 , 4);
|
||||
Write(address1[i]+4,(u8*)&code2[i],4);
|
||||
}
|
||||
}
|
||||
|
||||
u32 copysize = p_patch_end - p_patch_start ;
|
||||
dmaCopy((void*)p_patch_start,patchbuffer, copysize);
|
||||
if( modify_val)
|
||||
{
|
||||
u32 p_modify_address_offset = p_modify_address-p_patch_start;
|
||||
*(vu32*)(patchbuffer+p_modify_address_offset) = modify_val;
|
||||
}
|
||||
Write(patchaddress, patchbuffer,copysize);
|
||||
Set_AUTO_save(0x00);
|
||||
}
|
||||
else{
|
||||
Set_AUTO_save(0x01);
|
||||
}
|
||||
}
|
||||
@ -33,6 +33,24 @@ extern void CHEAT(void);
|
||||
extern void no_CHEAT_end(void);
|
||||
|
||||
|
||||
extern void RTS_only_ReplaceIRQ_start(void);
|
||||
extern void RTS_only_ReplaceIRQ_end(void);
|
||||
extern void RTS_only_Return_address_L(void);
|
||||
extern void RTS_only_SAVE_key(void);
|
||||
extern void RTS_only_LOAD_key(void);
|
||||
|
||||
|
||||
extern void Fire_Emblem_0378_patch_start(void);
|
||||
extern void Fire_Emblem_0378_patch_end(void);
|
||||
extern void Fire_Emblem_1692_patch_start(void);
|
||||
extern void Fire_Emblem_1692_patch_end(void);
|
||||
extern void Fire_Emblem_A_patch_start(void);
|
||||
extern void Fire_Emblem_A_patch_end(void);
|
||||
extern void Modify_address_A(void);
|
||||
extern void Fire_Emblem_B_patch_start(void);
|
||||
extern void Fire_Emblem_B_patch_end(void);
|
||||
extern void Modify_address_B(void);
|
||||
|
||||
extern u32 gl_cheat_count;
|
||||
|
||||
|
||||
|
||||
12886
source/Newest_FW_ver.h
12886
source/Newest_FW_ver.h
File diff suppressed because it is too large
Load Diff
@ -1559,7 +1559,7 @@ int main(void) {
|
||||
Set_RTC_status(1);
|
||||
|
||||
//check FW
|
||||
u16 Built_in_ver = 5; //Newest_FW_ver
|
||||
u16 Built_in_ver = 6; //Newest_FW_ver
|
||||
u16 Current_FW_ver = Read_FPGA_ver();
|
||||
|
||||
if((Current_FW_ver < Built_in_ver) || (Current_FW_ver == 99))//99 is test ver
|
||||
|
||||
540
source/gba_rts_only.s
Normal file
540
source/gba_rts_only.s
Normal file
@ -0,0 +1,540 @@
|
||||
@;--------------------------------------------------------------------
|
||||
.section .iwram,"ax",%progbits
|
||||
|
||||
.global RTS_only_ReplaceIRQ_start
|
||||
.global RTS_only_ReplaceIRQ_end
|
||||
.global RTS_only_Return_address_L
|
||||
.global RTS_only_SAVE_key
|
||||
.global RTS_only_LOAD_key
|
||||
|
||||
|
||||
|
||||
REG_BASE = 0x4000000
|
||||
REG_DISPCNT = 0x00
|
||||
REG_DISPSTAT = 0x04
|
||||
REG_VCOUNT = 0x06
|
||||
REG_BG0CNT = 0x08
|
||||
REG_BG1CNT = 0x0A
|
||||
REG_BG2CNT = 0x0C
|
||||
REG_BG3CNT = 0x0E
|
||||
REG_BG0HOFS = 0x10
|
||||
REG_BG0VOFS = 0x12
|
||||
REG_BG1HOFS = 0x14
|
||||
REG_BG1VOFS = 0x16
|
||||
REG_BG2HOFS = 0x18
|
||||
REG_BG2VOFS = 0x1A
|
||||
REG_BG3HOFS = 0x1C
|
||||
REG_BG3VOFS = 0x1E
|
||||
REG_WIN0H = 0x40
|
||||
REG_WIN1H = 0x42
|
||||
REG_WIN0V = 0x44
|
||||
REG_WIN1V = 0x46
|
||||
REG_WININ = 0x48
|
||||
REG_WINOUT = 0x4A
|
||||
REG_BLDCNT = 0x50
|
||||
REG_BLDALPHA = 0x52
|
||||
REG_BLDY = 0x54
|
||||
REG_SOUND1CNT_L = 0x60
|
||||
REG_SOUND1CNT_H = 0x62
|
||||
REG_SOUND1CNT_X = 0x64
|
||||
REG_SOUND2CNT_L = 0x68
|
||||
REG_SOUND2CNT_H = 0x6C
|
||||
REG_SOUND3CNT_L = 0x70
|
||||
REG_SOUND3CNT_H = 0x72
|
||||
REG_SOUND3CNT_X = 0x74
|
||||
REG_SOUND4CNT_L = 0x78
|
||||
REG_SOUND4CNT_H = 0x7c
|
||||
REG_SOUNDCNT_L = 0x80
|
||||
REG_SOUND2CNT_H = 0x82
|
||||
REG_SOUNDCNT_X = 0x84
|
||||
REG_SOUNDBIAS = 0x88
|
||||
REG_WAVE_RAM0_L = 0x90
|
||||
REG_FIFO_A_L = 0xA0
|
||||
REG_FIFO_A_H = 0xA2
|
||||
REG_FIFO_B_L = 0xA4
|
||||
REG_FIFO_B_H = 0xA6
|
||||
REG_DM0SAD = 0xB0
|
||||
REG_DM0DAD = 0xB4
|
||||
REG_DM0CNT_L = 0xB8
|
||||
REG_DM0CNT_H = 0xBA
|
||||
REG_DM1SAD = 0xBC
|
||||
REG_DM1DAD = 0xC0
|
||||
REG_DM1CNT_L = 0xC4
|
||||
REG_DM1CNT_H = 0xC6
|
||||
REG_DM2SAD = 0xC8
|
||||
REG_DM2DAD = 0xCC
|
||||
REG_DM2CNT_L = 0xD0
|
||||
REG_DM2CNT_H = 0xD2
|
||||
REG_DM3SAD = 0xD4
|
||||
REG_DM3DAD = 0xD8
|
||||
REG_DM3CNT_L = 0xDC
|
||||
REG_DM3CNT_H = 0xDE
|
||||
REG_TM0D = 0x100
|
||||
REG_TM0CNT = 0x102
|
||||
REG_IE = 0x200
|
||||
REG_IF = 0x202
|
||||
REG_P1 = 0x130
|
||||
REG_P1CNT = 0x132
|
||||
REG_WAITCNT = 0x204
|
||||
|
||||
@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
.arm
|
||||
RTS_only_ReplaceIRQ_start:
|
||||
MOV R0, #0x4000000
|
||||
ADR R1, RTS_irq
|
||||
STR R1, [R0,#-4] @; 0x3FFFFFC = RTS_irq;
|
||||
LDR R0, =0x12345678
|
||||
BX R0
|
||||
.align
|
||||
RTS_only_Return_address_L:
|
||||
.ltorg @;return address need modify
|
||||
@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
spend_0x80:
|
||||
.word 0x0203FE00 @; default
|
||||
@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
RTS_irq:
|
||||
LDR R1, [R0,#0x200]
|
||||
TST R1, #0x10000
|
||||
TSTEQ R1, #0x10000000
|
||||
LDREQ PC, [R0,#-0xC] @;old_interrupt_handler
|
||||
|
||||
ldr r2,[r0,#REG_P1]
|
||||
bic r2,r2,#0xFF000000
|
||||
bic r2,r2,#0x00FF0000
|
||||
|
||||
check_save:
|
||||
adr r3,RTS_only_SAVE_key
|
||||
ldr r3,[r3]
|
||||
cmp r2,r3
|
||||
beq call_Save
|
||||
check_load:
|
||||
adr r3,RTS_only_LOAD_key
|
||||
ldr r3,[r3]
|
||||
cmp r2,r3
|
||||
beq call_Load
|
||||
ldr pc,[r0,#-(0x04000000-0x03FFFFF4)] @;to normal IRQ routine
|
||||
@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
RTS_only_SAVE_key:
|
||||
.word 0xFB @;L+R+select
|
||||
RTS_only_LOAD_key:
|
||||
.word 0xF7 @;L+R+Start
|
||||
@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
.arm
|
||||
@;------------------------------------------------------
|
||||
SetRampage:
|
||||
ldr r1,=0xD200
|
||||
ldr r2,=0x1500
|
||||
ldr r3,=0x9fe0000
|
||||
strh r1,[r3]
|
||||
mov r3,#0x8000000
|
||||
strh r2,[r3]
|
||||
ldr r3,=0x8020000
|
||||
strh r1,[r3]
|
||||
ldr r3,=0x8040000
|
||||
strh r2,[r3]
|
||||
ldr r3,=0x9C00000
|
||||
strh r0,[r3]
|
||||
ldr r3,=0x9FC0000
|
||||
strh r2,[r3]
|
||||
bx lr
|
||||
@;------------------------------------------------------
|
||||
WriteSram: @;(u32 address, u8 *data, u32 size)
|
||||
ADD R2,R2,R0
|
||||
SUB R1,R1,R0
|
||||
wSram_loop1:
|
||||
CMP R0, R2
|
||||
BNE wSram_loop
|
||||
BX LR
|
||||
wSram_loop:
|
||||
LDR R3, [R1,R0]
|
||||
STRB R3, [R0],#1
|
||||
LSR R3, R3, #0x8
|
||||
STRB R3, [R0],#1
|
||||
LSR R3, R3, #0x8
|
||||
STRB R3, [R0],#1
|
||||
LSR R3, R3, #0x8
|
||||
STRB R3, [R0],#1
|
||||
B wSram_loop1
|
||||
@;------------------------------------------------------
|
||||
ReadSram: @;(u32 address, u8 *data, u32 size)
|
||||
ADDS R2, R2, R0
|
||||
SUBS R1, R1, R0
|
||||
rSram_loop1:
|
||||
CMP R0, R2
|
||||
BNE rSram_loop
|
||||
BX LR
|
||||
rSram_loop:
|
||||
LDRB R3, [R0]
|
||||
LSL R4,R3,#0
|
||||
LDRB R3, [R0,#1]
|
||||
LSL R5,R3,#8
|
||||
ORR R4,R5
|
||||
LDRB R3, [R0,#2]
|
||||
LSL R5,R3,#16
|
||||
ORR R4,R5
|
||||
LDRB R3, [R0,#3]
|
||||
LSL R5,R3,#24
|
||||
ORR R4,R5
|
||||
STR R4, [R1,R0]
|
||||
ADDS R0, #4
|
||||
B rSram_loop1
|
||||
@;------------------------------------------------------
|
||||
@;------------------------------------------------------
|
||||
restore2_IO: @; IOaddress, offset
|
||||
LDRB R3, [R1]
|
||||
LSL R4,R3,#0
|
||||
LDRB R3, [R1,#1]
|
||||
LSL R5,R3,#8
|
||||
ORR R4,R5
|
||||
STRH R4, [R0]
|
||||
bx lr
|
||||
.ltorg
|
||||
@;------------------------------------------------------
|
||||
@;------------------------------------------------------
|
||||
call_Save:
|
||||
@;adrl r7,RTS_switch
|
||||
@;ldr r7,[r7]
|
||||
@;cmp r7,#1
|
||||
@;bne errorRTS
|
||||
adrl r2, spend_0x80
|
||||
ldr r2,[r2]
|
||||
stmia r2!,{r4-r11,sp,lr} @;0x0
|
||||
mrs r3,SPSR
|
||||
stmia r2!,{r3} @;0x28
|
||||
|
||||
stmfd sp!,{r0-r10,lr}
|
||||
bl BAK_
|
||||
|
||||
@;02000000-0203FFFF WRAM - On-board Work RAM (256 KBytes)
|
||||
mov r8,#0x40 @; 0x40 0x50 0x60 0x70
|
||||
mov r9,#0x2000000
|
||||
wram_2000000:
|
||||
mov r0,r8
|
||||
bl SetRampage
|
||||
mov r0,#0x0E000000
|
||||
mov r1,r9
|
||||
mov r2,#0x10000
|
||||
bl WriteSram
|
||||
add r8,#0x10
|
||||
add r9,#0x10000
|
||||
cmp r8,#0x80
|
||||
bne wram_2000000
|
||||
|
||||
@;03000000-03007FFF WRAM - On-chip Work RAM (32 KBytes)
|
||||
mov r0,#0x80
|
||||
bl SetRampage
|
||||
mov r0,#0x0E000000
|
||||
mov r1,#0x3000000
|
||||
mov r2,#0x8000
|
||||
bl WriteSram
|
||||
|
||||
@;05000000-050003FF BG/OBJ Palette RAM (1 Kbyte)
|
||||
ldr r0,=0x0E008000
|
||||
mov r1,#0x5000000
|
||||
mov r2,#0x400
|
||||
bl WriteSram
|
||||
|
||||
mov r0,#0x90
|
||||
bl SetRampage
|
||||
mov r0,#0x0E000000
|
||||
mov r1,#0x6000000
|
||||
mov r2,#0x10000
|
||||
bl WriteSram
|
||||
|
||||
mov r0,#0xA0
|
||||
bl SetRampage
|
||||
mov r0,#0x0E000000
|
||||
ldr r1,=0x6010000
|
||||
mov r2,#0x8000
|
||||
bl WriteSram
|
||||
|
||||
@;07000000-070003FF OAM - OBJ Attributes (1 Kbyte)
|
||||
ldr r0,=0x0E008000
|
||||
mov r1,#0x7000000
|
||||
mov r2,#0x400
|
||||
bl WriteSram
|
||||
|
||||
@;R4-R11
|
||||
mrs r0,CPSR @;Back up
|
||||
adrl r7, spend_0x80
|
||||
ldr r7,[r7]
|
||||
add r7,#0x50 @;{r4-r11,sp,lr} SPSR 0x28+4
|
||||
|
||||
mov r1, #0xDF @; Switch to systme Mode
|
||||
msr cpsr_cf, r1
|
||||
NOP
|
||||
mov r6,sp
|
||||
stmia r7!,{r6,lr}
|
||||
|
||||
msr cpsr_cf,r0 ;@return IRQ mode
|
||||
NOP
|
||||
|
||||
ldr r0,=0x0E008400
|
||||
adrl r1, spend_0x80
|
||||
ldr r1,[r1]
|
||||
mov r2,#0x80
|
||||
bl WriteSram
|
||||
|
||||
@;04000000-040003FE I/O Registers
|
||||
ldr r0,=0x0E009000
|
||||
mov r1,#0x4000000
|
||||
mov r2,#0x210 @;#0x60 @;0x0-0x60
|
||||
bl WriteSram
|
||||
|
||||
@;FLAG
|
||||
ldr r0,=0x0E00FFF0
|
||||
adrl r1,S_RTS_FLAG
|
||||
mov r2,#0x10
|
||||
bl WriteSram
|
||||
|
||||
save_exit:
|
||||
mov r0,#0x0
|
||||
bl SetRampage
|
||||
|
||||
BL Restore_
|
||||
ldmfd sp!,{r0-r10,lr}
|
||||
@;mov r0,#0x04000000
|
||||
ldr pc,[r0,#-(0x04000000-0x03FFFFF4)] @;to normal IRQ routine
|
||||
@;===================================================
|
||||
BAK_:
|
||||
adrl R2, spend_0x80
|
||||
ldr R2,[R2]
|
||||
add R2,#0x30
|
||||
LDR R0, =0x4000200
|
||||
MOV R1, #0
|
||||
|
||||
LDRH R3, [R0,#8]
|
||||
STRH R3, [R2,#0]
|
||||
STRH R1, [R0,#8]@;v4000208 = 0;
|
||||
|
||||
LDR R0, =0x4000100
|
||||
LDRH R3, [R0,#2]
|
||||
STRH R3, [R2,#2]
|
||||
STRH R1, [R0,#2]@;v4000102 = 0;
|
||||
|
||||
LDRH R3, [R0,#6]
|
||||
STRH R3, [R2,#4]
|
||||
STRH R1, [R0,#6]@;v4000106 = 0;
|
||||
|
||||
LDRH R3, [R0,#0xA]
|
||||
STRH R3, [R2,#6]
|
||||
STRH R1, [R0,#0xA]@;v400010A = 0;
|
||||
|
||||
LDRH R3, [R0,#0xE]
|
||||
STRH R3, [R2,#8]
|
||||
STRH R1, [R0,#0xE]@;v400010E = 0;
|
||||
MOV PC, LR
|
||||
@;===================================================
|
||||
Restore_:
|
||||
adrl R3, spend_0x80
|
||||
ldr R3,[R3]
|
||||
add R3,#0x30
|
||||
|
||||
LDR R0, =0x4000100
|
||||
|
||||
LDRH R1, [R3,#2]
|
||||
STRH R1, [R0,#2]@;v4000102
|
||||
|
||||
LDRH R1, [R3,#4]
|
||||
STRH R1, [R0,#6]@;v4000106;
|
||||
|
||||
LDRH R1, [R3,#6]
|
||||
STRH R1, [R0,#0xA]@;v400010A;
|
||||
|
||||
LDRH R1, [R3,#8]
|
||||
STRH R1, [R0,#0xE]@;v400010E;
|
||||
|
||||
LDR R0, =0x4000200
|
||||
LDR R2, =0x0
|
||||
STRH R2, [R0,#0x2]@;v4000202;
|
||||
LDRH R1, [R3,#0]
|
||||
STRH R1, [R0,#0x8]@;v4000208; IME
|
||||
MOV PC, LR
|
||||
@;===================================================
|
||||
call_Load:
|
||||
@;check ;FLAG
|
||||
stmfd sp!,{r0-r3,lr}
|
||||
mov r0,#0xA0
|
||||
bl SetRampage
|
||||
ldr r0,=0x0E00FFF0
|
||||
adrl r1, spend_0x80 @;temp buff
|
||||
ldr r1,[r1]
|
||||
mov r2,#0x10
|
||||
bl ReadSram
|
||||
|
||||
adrl r1,S_RTS_FLAG
|
||||
adrl r2, spend_0x80 @;temp buff
|
||||
ldr r2,[r2]
|
||||
mov r3,#0
|
||||
loop_check:
|
||||
ldr r4,[r1],#4
|
||||
ldr r5,[r2],#4
|
||||
cmp r4,r5
|
||||
bne errorRTS
|
||||
add r3,#1
|
||||
cmp r3,#4
|
||||
bne loop_check
|
||||
b checkOK
|
||||
errorRTS:
|
||||
mov r0,#0x0
|
||||
bl SetRampage
|
||||
ldmfd sp!,{r0-r3,lr}
|
||||
ldr pc,[r0,#-(0x04000000-0x03FFFFF4)] @;to normal IRQ routine
|
||||
@;===================================================
|
||||
@;===================================================
|
||||
checkOK:
|
||||
ldr r0,=0x4000208 @;0x4000208
|
||||
mov r1,#0
|
||||
strh r1,[r0]
|
||||
|
||||
@;02000000-0203FFFF WRAM - On-board Work RAM (256 KBytes)
|
||||
mov r8,#0x40 @; 0x40 0x50 0x60 0x70
|
||||
mov r9,#0x2000000
|
||||
wram_2000000_Load:
|
||||
mov r0,r8
|
||||
bl SetRampage
|
||||
mov r0,#0x0E000000
|
||||
mov r1,r9
|
||||
mov r2,#0x10000
|
||||
bl ReadSram
|
||||
add r8,#0x10
|
||||
add r9,#0x10000
|
||||
cmp r8,#0x80
|
||||
bne wram_2000000_Load
|
||||
|
||||
@;03000000-03007FFF WRAM - On-chip Work RAM (32 KBytes)
|
||||
mov r0,#0x80
|
||||
bl SetRampage
|
||||
mov r0,#0x0E000000
|
||||
mov r1,#0x3000000
|
||||
mov r2,#0x8000
|
||||
bl ReadSram
|
||||
|
||||
@;05000000-050003FF BG/OBJ Palette RAM (1 Kbyte)
|
||||
ldr r0,=0x0E008000
|
||||
mov r1,#0x5000000
|
||||
mov r2,#0x400
|
||||
bl ReadSram
|
||||
|
||||
@;06000000-06017FFF VRAM - Video RAM (96 KBytes)
|
||||
mov r0,#0x90
|
||||
bl SetRampage
|
||||
mov r0,#0x0E000000
|
||||
mov r1,#0x6000000
|
||||
mov r2,#0x10000
|
||||
bl ReadSram
|
||||
mov r0,#0xA0
|
||||
bl SetRampage
|
||||
mov r0,#0x0E000000
|
||||
ldr r1,=0x6010000
|
||||
mov r2,#0x8000
|
||||
bl ReadSram
|
||||
|
||||
@;07000000-070003FF OAM - OBJ Attributes (1 Kbyte)
|
||||
ldr r0,=0x0E008000
|
||||
mov r1,#0x7000000
|
||||
mov r2,#0x400
|
||||
bl ReadSram
|
||||
|
||||
@;-------------------------------------
|
||||
mov r10,#0x4000000
|
||||
LDR r11,=0x0E009000
|
||||
|
||||
adr r9,register_list
|
||||
register_list_loop:
|
||||
ldrh r2,[r9],#2
|
||||
cmp r2 ,#0xFF00
|
||||
beq register_list_end
|
||||
|
||||
add r0,r10,r2 @;0x4000000 0x4000002 0x4000004
|
||||
add r1,r11,r2
|
||||
bl restore2_IO
|
||||
b register_list_loop
|
||||
register_list_end:
|
||||
|
||||
@;mov r10,#0x4000000
|
||||
@;LDR r11,=0x0E008500
|
||||
@; add r0,r10,#0xBA @;0x40000BA DMA
|
||||
@; add r1,r11,#0x32
|
||||
@; bl restore2_IO
|
||||
@;add r0,r10,#0xC6 @;0x40000C6
|
||||
@;add r1,r11,#0x34
|
||||
@;bl restore2_IO
|
||||
@; add r0,r10,#0xD2 @;0x40000D2
|
||||
@; add r1,r11,#0x36
|
||||
@; bl restore2_IO
|
||||
@; add r0,r10,#0xDE @;0x40000DE
|
||||
@; add r1,r11,#0x38
|
||||
@; bl restore2_IO
|
||||
|
||||
@;mov r4,#0x8F
|
||||
@;mov r7,#0x4000000
|
||||
@;strh r4,[r7,#REG_SOUNDCNT_X]
|
||||
|
||||
@;ldr r0,=0x4000202 @;0x4000202
|
||||
@;mov r1,#0
|
||||
@;strh r1,[r0]
|
||||
|
||||
ldr r0,=0x0E008400
|
||||
adrl r1, spend_0x80 @;temp buff
|
||||
ldr r1,[r1]
|
||||
mov r2,#0x80
|
||||
bl ReadSram
|
||||
|
||||
mrs r0,CPSR
|
||||
adrl r7, spend_0x80
|
||||
ldr r7,[r7]
|
||||
add r7,#0x28 @;SPSR offset
|
||||
|
||||
ldmia r7!,{r2} @;r7=0x2C
|
||||
msr SPSR_cxsf,r2 @;restore SPSR_irq
|
||||
|
||||
mov r1, #0xDF @;Switch to systme Mode
|
||||
msr cpsr_cf, r1
|
||||
NOP
|
||||
add r7,#0x24 @;offset 0x50
|
||||
ldmia r7!,{r13-r14}
|
||||
|
||||
msr cpsr_cf,r0 @;restore IRQ
|
||||
NOP
|
||||
|
||||
mov r0,#0x0
|
||||
bl SetRampage
|
||||
|
||||
BL Restore_
|
||||
|
||||
adrl r12, spend_0x80
|
||||
ldr r12,[r12]
|
||||
ldmia r12!,{r4-r11,sp,lr}
|
||||
mov r0,#0x04000000
|
||||
ldr pc,[r0,#-(0x04000000-0x03FFFFF4)] @;to normal IRQ routine
|
||||
|
||||
@;===================================================
|
||||
.ltorg
|
||||
@;===================================================
|
||||
register_list:
|
||||
.hword 0x0000,0x0002,0x0004,0x0008,0x000A,0x000C,0x000E
|
||||
.hword 0x0048,0x004A,0x0050,0x0052
|
||||
.hword 0x0084
|
||||
.hword 0x0060,0x0062,0x0068,0x0070,0x0072,0x0078
|
||||
.hword 0x0080,0x0082,0x0088 @;0x008C,0x008E,
|
||||
.hword 0x0090,0x0092,0x0094,0x0096,0x0098,0x009A,0x009C,0x009E
|
||||
|
||||
.hword 0x00B8,0x00C4,0x00D0,0x00DC @;DMA
|
||||
.hword 0x0120,0x0122,0x0124,0x0126,0x0128,0x012A,0x012C,0x0132,0x0134
|
||||
.hword 0x0140,0x0150,0x0154
|
||||
@;,0x0200,0x0204,0x0208
|
||||
.hword 0xFF00
|
||||
.align
|
||||
@;------------------------------------------------
|
||||
|
||||
.align
|
||||
S_RTS_FLAG:
|
||||
.byte 'E','Z','-','O','m','e','g','a','R','T','C','F','I','L','E','.'
|
||||
.align
|
||||
RTS_only_ReplaceIRQ_end:
|
||||
.end
|
||||
Binary file not shown.
@ -54,7 +54,7 @@ u8 edit_rtshotkey[3]={0};
|
||||
void Show_ver(void)
|
||||
{
|
||||
char msg[20];
|
||||
char *ver="K:1.03";
|
||||
char *ver="K:1.04";
|
||||
u16 FPGAver = Read_FPGA_ver();
|
||||
sprintf(msg,"FW:%d %s",FPGAver&0xFF,ver);
|
||||
DrawHZText12(msg,0,160,3, gl_color_text,1);
|
||||
@ -191,14 +191,24 @@ u32 Setting_window(void)
|
||||
Draw_select_icon(x_offset,y_offset+line_x*4,(engine_sel == 0x1));
|
||||
sprintf(msg,"%s",gl_use_engine);
|
||||
DrawHZText12(msg,0,x_offset+15,y_offset+line_x*4,(engine_pos==0)?gl_color_selected:gl_color_text,1);
|
||||
//
|
||||
sprintf(msg,"%s",gl_hot_key);
|
||||
DrawHZText12(msg,0,set_offset,y_offset+line_x*5,gl_color_selected,1);
|
||||
|
||||
//
|
||||
|
||||
ClearWithBG((u16*)gImage_SET,set_offset, y_offset+line_x*5, 9*6, 13, 1);
|
||||
ClearWithBG((u16*)gImage_SET,set_offset, y_offset+line_x*6, 9*6, 13, 1);
|
||||
if( (v_rts==1) && (v_cheat == 0) && (v_reset == 0) && (v_sleep == 0) ) {
|
||||
sprintf(msg,"%s"," SAVE KEY");
|
||||
DrawHZText12(msg,0,set_offset,y_offset+line_x*5,gl_color_selected,1);
|
||||
|
||||
sprintf(msg,"%s",gl_hot_key2);
|
||||
DrawHZText12(msg,0,set_offset,y_offset+line_x*6,gl_color_selected,1);
|
||||
|
||||
sprintf(msg,"%s"," LOAD KEY");
|
||||
DrawHZText12(msg,0,set_offset,y_offset+line_x*6,gl_color_selected,1);
|
||||
}
|
||||
else{
|
||||
sprintf(msg,"%s",gl_hot_key);
|
||||
DrawHZText12(msg,0,set_offset,y_offset+line_x*5,gl_color_selected,1);
|
||||
|
||||
sprintf(msg,"%s",gl_hot_key2);
|
||||
DrawHZText12(msg,0,set_offset,y_offset+line_x*6,gl_color_selected,1);
|
||||
}
|
||||
|
||||
//RTC
|
||||
sprintf(msg,"%s",gl_ingameRTC);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user