mirror of
https://github.com/ApacheThunder/XuluMenu.git
synced 2025-06-19 03:55:32 -04:00
66f91bb555
* Compressed internal SRL binaries for built in stage2/udisk/nrio-usb-disk. This saves space in the main NDS file and managed to get main NDS file below 1MB. * uDisk updator arm9 BIN files updated to flash 8 0x20000 blocks instead of 9 now that xulumenu is small enough to fit in 8. * tonccpy moved to ITCM. * nrio_detect moved to ITCM. * Moved ram location second bootloader uses as tmp memory to load built in SRL binaries. Was 0x02200000 but now is 0x02300000. This is to make room for buffer needed for decompression function.
76 lines
2.6 KiB
C
76 lines
2.6 KiB
C
// SPDX-License-Identifier: CC0-1.0
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//
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// SPDX-FileContributor: Adrian "asie" Siekierka, 2024
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#include <nds.h>
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#include "nrio_detect.h"
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#define EXMEMCNT_SRAM_TIME_SHIFT (0)
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#define EXMEMCNT_SRAM_TIME_6_CYCLES (2 << EXMEMCNT_SRAM_TIME_SHIFT)
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#define EXMEMCNT_SRAM_TIME_18_CYCLES (3 << EXMEMCNT_SRAM_TIME_SHIFT)
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#define EXMEMCNT_ROM_TIME1_SHIFT (2)
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#define EXMEMCNT_ROM_TIME2_SHIFT (4)
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#define EXMEMCNT_ROM_TIME1_6_CYCLES (2 << EXMEMCNT_ROM_TIME1_SHIFT)
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#define EXMEMCNT_ROM_TIME1_18_CYCLES (3 << EXMEMCNT_ROM_TIME1_SHIFT)
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#define EXMEMCNT_ROM_TIME2_6_CYCLES (0 << EXMEMCNT_ROM_TIME2_SHIFT)
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#define EXMEMCNT_ROM_TIME2_4_CYCLES (1 << EXMEMCNT_ROM_TIME2_SHIFT)
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#define NRIO_D12_DATA (*((volatile uint16_t*) 0x9FDFFFE))
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#define NRIO_D12_CMD (*((volatile uint16_t*) 0x9FFFFFE))
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#define NRIO_D12_CMD_READ_ID 0xFD
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static inline uint16_t nrio_d12_read_chip_id(void) {
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uint16_t result;
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NRIO_D12_CMD = NRIO_D12_CMD_READ_ID;
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result = NRIO_D12_DATA & 0xFF;
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result |= (NRIO_D12_DATA & 0xFF) << 8;
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return result;
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}
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#define NRIO_D14_REG(index) GBA_BUS[(index) * 0x10000]
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#define NRIO_D14_CHIP_IDL NRIO_D14_REG(0x70)
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#define NRIO_D14_CHIP_IDH NRIO_D14_REG(0x72)
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static inline uint32_t nrio_d14_read_chip_id(void) {
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return ((NRIO_D14_CHIP_IDH << 16) | NRIO_D14_CHIP_IDL) & 0xFFFFFF;
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}
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nrio_usb_type_t nrio_usb_detect(void) {
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nrio_usb_type_t result = {0, 0, 0};
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// Configure GBA cartridge bus
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sysSetCartOwner(BUS_OWNER_ARM9);
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REG_EXMEMCNT = (REG_EXMEMCNT & ~0x1F) | EXMEMCNT_ROM_TIME1_6_CYCLES
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| EXMEMCNT_ROM_TIME2_4_CYCLES | EXMEMCNT_SRAM_TIME_6_CYCLES;
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// Check if the chip is an ISP1581/82/83
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uint32_t d14_chip_id = nrio_d14_read_chip_id();
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if (d14_chip_id >= 0x158100 && d14_chip_id < 0x158400) {
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result.board_type = NRIO_USB_BOARD_TYPE_D14;
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result.chip_id = d14_chip_id >> 8;
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result.chip_rev = d14_chip_id & 0xFF;
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return result;
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}
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// The D12 supports a maximum readout speed of 2 MHz.
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REG_EXMEMCNT = (REG_EXMEMCNT & ~0x1F) | EXMEMCNT_ROM_TIME1_18_CYCLES
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| EXMEMCNT_ROM_TIME2_6_CYCLES | EXMEMCNT_SRAM_TIME_18_CYCLES;
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// Check if the chip is an PDIUSBD12 (do other compatible chips exist?)
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uint16_t d12_chip_id = nrio_d12_read_chip_id();
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uint8_t d12_open_bus = NRIO_D12_DATA;
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if (!((d12_chip_id >> 8) == d12_open_bus && (d12_chip_id & 0xFF) == d12_open_bus)) {
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result.board_type = NRIO_USB_BOARD_TYPE_D12;
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result.chip_id = d12_chip_id;
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return result;
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}
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return result;
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}
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