mirror of
https://github.com/ApacheThunder/SCKILL.git
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274 lines
6.0 KiB
ArmAsm
274 lines
6.0 KiB
ArmAsm
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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@ io_scsd_s.s
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@
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@ Hardware Routines for reading a Secure Digital card
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@ using the SC SD
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@
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@ Based on code supplied by Romman
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@
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@ Copyright (c) 2006 Michael "Chishm" Chisholm
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@
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@ Redistribution and use in source and binary forms, with or without modification,
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@ are permitted provided that the following conditions are met:
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@
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@ 1. Redistributions of source code must retain the above copyright notice,
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@ this list of conditions and the following disclaimer.
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@ 2. Redistributions in binary form must reproduce the above copyright notice,
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@ this list of conditions and the following disclaimer in the documentation and/or
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@ other materials provided with the distribution.
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@ 3. The name of the author may not be used to endorse or promote products derived
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@ from this software without specific prior written permission.
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@
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@ THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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@ WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
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@ AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE
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@ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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@ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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@ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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@ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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@ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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@ EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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@
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@ 2006-07-22 - Chishm
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@ * First release of stable code
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@
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@ 2006-08-19 - Chishm
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@ * Added SuperCard Lite support
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@
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@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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.section .iwram
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.align 4
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.arm
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.equ REG_SCSD_DATAWRITE, 0x09000000
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.equ REG_SCSD_DATAREAD, 0x09100000
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.equ BYTES_PER_READ, 0x200
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.equ SCSD_STS_BUSY, 0x100
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.equ BUSY_WAIT_TIMEOUT, 0x10000
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.equ FALSE, 0
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.equ TRUE, 1
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@ bool _SCSD_writeData_s (u8 *data, u16* crc)
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.global _SCSD_writeData_s
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_SCSD_writeData_s:
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stmfd r13!, {r4-r5}
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mov r5, #BYTES_PER_READ
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mov r2, #REG_SCSD_DATAWRITE
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@ Wait for a free data buffer on the SD card
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mov r4, #BUSY_WAIT_TIMEOUT
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_SCSD_writeData_busy_wait:
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@ Test for timeout
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subs r4, r4, #1
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moveq r0, #FALSE @ return false on failure
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beq _SCSD_writeData_return
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@ Check the busy bit of the status register
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ldrh r3, [r2]
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tst r3, #SCSD_STS_BUSY
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beq _SCSD_writeData_busy_wait
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ldrh r3, [r2] @ extra clock
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mov r3, #0 @ start bit
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strh r3,[r2]
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@ Check if the data buffer is aligned on a halfword boundary
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tst r0, #1
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beq _SCSD_writeData_data_loop
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@ Used when the source data is unaligned
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_SCSD_writeData_data_loop_unaligned:
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ldrb r3, [r0], #1
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ldrb r4, [r0], #1
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orr r3, r3, r4, lsl #8
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stmia r2, {r3-r4}
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subs r5, r5, #2
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bne _SCSD_writeData_data_loop_unaligned
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b _SCSD_writeData_crc
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@ Write the data to the card
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@ 4 halfwords are transmitted to the Supercard at once, for timing purposes
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@ Only the first halfword needs to contain data for standard SuperCards
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@ For the SuperCard Lite, the data is split into 4 nibbles, one per halfword
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_SCSD_writeData_data_loop:
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ldrh r3, [r0], #2
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@ This bit added for SCLite. Notice that the shift is not the same as in
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@ the original (buggy) code supplied by Romman
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add r3, r3, r3, lsl #20
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mov r4, r3, lsr #8
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stmia r2, {r3-r4}
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subs r5, r5, #2
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bne _SCSD_writeData_data_loop
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@ Send the data CRC
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_SCSD_writeData_crc:
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cmp r1, #0
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movne r0, r1
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movne r1, #0
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movne r5, #8
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bne _SCSD_writeData_data_loop
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mov r3, #0xff @ end bit
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strh r3, [r2]
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@ Wait for the SD card to signal that it is finished recieving
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mov r4, #BUSY_WAIT_TIMEOUT
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_SCSD_writeData_finished_wait:
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@ Test for timeout
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subs r4, r4, #1
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moveq r0, #FALSE @ return false on failure
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beq _SCSD_writeData_return
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@ Check the busy bit of the status register
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ldrh r3, [r2]
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tst r3, #0x100
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bne _SCSD_writeData_finished_wait
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@ Send 8 more clocks, as required by the SD card
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ldmia r2, {r3-r4}
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@ return true for success
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mov r0, #TRUE
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_SCSD_writeData_return:
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ldmfd r13!,{r4-r5}
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bx r14
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@ bool _SCSD_readData_s (u8 *data)
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.global _SCSD_readData_s
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_SCSD_readData_s:
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push {r4, lr}
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mov r2, #145 << 20
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mov r1, #128 << 1
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ldr r3, .L101
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.L88:
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ldrh r4, [r2]
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tst r4, r1
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beq .L87
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subs r3, r3, #1
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cmp r3, #0
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bne .L88
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mov r0, r3
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b .L97
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.L95:
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ldr r2, .L101+4
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b .L98
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.L90:
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ldr r1, [r2]
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ldr r1, [r2]
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strb r1, [r0], # 1
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lsr r1, r1, #8
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strb r1, [r0], # 1
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ldr r1, [r2]
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ldr r1, [r2]
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strb r1, [r0], # 1
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lsr r1, r1, #8
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strb r1, [r0], # 1
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ldr r1, [r2]
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ldr r1, [r2]
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strb r1, [r0], # 1
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lsr r1, r1, #8
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strb r1, [r0], # 1
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ldr r1, [r2]
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ldr r1, [r2]
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strb r1, [r0], # 1
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lsr r1, r1, #8
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strb r1, [r0], # 1
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ldr r1, [r2]
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ldr r1, [r2]
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strb r1, [r0], # 1
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lsr r1, r1, #8
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strb r1, [r0], # 1
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ldr r1, [r2]
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ldr r1, [r2]
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strb r1, [r0], # 1
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lsr r1, r1, #8
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strb r1, [r0], # 1
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ldr r1, [r2]
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ldr r1, [r2]
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strb r1, [r0], # 1
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lsr r1, r1, #8
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strb r1, [r0], # 1
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ldr r1, [r2]
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ldr r1, [r2]
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strb r1, [r0], # 1
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lsr r1, r1, #8
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strb r1, [r0], # 1
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.L98:
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cmp r0, r3
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bne .L90
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.L92:
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mov r3, #145 << 20
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ldr r2, [r3]
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mov r0, #1
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ldr r2, [r3]
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ldr r2, [r3]
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ldr r2, [r3]
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ldr r2, [r3]
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ldr r2, [r3]
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ldr r2, [r3]
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ldr r2, [r3]
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ldrh r3, [r3]
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b .L97
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.L100:
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ldr r2, .L101+4
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b .L99
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.L91:
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ldr r1, [r2]
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swp r1, r4, [r2]
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strh r1, [r0], # 2
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swp r1, r4, [r2]
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strh r1, [r0], # 2
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swp r1, r4, [r2]
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strh r1, [r0], # 2
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swp r1, r4, [r2]
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strh r1, [r0], # 2
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swp r1, r4, [r2]
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strh r1, [r0], # 2
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swp r1, r4, [r2]
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strh r1, [r0], # 2
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swp r1, r4, [r2]
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strh r1, [r0], # 2
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ldr r1, [r2]
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strh r1, [r0], # 2
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.L99:
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cmp r0, r3
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bne .L91
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b .L92
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.L87:
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mov r2, #128 << 2
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add r3, r0, r2
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lsls r2, r0, #31
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bmi .L95
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b .L100
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.L97:
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@ sp needed for prologue
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pop {r4, lr}
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bx lr
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.L102:
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.align 2
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.L101:
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.word 500000
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.word 0x0b100002
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