mirror of
https://github.com/ApacheThunder/NTR_Launcher.git
synced 2025-06-19 03:25:38 -04:00
a4e5a00409
* Stage2 launcher UI added. This is a heavily modified HBMenu with ability to launch carts! This menu can be used to boot a bootloader NDS file for flascharts that the direct cart launcher fails to boot. * New audio files added for new menu. * HBMenu UI loaded by default if booted with no cart inserted. * INI file folder now located in NTR_Launcher folder instead. A default ini file from NitroFS (if mount of nitrofs succeeds) will be copied to SD if one is not present. * Stage2 launchers are expected to be in NTR Launcehr folder though you can navigate to any folder you want in the UI so stage2 launchers aren't the only thing this can be used for. You can also use this as a means of booting homebrew off SD in NTR mode.
195 lines
6.1 KiB
C
195 lines
6.1 KiB
C
#ifndef __SDMMC_H__
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#define __SDMMC_H__
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#include <nds/ndstypes.h>
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#define DATA32_SUPPORT
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#define SDMMC_BASE 0x04004800
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#define REG_SDCMD 0x00
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#define REG_SDPORTSEL 0x02
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#define REG_SDCMDARG 0x04
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#define REG_SDCMDARG0 0x04
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#define REG_SDCMDARG1 0x06
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#define REG_SDSTOP 0x08
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#define REG_SDRESP 0x0c
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#define REG_SDBLKCOUNT 0x0a
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#define REG_SDRESP0 0x0c
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#define REG_SDRESP1 0x0e
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#define REG_SDRESP2 0x10
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#define REG_SDRESP3 0x12
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#define REG_SDRESP4 0x14
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#define REG_SDRESP5 0x16
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#define REG_SDRESP6 0x18
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#define REG_SDRESP7 0x1a
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#define REG_SDSTATUS0 0x1c
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#define REG_SDSTATUS1 0x1e
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#define REG_SDIRMASK0 0x20
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#define REG_SDIRMASK1 0x22
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#define REG_SDCLKCTL 0x24
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#define REG_SDBLKLEN 0x26
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#define REG_SDOPT 0x28
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#define REG_SDFIFO 0x30
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#define REG_SDDATACTL 0xd8
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#define REG_SDRESET 0xe0
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#define REG_SDPROTECTED 0xf6 //bit 0 determines if sd is protected or not?
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#define REG_SDDATACTL32 0x100
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#define REG_SDBLKLEN32 0x104
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#define REG_SDBLKCOUNT32 0x108
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#define REG_SDFIFO32 0x10C
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#define REG_CLK_AND_WAIT_CTL 0x138
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#define REG_RESET_SDIO 0x1e0
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//The below defines are from linux kernel drivers/mmc tmio_mmc.h.
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/* Definitions for values the CTRL_STATUS register can take. */
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#define TMIO_STAT0_CMDRESPEND 0x0001
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#define TMIO_STAT0_DATAEND 0x0004
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#define TMIO_STAT0_CARD_REMOVE 0x0008
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#define TMIO_STAT0_CARD_INSERT 0x0010
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#define TMIO_STAT0_SIGSTATE 0x0020
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#define TMIO_STAT0_WRPROTECT 0x0080
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#define TMIO_STAT0_CARD_REMOVE_A 0x0100
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#define TMIO_STAT0_CARD_INSERT_A 0x0200
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#define TMIO_STAT0_SIGSTATE_A 0x0400
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#define TMIO_STAT1_CMD_IDX_ERR 0x0001
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#define TMIO_STAT1_CRCFAIL 0x0002
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#define TMIO_STAT1_STOPBIT_ERR 0x0004
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#define TMIO_STAT1_DATATIMEOUT 0x0008
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#define TMIO_STAT1_RXOVERFLOW 0x0010
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#define TMIO_STAT1_TXUNDERRUN 0x0020
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#define TMIO_STAT1_CMDTIMEOUT 0x0040
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#define TMIO_STAT1_RXRDY 0x0100
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#define TMIO_STAT1_TXRQ 0x0200
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#define TMIO_STAT1_ILL_FUNC 0x2000
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#define TMIO_STAT1_CMD_BUSY 0x4000
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#define TMIO_STAT1_ILL_ACCESS 0x8000
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#define SDMC_NORMAL 0x00000000
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#define SDMC_ERR_COMMAND 0x00000001
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#define SDMC_ERR_CRC 0x00000002
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#define SDMC_ERR_END 0x00000004
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#define SDMC_ERR_TIMEOUT 0x00000008
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#define SDMC_ERR_FIFO_OVF 0x00000010
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#define SDMC_ERR_FIFO_UDF 0x00000020
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#define SDMC_ERR_WP 0x00000040
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#define SDMC_ERR_ABORT 0x00000080
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#define SDMC_ERR_FPGA_TIMEOUT 0x00000100
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#define SDMC_ERR_PARAM 0x00000200
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#define SDMC_ERR_R1_STATUS 0x00000800
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#define SDMC_ERR_NUM_WR_SECTORS 0x00001000
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#define SDMC_ERR_RESET 0x00002000
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#define SDMC_ERR_ILA 0x00004000
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#define SDMC_ERR_INFO_DETECT 0x00008000
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#define SDMC_STAT_ERR_UNKNOWN 0x00080000
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#define SDMC_STAT_ERR_CC 0x00100000
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#define SDMC_STAT_ERR_ECC_FAILED 0x00200000
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#define SDMC_STAT_ERR_CRC 0x00800000
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#define SDMC_STAT_ERR_OTHER 0xf9c70008
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#define TMIO_MASK_ALL 0x837f031d
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#define TMIO_MASK_GW (TMIO_STAT1_ILL_ACCESS | TMIO_STAT1_CMDTIMEOUT | TMIO_STAT1_TXUNDERRUN | TMIO_STAT1_RXOVERFLOW | \
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TMIO_STAT1_DATATIMEOUT | TMIO_STAT1_STOPBIT_ERR | TMIO_STAT1_CRCFAIL | TMIO_STAT1_CMD_IDX_ERR)
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#define TMIO_MASK_READOP (TMIO_STAT1_RXRDY | TMIO_STAT1_DATAEND)
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#define TMIO_MASK_WRITEOP (TMIO_STAT1_TXRQ | TMIO_STAT1_DATAEND)
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typedef struct mmcdevice {
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u8* data;
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u32 size;
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u32 error;
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u16 stat0;
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u16 stat1;
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u32 ret[4];
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u32 initarg;
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u32 isSDHC;
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u32 clk;
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u32 SDOPT;
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u32 devicenumber;
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u32 total_size; //size in sectors of the device
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u32 res;
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} mmcdevice;
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enum {
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MMC_DEVICE_SDCARD,
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MMC_DEVICE_NAND,
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};
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void sdmmc_controller_init(bool force_init);
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void sdmmc_initirq();
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int sdmmc_cardinserted();
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int sdmmc_sdcard_init();
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int sdmmc_nand_init();
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void sdmmc_get_cid(int devicenumber, u32 *cid);
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static inline void sdmmc_nand_cid( u32 *cid) {
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sdmmc_get_cid(MMC_DEVICE_NAND,cid);
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}
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static inline void sdmmc_sdcard_cid( u32 *cid) {
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sdmmc_get_cid(MMC_DEVICE_SDCARD,cid);
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}
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int sdmmc_sdcard_readsectors(u32 sector_no, u32 numsectors, void *out);
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int sdmmc_sdcard_writesectors(u32 sector_no, u32 numsectors, void *in);
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int sdmmc_nand_readsectors(u32 sector_no, u32 numsectors, void *out);
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int sdmmc_nand_writesectors(u32 sector_no, u32 numsectors, void *in);
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extern u32 sdmmc_cid[];
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extern int sdmmc_curdevice;
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//---------------------------------------------------------------------------------
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static inline u16 sdmmc_read16(u16 reg) {
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//---------------------------------------------------------------------------------
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return *(vu16*)(SDMMC_BASE + reg);
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}
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//---------------------------------------------------------------------------------
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static inline void sdmmc_write16(u16 reg, u16 val) {
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//---------------------------------------------------------------------------------
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*(vu16*)(SDMMC_BASE + reg) = val;
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}
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//---------------------------------------------------------------------------------
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static inline u32 sdmmc_read32(u16 reg) {
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//---------------------------------------------------------------------------------
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return *(vu32*)(SDMMC_BASE + reg);
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}
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//---------------------------------------------------------------------------------
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static inline void sdmmc_write32(u16 reg, u32 val) {
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//---------------------------------------------------------------------------------
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*(vu32*)(SDMMC_BASE + reg) = val;
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}
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//---------------------------------------------------------------------------------
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static inline void sdmmc_mask16(u16 reg, u16 clear, u16 set) {
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//---------------------------------------------------------------------------------
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u16 val = sdmmc_read16(reg);
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val &= ~clear;
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val |= set;
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sdmmc_write16(reg, val);
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}
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//---------------------------------------------------------------------------------
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static inline void setckl(u32 data) {
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//---------------------------------------------------------------------------------
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sdmmc_mask16(REG_SDCLKCTL, 0x100, 0);
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sdmmc_mask16(REG_SDCLKCTL, 0x2FF, data & 0x2FF);
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sdmmc_mask16(REG_SDCLKCTL, 0x0, 0x100);
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}
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#endif
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