mirror of
https://github.com/ApacheThunder/GodMode9Nrio.git
synced 2025-06-19 03:05:34 -04:00
27d6c3c6c1
* Screenshot feature removed to free up more ram. * SCFG register changes on startup moved to dedicated function run from ITCM memory. This should hopefully reduce instances where program hangs at startup. Bootstarp is still provided incase some people still have that problem.
126 lines
2.8 KiB
C
126 lines
2.8 KiB
C
#define ARM9
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#undef ARM7
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#include <nds/ndstypes.h>
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#include <nds/dma.h>
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#include <nds/system.h>
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#include <nds/interrupts.h>
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#include <nds/timers.h>
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#include <nds/memory.h>
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#include <nds/arm9/video.h>
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#include <nds/arm9/input.h>
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#include "boot.h"
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/*-------------------------------------------------------------------------
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resetMemory2_ARM9
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Clears the ARM9's DMA channels and resets video memory
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Written by Darkain.
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Modified by Chishm:
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* Changed MultiNDS specific stuff
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--------------------------------------------------------------------------*/
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void __attribute__ ((long_call)) __attribute__((naked)) __attribute__((noreturn)) resetMemory2_ARM9 (void) {
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register int i;
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//clear out ARM9 DMA channels
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for (i=0; i<4; i++) {
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DMA_CR(i) = 0;
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DMA_SRC(i) = 0;
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DMA_DEST(i) = 0;
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TIMER_CR(i) = 0;
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TIMER_DATA(i) = 0;
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}
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VRAM_CR = (VRAM_CR & 0xffff0000) | 0x00008080 ;
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u16 *mainregs = (u16*)0x04000000;
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u16 *subregs = (u16*)0x04001000;
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for (i=0; i<43; i++) {
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mainregs[i] = 0;
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subregs[i] = 0;
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}
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REG_DISPSTAT = 0;
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VRAM_A_CR = 0;
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VRAM_B_CR = 0;
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// Don't mess with the ARM7's VRAM
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// VRAM_C_CR = 0;
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VRAM_D_CR = 0;
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VRAM_E_CR = 0;
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VRAM_F_CR = 0;
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VRAM_G_CR = 0;
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VRAM_H_CR = 0;
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VRAM_I_CR = 0;
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REG_POWERCNT = 0x820F;
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//set shared ram to ARM7
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WRAM_CR = 0x03;
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// Return to passme loop
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*((vu32*)0x02FFFE04) = (u32)0xE59FF018; // ldr pc, 0x02FFFE24
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*((vu32*)0x02FFFE24) = (u32)0x02FFFE04; // Set ARM9 Loop address
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asm volatile(
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"\tbx %0\n"
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: : "r" (0x02FFFE04)
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);
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while(1);
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}
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#ifdef NTRMODE
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void __attribute__ ((long_call)) __attribute__((naked)) __attribute__((noreturn)) initMBK_ARM9(void) {
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// Standard NTR Mode MBK setup
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*((vu32*)REG_MBK1)=0x8D898581;
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*((vu32*)REG_MBK2)=0x91898581;
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*((vu32*)REG_MBK3)=0x91999591;
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*((vu32*)REG_MBK4)=0x91898581;
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*((vu32*)REG_MBK5)=0x91999591;
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REG_MBK6=0x00003000;
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REG_MBK7=0x00003000;
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REG_MBK8=0x00003000;
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// Return to passme loop
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*((vu32*)0x02FFFE04) = (u32)0xE59FF018; // ldr pc, 0x02FFFE24
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*((vu32*)0x02FFFE24) = (u32)0x02FFFE04; // Set ARM9 Loop address
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asm volatile(
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"\tbx %0\n"
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: : "r" (0x02FFFE04)
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);
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while(1);
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}
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#endif
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/*-------------------------------------------------------------------------
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startBinary_ARM9
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Jumps to the ARM9 NDS binary in sync with the display and ARM7
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Written by Darkain.
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Modified by Chishm:
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* Removed MultiNDS specific stuff
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--------------------------------------------------------------------------*/
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void __attribute__ ((long_call)) __attribute__((noreturn)) __attribute__((naked)) startBinary_ARM9 (void)
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{
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REG_IME=0;
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REG_EXMEMCNT = 0xE880;
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// set ARM9 load address to 0 and wait for it to change again
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ARM9_START_FLAG = 0;
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while(REG_VCOUNT!=191);
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while(REG_VCOUNT==191);
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while ( ARM9_START_FLAG != 1 );
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VoidFn arm9code = *(VoidFn*)(0x2FFFE24);
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#ifdef NTRMODE
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// REG_SCFG_CLK = 0x80;
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REG_SCFG_EXT = 0x03002000;
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#endif
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arm9code();
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while(1);
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}
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