mirror of
https://github.com/ApacheThunder/GBA-Exploader.git
synced 2025-06-18 11:35:38 -04:00
Fully remove NorFlash menu for Omega
* NorFlash menu fully disabled for Omega. Pressing L no longer causes NorFlash menu to come up while in rumble/expansion ram selection menu. * Bug with ini file setup that causes default folders to always be created despite ini file defining custom folder locations has been resolved. * Menu display for Omega now changed to Omega DE. DE is currently the only cart that will have functional saves for games.
This commit is contained in:
ApacheThunder
parent
8aa7cfdefa
commit
7b62f440d2
1
.gitignore
vendored
1
.gitignore
vendored
@ -41,6 +41,7 @@
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*.arm9
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*.elf
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*.dldi
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*.sav
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build
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data
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title
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2
Makefile
2
Makefile
@ -9,7 +9,7 @@ export TARGET := GBA_ExpLoader
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export TOPDIR := $(CURDIR)
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export VERSION_MAJOR := 0
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export VERSION_MINOR := 63
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export VERSION_MINOR := 64
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export VERSTRING := $(VERSION_MAJOR).$(VERSION_MINOR)
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# GMAE_ICON is the image used to create the game icon, leave blank to use default rule
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@ -28,57 +28,72 @@ typedef unsigned long DWORD;
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#endif
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#ifndef BOOL
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typedef bool BOOL ;
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typedef bool BOOL;
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#endif
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// export interface
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//---------------------------------------------------
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//DS ¿¨ »ù±¾²Ù×÷
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//Arm9 方面基本操作容许ARM7访问slot1
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// void Enable_Arm7DS(void);
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//Arm9 方面基本操作容许ARM7访问slot1
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// void Enable_Arm7DS(void);
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//Arm9 方面基本操作容许ARM9访问slot1
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// void Enable_Arm9DS(void);
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//Arm9 方面基本操作容许ARM9访问slot1
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// void Enable_Arm9DS(void);
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//下面是访问震动卡的函数
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//下面是访问震动卡的函数
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#define FlashBase 0x08000000
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#define PSRAMBase_S98 0x08800000 // EZ Flash Omega PSRAM location while in Kernal mode. (only writable in Kernal mode)
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#define FlashBase_S98 0x09000000
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#define SRAM_ADDR 0x0A000000
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#define SRAM_ADDR_OMEGA 0x0E000000
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#define RTC_ENABLE ((vu16*)0x080000C8)
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void OpenNorWrite();
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void CloseNorWrite();
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void SetRompage(u16 page);
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void SetRampage(u16 page);
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void SetSDControl(u16 control);
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void Set_AUTO_save(u16 mode);
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u16 Read_S71NOR_ID(); // For Reading EZFlash Omega ID
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u16 Read_S98NOR_ID(); // For Reading EZFlash Omega ID
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void SetPSRampage(u16 page); // EZFlash Omega uses this to change what 8MB of 32MB PSRAM is accessible at 0x08800000
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void Set_RTC_status(u16 status); // EZFlash Omega RTC thingy
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u16 Read_SET_info(u32 offset);
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void rtc_toggle(bool enable);
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void SetbufferControl(u16 control);
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void Omega_Bank_Switching(u8 bank);
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void Omega_InitFatBuffer(BYTE saveMODE);
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void OpenRamWrite();
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void CloseRamWrite();
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void SetSerialMode();
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uint32 ReadNorFlashID();
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void chip_reset();
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void Block_EraseIntel(u32 blockAdd);
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void Block_Erase(u32 blockAdd);
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// void ReadNorFlash(u8* pBuf,u32 address,u16 len); // Not used anywhere right now. Disabled out for now.
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void WriteNorFlashINTEL(u32 address,u8 *buffer,u32 size);
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void WriteNorFlash(u32 address,u8 *buffer,u32 size);
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void WriteSram(uint32 address, u8* data , uint32 size );
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void ReadSram(uint32 address, u8* data , uint32 size );
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void SetShake(u16 data);
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#define OMEGA_NOSAVE 0
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#define OMEGA_UNKNOWN 0xFF
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#define OMEGA_EEPROM_512 0x21
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#define OMEGA_EEPROM_8K 0x22
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#define OMEGA_EEPROM_V125 0x23
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#define OMEGA_FLASH_64K 0x32
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#define OMEGA_FLASH_512 0x33
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#define OMEGA_FLASH_1M 0x31
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#define OMEGA_SRAM_32K 0x11
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#define OMEGA_SRAM_64K 0x10
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// #define OMEGA_SRAM_64K 0xEE
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void OpenNorWrite();
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void CloseNorWrite();
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void SetRompage(u16 page);
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void SetRampage(u16 page);
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void SetSDControl(u16 control);
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void Set_AUTO_save(u16 mode);
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u16 Read_S71NOR_ID(); // For Reading EZFlash Omega ID
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u16 Read_S98NOR_ID(); // For Reading EZFlash Omega ID
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void SetPSRampage(u16 page); // EZFlash Omega uses this to change what 8MB of 32MB PSRAM is accessible at 0x08800000
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void Set_RTC_status(u16 status); // EZFlash Omega RTC thingy
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u16 Read_SET_info(u32 offset);
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void rtc_toggle(bool enable);
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void SetbufferControl(u16 control);
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void Omega_Bank_Switching(u8 bank);
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void Omega_InitFatBuffer(BYTE saveMODE, u32 saveSize, u32 gameSize);
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u32 Omega_SetSaveSize(u8 SaveMode);
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void OpenRamWrite();
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void CloseRamWrite();
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void SetSerialMode();
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u32 CheckSuperCardID();
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u32 CheckOmegaID();
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uint32 ReadNorFlashID();
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void chip_reset();
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void Block_EraseIntel(u32 blockAdd);
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void Block_Erase(u32 blockAdd);
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// void ReadNorFlash(u8* pBuf,u32 address,u16 len); // Not used anywhere right now. Disabled out for now.
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void WriteNorFlashINTEL(u32 address,u8 *buffer,u32 size);
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void WriteNorFlash(u32 address,u8 *buffer,u32 size);
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void WriteSram(uint32 address, u8* data , uint32 size );
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void ReadSram(uint32 address, u8* data , uint32 size );
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void SetShake(u16 data);
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#ifdef __cplusplus
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}
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#endif
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@ -21,15 +21,9 @@ extern "C" {
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static u32 ID = 0x227E2218;
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u16 gl_ingame_RTC_open_status = 0;
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static u32 FAT_table_buffer[0x400/4];
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static bool checkForSuperCard() {
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_SC_changeMode(SC_MODE_RAM); // Try again with SuperCard
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// _SC_changeMode16(0x1510);
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*(vu16*)(0x08000000) = 0x4D54;
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if (*(vu16*)(0x08000000) == 0x4D54)return true;
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return false;
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}
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u16 gl_ingame_RTC_open_status = 0;
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//&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
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//---------------------------------------------------
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@ -138,10 +132,10 @@ void rtc_toggle(bool enable) {
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}
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void Omega_Bank_Switching(u8 bank) {
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*((vu8*)(SRAM_ADDR_OMEGA+0x5555)) = 0xAA;
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*((vu8*)(SRAM_ADDR_OMEGA+0x5555)) = 0xAA; // SRAM_ADDR_OMEGA
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*((vu8*)(SRAM_ADDR_OMEGA+0x2AAA)) = 0x55;
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*((vu8*)(SRAM_ADDR_OMEGA+0x5555)) = 0xB0;
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*((vu8*)SRAM_ADDR_OMEGA) = bank;
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*((vu8*)SRAM_ADDR_OMEGA) = bank;
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}
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void SetbufferControl(u16 control) {
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@ -153,24 +147,65 @@ void SetbufferControl(u16 control) {
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*(u16*)0x9fc0000 = 0x1500;
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}
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static u32 FAT_table_buffer[0x400/4];
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u16 SD_Response(void) { return *(vu16*)0x9E00000; }
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void Omega_InitFatBuffer(BYTE saveMODE) {
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toncset((void*)FAT_table_buffer, 0, (0x400/4));
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void Omega_InitFatBuffer(BYTE saveMODE, u32 saveSize, u32 gameSize) {
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toncset((u32*)FAT_table_buffer, 0, 0x400);
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// FAT_table_buffer[1] = 0; // sector location of game rom to be copies
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FAT_table_buffer[2] = 0xFFFFFFFF;
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// FAT_table_buffer[0x1F0/4] = 0; //size
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// FAT_table_buffer[0x1F0/4] = gameSize; // rom copy size
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FAT_table_buffer[0x1F4/4] = 0x2; // 0x1 == rom copy to psram // 0x2 == copy mode
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// FAT_table_buffer[0x1F8/4] = 0; // secort of cluster
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// FAT_table_buffer[0x1FC/4] = (0x31<<24) | 0x20000; // save mode and save file size
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FAT_table_buffer[0x1FC/4] = (saveMODE<<24) | 0x10000; // save mode and save file size
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FAT_table_buffer[0x1F8/4] = 0x40; // secort of cluster
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FAT_table_buffer[0x1FC/4] = ((saveMODE << 24) | saveSize); // save mode and save file size
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// FAT_table_buffer[0x204/4] = 0x363100; // Save file sector location
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FAT_table_buffer[0x204/4] = 0x00C07644;
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FAT_table_buffer[0x208/4] = 0xFFFFFFFF;
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// FAT_table_buffer[0x308/4] = 0x100; // RTS?
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// FAT_table_buffer[0x320/4] = 0xFFFFFFFF; // RTS?
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// FAT_table_buffer[0x210/4] = 0xFFFFFFFF;
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// FAT_table_buffer[0x210/4] = 0xFFFFFFFF;
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/*FILE *testFile = fopen("/fatTableTest.bin", "wb");
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if (testFile) {
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fwrite((void*)FAT_table_buffer, 0x400, 1, testFile);
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fclose(testFile);
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}*/
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SetbufferControl(1);
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// tonccpy((void*)0x9E00000, FAT_table_buffer, 0x400);
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// dmaCopy(FAT_table_buffer, (void*)0x9E00000, 0x400);
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tonccpy((void*)0x9E00000, FAT_table_buffer, 0x400);
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SetbufferControl(3);
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SetbufferControl(0);
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tonccpy((u16*)0x9E00000, (u32*)FAT_table_buffer, 0x400);
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SetbufferControl(3);
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SetbufferControl(0);
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/*SetbufferControl(0);
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u16 res;
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while(1) {
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res = SD_Response();
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if(res != 0)break;
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}
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while(1) {
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res = SD_Response();
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if(res != 0x0001)break;
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}
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SetbufferControl(0);*/
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}
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u32 Omega_SetSaveSize(u8 SaveMode) {
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switch (SaveMode) {
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case OMEGA_NOSAVE: return 0;
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case OMEGA_UNKNOWN: return 0x10000;
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case OMEGA_EEPROM_512: return 0x200;
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case OMEGA_EEPROM_8K: return 0x2000;
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case OMEGA_EEPROM_V125: return 0x2000;
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case OMEGA_FLASH_64K: return 0x10000;
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case OMEGA_FLASH_512: return 0x10000;
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case OMEGA_FLASH_1M: return 0x20000;
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case OMEGA_SRAM_32K: return 0x8000;
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case OMEGA_SRAM_64K: return 0x10000;
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default: return 0;
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}
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}
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void SetRampage(u16 page) {
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*(vu16*)0x9fe0000 = 0xd200;
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*(vu16*)0x8000000 = 0x1500;
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@ -189,6 +224,29 @@ void SetSerialMode() {
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*(vu16*)0x9fc0000 = 0x1500;
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}
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u32 CheckSuperCardID() {
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SetRompage(0); // Prevent possible chain boot issue where previously booted app put card into similar mode to SuperCard if it's a card that responds to SetRompage.
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_SC_changeMode(SC_MODE_RAM); // Try again with SuperCard
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// _SC_changeMode16(0x1510);
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*(vu16*)(FlashBase) = 0x4D54;
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if (*(vu16*)(FlashBase) == 0x4D54) {
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ID = 0x227E2202;
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return 0x227E0000;
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}
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return 0;
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}
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u32 CheckOmegaID() {
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// Check For EZ Flash Omega
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if (Read_S98NOR_ID() == 0x223D) {
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ID = 0x227EEA00;
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return 0x227EEA00;
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}
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return 0;
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}
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u32 ReadNorFlashID() {
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vu16 id1, id2, id3, id4;
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ID = 0;
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@ -226,20 +284,7 @@ u32 ReadNorFlashID() {
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fclose(testFile);
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}*/
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if ((id1 != 0x227E) || (id2 != 0x227E)) {
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if (checkForSuperCard()) {
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ID = 0x227E2202;
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return 0x227E0000;
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}
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// Check For EZ Flash Omega
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SetRompage(0x8000);
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id1 = Read_S98NOR_ID();
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if ((id1 == 0x223D)) {
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ID = 0x227EEA00;
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return 0x227EEA00;
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}
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return 0;
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}
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if ((id1 != 0x227E) || (id2 != 0x227E))return 0;
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id1 = *((vu16*)(FlashBase+0xE*2));
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id2 = *((vu16*)(FlashBase+0x100e*2));
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@ -267,7 +312,7 @@ u32 ReadNorFlashID() {
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void chip_reset() {
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if (ID == 0x227EEA00) {
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*((vu16*)(FlashBase_S98)) = 0xF0;
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*((vu16*)0x08600000) = 0xF0;
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return;
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} else if(ID == 0x89168916) {
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*((vu16*)(FlashBase+0)) = 0x50;
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@ -15,7 +15,7 @@ extern u8 *rwbuf;
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extern u8 defaultSettings[];
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extern u8 defaultSettingsEnd[];
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void GBA_ini() {
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void GBA_ini() {
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FILE *fini;
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int len, p, s;
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char key[20];
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@ -26,8 +26,6 @@ void GBA_ini() {
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if(access("/GBA_ExpLoader.ini", F_OK) == 0) {
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fini = fopen("/GBA_ExpLoader.ini", "rb");
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if(access(ini.save_dir, F_OK) != 0)mkdir(ini.save_dir, 0777);
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if(access(ini.sign_dir, F_OK) != 0)mkdir(ini.sign_dir, 0777);
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} else {
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fini = fopen("/GBA_ExpLoader.ini", "wb");
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if (fini) {
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@ -120,19 +118,15 @@ void GBA_ini() {
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while(p < len) {
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p++;
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if(rwbuf[p - 1] == 0x0A)
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break;
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if(rwbuf[p - 1] == 0x0A)break;
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}
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}
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fclose(fini);
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if(ini.save_dir[0] != '/')
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strcpy(ini.save_dir, "/GBA_SAVE");
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if(ini.sign_dir[0] != '/')
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strcpy(ini.sign_dir, "/GBA_SIGN");
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mkdir(ini.save_dir, 0777);
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mkdir(ini.sign_dir, 0777);
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if(ini.save_dir[0] != '/')strcpy(ini.save_dir, "/GBA_SAVE");
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if(ini.sign_dir[0] != '/')strcpy(ini.sign_dir, "/GBA_SIGN");
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if(access(ini.save_dir, F_OK) != 0)mkdir(ini.save_dir, 0777);
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if(access(ini.sign_dir, F_OK) != 0)mkdir(ini.sign_dir, 0777);
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}
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@ -34,7 +34,7 @@ void ctrl_get() {
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memset((u8*)&ctrl, 0, sizeof(struct ctrl_tbl));
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if(carttype != 5 && !isSuperCard && !isOmega) {
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if(carttype != 5 && !isSuperCard/* && !isOmega*/) {
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_RamPG();
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ReadSram(SRAM_ADDR, (u8*)&ctrl, sizeof(struct ctrl_tbl));
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_RamSave(0);
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@ -43,9 +43,9 @@ void ctrl_get() {
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if (isSuperCard) {
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sprintf(expfile, "%s/SUPERCRD.dat", ini.sign_dir);
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} else if (isOmega) {
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} else /*if (isOmega) {
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sprintf(expfile, "%s/OMEGA.dat", ini.sign_dir);
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} else {
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} else*/ {
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sprintf(expfile, "%s/EXP128K.dat", ini.sign_dir);
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}
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exp = fopen(expfile, "rb");
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@ -59,7 +59,7 @@ void ctrl_set() {
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FILE *exp;
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char expfile[64];
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if(carttype != 5 && !isSuperCard && !isOmega) {
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if(carttype != 5 && !isSuperCard/* && !isOmega*/) {
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_RamPG();
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WriteSram(SRAM_ADDR, (u8*)&ctrl, sizeof(struct ctrl_tbl));
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_RamSave(0);
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@ -68,9 +68,9 @@ void ctrl_set() {
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if (isSuperCard) {
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sprintf(expfile, "%s/SUPERCRD.dat", ini.sign_dir);
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} else if (isOmega) {
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} else/* if (isOmega) {
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sprintf(expfile, "%s/OMEGA.dat", ini.sign_dir);
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} else {
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} else*/ {
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sprintf(expfile, "%s/EXP128K.dat", ini.sign_dir);
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}
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exp = fopen(expfile, "wb");
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@ -1551,10 +1551,26 @@ static void _patch_ram(u8 *buf, u32 ofs, const u8 *data, u32 size) {
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u16 *pdata;
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u32 i;
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if (isOmega) {
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u32 romAddress = (u32)buf;
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if ((romAddress >= 0x08800000) && (romAddress < 0x09000000)) {
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SetPSRampage(0);
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} else if ((romAddress >= 0x09000000) && (romAddress < 0x09800000)) {
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SetPSRampage(0x1000);
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} else if ((romAddress >= 0x09800000) && (romAddress < 0x0A000000)) {
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SetPSRampage(0x2000);
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} else if ((romAddress >= 0x0A000000) && (romAddress < 0x0A800000)) {
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SetPSRampage(0x3000);
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}
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}
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pbuf = (u16*)buf;
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pdata = (u16*)data;
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for(i = 0; i < size/2; i++, ofs++)pbuf[ofs] = pdata[i];
|
||||
|
||||
SetPSRampage(0);
|
||||
}
|
||||
|
||||
static void _patch(u8 *buf, u32 ofs, const u8 *data, u32 size, u32 bend) {
|
||||
@ -1632,12 +1648,12 @@ void gba_patch_Ram(u32 exp, char *name, int cart) {
|
||||
|
||||
fmini = 124;
|
||||
|
||||
u8 _OmegaPage = 0;
|
||||
// u8 _OmegaPage = 0;
|
||||
|
||||
for(i = 1; i < PatchCnt; i++) {
|
||||
|
||||
// EZ Flash Omega and it's silly mapping schemes.... :P
|
||||
if (isOmega) {
|
||||
/*if (isOmega) {
|
||||
if ((exp + PatchAddr[i]) >= 0x08800000 && (exp + PatchAddr[i]) < 0x09000000) {
|
||||
SetPSRampage(0);
|
||||
_OmegaPage = 0;
|
||||
@ -1651,13 +1667,11 @@ void gba_patch_Ram(u32 exp, char *name, int cart) {
|
||||
SetPSRampage(0x3000);
|
||||
_OmegaPage = 0x03;
|
||||
}
|
||||
}
|
||||
|
||||
if (isOmega) {
|
||||
buf = (u8*)((exp + PatchAddr[i]) - (_OmegaPage * 0x00800000));
|
||||
} else {
|
||||
buf = (u8*)(exp + PatchAddr[i]);
|
||||
}
|
||||
}*/
|
||||
buf = (u8*)(exp + PatchAddr[i]);
|
||||
|
||||
switch(SaveType) {
|
||||
case 2: // EEPROM
|
||||
@ -1868,7 +1882,7 @@ void gba_patch_Ram(u32 exp, char *name, int cart) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (isOmega)SetPSRampage(0);
|
||||
// if (isOmega)SetPSRampage(0);
|
||||
}
|
||||
|
||||
u32 gba_check_Ram1(u8 *buf, u32 bufsize, u32 size, u32 ofs) {
|
||||
@ -1950,18 +1964,8 @@ void gba_check_Ram2(u32 exp, u8 *buf, u32 bufsize, u32 size) {
|
||||
SetPSRampage(OmegaPage);
|
||||
exp = PSRAMBase_S98;
|
||||
}
|
||||
/*if (exp >= 0x08800000 && exp < 0x09000000) {
|
||||
SetPSRampage(0);
|
||||
} else if (exp >= 0x09000000 && exp < 0x09800000) {
|
||||
SetPSRampage(0x1000);
|
||||
} else if (exp >= 0x0A000000 && exp < 0x0A800000) {
|
||||
SetPSRampage(0x2000);
|
||||
} else if (exp >= 0x0B000000 && exp < 0x0B800000) {
|
||||
SetPSRampage(0x3000);
|
||||
}*/
|
||||
}
|
||||
// u32 currentAddress = exp;
|
||||
// if (isOmega && currentAddress >= 0x08800000 && _OmegaPage != 0)currentAddress = (currentAddress - (_OmegaPage * 0x00800000));
|
||||
_ReadPSram(exp, buf, bufsize+0x400);
|
||||
// dmaCopy((void *)exp, buf, bufsize);
|
||||
// dmaCopyWords(3, buf, (void *)exp, 0x100000);
|
||||
|
||||
@ -30,26 +30,25 @@
|
||||
|
||||
//#include <nds/arm9/console.h> //basic print funcionality
|
||||
|
||||
#define MAX_NOR 0x2000000 // 32MByte
|
||||
#define MAX_NORPLUS 0x4000000 // 64MByte (3 in 1 Plus)
|
||||
#define MAX_PSRAM 0x1000000 // 16MByte
|
||||
#define SRAM_PAGE_SIZE 0x1000 // SRAM Page Size
|
||||
#define MAX_SRAM 0x80000 // 4MBit/512KByte total SRAM
|
||||
#define MAX_NOR 0x2000000 // 32MByte
|
||||
#define MAX_NORPLUS 0x4000000 // 64MByte (3 in 1 Plus)
|
||||
#define MAX_PSRAM 0x1000000 // 16MByte
|
||||
#define SRAM_PAGE_SIZE 0x10000 // SRAM Page Size
|
||||
#define MAX_SRAM 0x80000 // 4MBit/512KByte total SRAM
|
||||
|
||||
#define USE_SRAM 0x20000 // 128KByte
|
||||
#define USE_SRAM_PG 48 // 0x0A030000-0A031FFF
|
||||
#define USE_SRAM 0x20000 // 128KByte
|
||||
#define USE_SRAM_PG 48 // 0x0A030000-0A031FFF
|
||||
#define USE_SRAM_PG_EZ4 11 // 0x0A008000-0A00FFFF
|
||||
#define USE_SRAM_PG_EWN 10 // 0x0A020000-0A02FFFF
|
||||
#define USE_SRAM_PG_EWN128 9 // 0x0A010000-0A01FFFF
|
||||
#define USE_SRAM_PG_M3 6
|
||||
|
||||
|
||||
#define USE_SRAM_NOR 16 // 0x0A010000-0A02FFFF
|
||||
|
||||
#define USE_SRAM_PSR 50 // 0x0A032000-0A051FFF
|
||||
#define USE_SRAM_PSR_EZ4 16 // 0x0A010000-0A02FFFF
|
||||
#define USE_SRAM_PSR_EWN 8 // 0x0A000000-0A01FFFF
|
||||
#define USE_SRAM_PSR_M3 4
|
||||
#define USE_SRAM_PSR_OMEGA 0
|
||||
|
||||
#define PSRAM_BUF 0x8000 // 32KB
|
||||
|
||||
@ -389,72 +388,40 @@ int check_M3() {
|
||||
}
|
||||
|
||||
|
||||
void _RamPG() {
|
||||
if (isSuperCard)return;
|
||||
if (isOmega)return;
|
||||
switch (carttype) {
|
||||
case 3:
|
||||
SetRampage(USE_SRAM_PG_EZ4);
|
||||
return;
|
||||
case 4:
|
||||
SetEWINRam(USE_SRAM_PG_EWN);
|
||||
return;
|
||||
case 5:
|
||||
SetEWINRam(USE_SRAM_PG_EWN128);
|
||||
return;
|
||||
case 6:
|
||||
SetM3Ram(USE_SRAM_PG_M3);
|
||||
return;
|
||||
static bool CheckForSuperCard() {
|
||||
if (CheckSuperCardID() == 0x227E0000) {
|
||||
carttype = 6;
|
||||
is3in1Plus = false;
|
||||
isSuperCard = true;
|
||||
return true;
|
||||
}
|
||||
if (isOmega) {
|
||||
// Omega_Bank_Switching(0);
|
||||
// SetRampage(0x20);
|
||||
SetRampage(0x40);
|
||||
// SetRampage(USE_SRAM_PG);
|
||||
|
||||
} else {
|
||||
SetRampage(USE_SRAM_PG);
|
||||
}
|
||||
// SetRampage(USE_SRAM_PG);
|
||||
return;
|
||||
return false;
|
||||
}
|
||||
|
||||
void _RamSave(int bnk) {
|
||||
if (isSuperCard)return;
|
||||
// if (isOmega)return;
|
||||
switch (carttype) {
|
||||
case 3:
|
||||
SetRampage(USE_SRAM_PSR_EZ4 + bnk * 16);
|
||||
return;
|
||||
case 6:
|
||||
SetM3Ram(USE_SRAM_PSR_M3 + bnk);
|
||||
return;
|
||||
static bool CheckForOmega() { // EZFlash Omega
|
||||
SetRompage(0x8002);
|
||||
if (CheckOmegaID() == 0x227EEA00) {
|
||||
carttype = 1;
|
||||
is3in1Plus = false;
|
||||
isSuperCard = false;
|
||||
isOmega = true;
|
||||
// Set_AUTO_save(0);
|
||||
return true;
|
||||
}
|
||||
|
||||
if(carttype >= 4) {
|
||||
SetEWINRam(USE_SRAM_PSR_EWN + bnk);
|
||||
return;
|
||||
}
|
||||
|
||||
if(GBAmode == 0) {
|
||||
if (isOmega) {
|
||||
SetRampage(bnk * 0x10);
|
||||
/*switch (bnk) {
|
||||
case 0: SetRampage(0); break;
|
||||
case 1: SetRampage(0x10); break;
|
||||
default: return;
|
||||
}*/
|
||||
} else {
|
||||
SetRampage(USE_SRAM_PSR + bnk * 16);
|
||||
}
|
||||
} else {
|
||||
if (isOmega)return;
|
||||
SetRampage(USE_SRAM_NOR + bnk * 16);
|
||||
}
|
||||
return;
|
||||
return false;
|
||||
}
|
||||
|
||||
int checkFlashID() {
|
||||
// Check for special carts before using standard checks.
|
||||
if (CheckForOmega())return carttype;
|
||||
if (CheckForSuperCard())return carttype;
|
||||
|
||||
// Moved this out of main.c to avoid causing issues with Omega/Non EZ Flash carts.
|
||||
CloseNorWrite();
|
||||
SetRompage(0);
|
||||
SetRampage(16);
|
||||
SetShake(0x08);
|
||||
|
||||
int ewin;
|
||||
u32 id;
|
||||
|
||||
@ -493,27 +460,60 @@ int checkFlashID() {
|
||||
carttype = 1;
|
||||
return carttype;
|
||||
case 0x227E2220: carttype = 3; return carttype; // EZ4
|
||||
case 0x227EEA00: // EZFlash Omega
|
||||
carttype = 1;
|
||||
is3in1Plus = false;
|
||||
isSuperCard = false;
|
||||
isOmega = true;
|
||||
SetSDControl(0);
|
||||
Set_RTC_status(1);
|
||||
gl_ingame_RTC_open_status = Read_SET_info(13);
|
||||
if ((gl_ingame_RTC_open_status != 0x0) && (gl_ingame_RTC_open_status != 0x1))gl_ingame_RTC_open_status = 0x1;
|
||||
// Set_AUTO_save(0);
|
||||
// Omega_Bank_Switching(0);
|
||||
return carttype;
|
||||
case 0x227E0000: // SuperCard
|
||||
carttype = 6;
|
||||
is3in1Plus = false;
|
||||
isSuperCard = true;
|
||||
return carttype;
|
||||
default: return 0; // Unsupported/Unimplemented Cart ID
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void _RamPG() {
|
||||
if (isSuperCard)return;
|
||||
switch (carttype) {
|
||||
case 3:
|
||||
SetRampage(USE_SRAM_PG_EZ4);
|
||||
return;
|
||||
case 4:
|
||||
SetEWINRam(USE_SRAM_PG_EWN);
|
||||
return;
|
||||
case 5:
|
||||
SetEWINRam(USE_SRAM_PG_EWN128);
|
||||
return;
|
||||
case 6:
|
||||
SetM3Ram(USE_SRAM_PG_M3);
|
||||
return;
|
||||
}
|
||||
if (isOmega) { SetRampage(16); } else { SetRampage(USE_SRAM_PG); }
|
||||
return;
|
||||
}
|
||||
|
||||
void _RamSave(int bnk) {
|
||||
if (isSuperCard)return;
|
||||
switch (carttype) {
|
||||
case 3:
|
||||
SetRampage(USE_SRAM_PSR_EZ4 + bnk * 16);
|
||||
return;
|
||||
case 6:
|
||||
SetM3Ram(USE_SRAM_PSR_M3 + bnk);
|
||||
return;
|
||||
}
|
||||
|
||||
if(carttype >= 4) {
|
||||
SetEWINRam(USE_SRAM_PSR_EWN + bnk);
|
||||
return;
|
||||
}
|
||||
|
||||
if(GBAmode == 0) {
|
||||
if (isOmega) {
|
||||
SetRampage(USE_SRAM_PSR_OMEGA + (bnk * 16));
|
||||
} else {
|
||||
SetRampage(USE_SRAM_PSR + bnk * 16);
|
||||
}
|
||||
} else {
|
||||
if (isOmega) { SetRampage(USE_SRAM_PSR_OMEGA + (bnk * 16)); return; }
|
||||
SetRampage(USE_SRAM_NOR + bnk * 16);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
bool checkSRAM_cnf() {
|
||||
int i;
|
||||
|
||||
@ -547,6 +547,7 @@ int checkSRAM(char *name) {
|
||||
}
|
||||
|
||||
savesize = ctrl.save_siz[GBAmode];
|
||||
// if (isOmega && savesize > 0x10000)savesize = 0x10000;
|
||||
if((savesize < 0x2000) || (savesize > USE_SRAM)) {
|
||||
savesize = 0x10000;
|
||||
ctrl.save_siz[GBAmode] = savesize;
|
||||
@ -649,53 +650,11 @@ bool getSaveFilename(int sel, char *savename)
|
||||
*******************/
|
||||
|
||||
bool checkBackup() {
|
||||
if(GBAmode == 1)return true;
|
||||
|
||||
if(ctrl.save_flg[GBAmode] == 0xFF)return false;
|
||||
|
||||
if (GBAmode == 1) { return true; } else if (ctrl.save_flg[GBAmode] == 0xFF) { return false; }
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
void writeSramToFile(char *savename) {
|
||||
FILE *saver;
|
||||
u32 len;
|
||||
|
||||
if(savename[0] == 0) return;
|
||||
|
||||
// if((GBAmode == 0) && (checkBackup() == false))return;
|
||||
|
||||
// getSaveFilename(filename, tbuf);
|
||||
sprintf(tbuf, "%s/%s", ini.save_dir, savename);
|
||||
saver = fopen(tbuf, "wb");
|
||||
// memset(rwbuf, 0, USE_SRAM / 2);
|
||||
// OpenNorWrite();
|
||||
|
||||
_RamSave(0);
|
||||
|
||||
if (isOmega) { ReadSram(SRAM_ADDR_OMEGA, rwbuf, USE_SRAM / 2); } else { ReadSram(SRAM_ADDR, rwbuf, USE_SRAM / 2); }
|
||||
|
||||
if(saver != NULL) {
|
||||
len = USE_SRAM / 2;
|
||||
if(len > savesize)len = savesize;
|
||||
fwrite(rwbuf, 1, len, saver);
|
||||
}
|
||||
if((savesize > (USE_SRAM / 2)) && !isSuperCard) {
|
||||
_RamSave(1);
|
||||
if (isOmega) { ReadSram(SRAM_ADDR_OMEGA, rwbuf, USE_SRAM / 2); } else { ReadSram(SRAM_ADDR, rwbuf, USE_SRAM / 2); }
|
||||
if(saver != NULL)fwrite(rwbuf, 1, USE_SRAM / 2, saver);
|
||||
}
|
||||
fclose(saver);
|
||||
|
||||
ctrl.save_flg[GBAmode] = 0xFF;
|
||||
|
||||
if((carttype < 4) && !isSuperCard && !isOmega && !is3in1Plus)OpenNorWrite();
|
||||
|
||||
ctrl_set();
|
||||
|
||||
if((carttype < 4) && !isSuperCard && !isOmega && !is3in1Plus)CloseNorWrite();
|
||||
}
|
||||
|
||||
void SRAMdump(int cmd) {
|
||||
FILE *dmp;
|
||||
int i;
|
||||
@ -711,12 +670,13 @@ void SRAMdump(int cmd) {
|
||||
case 4: mx = 4; break;
|
||||
case 5: mx = 2; break;
|
||||
case 6:
|
||||
if (isSuperCard) { mx = 1; } else { mx = 16; }
|
||||
mx = 16;
|
||||
if (isSuperCard)mx = 1;
|
||||
break;
|
||||
}
|
||||
|
||||
sprintf(name, "%s/SRAM.BIN", ini.save_dir);
|
||||
|
||||
|
||||
if(cmd == 0) {
|
||||
dsp_bar(4, -1);
|
||||
dmp = fopen(name, "wb");
|
||||
@ -726,13 +686,14 @@ void SRAMdump(int cmd) {
|
||||
} else if (!isSuperCard) {
|
||||
if((carttype >= 4)) {
|
||||
SetEWINRam(8 + i);
|
||||
} else if (isOmega) {
|
||||
SetRampage(USE_SRAM_PSR_OMEGA + (i * 16));
|
||||
} else {
|
||||
// if (isOmega && (i > 4))Omega_Bank_Switching(1);
|
||||
SetRampage(i * 16);
|
||||
SetRampage(i * 16);
|
||||
}
|
||||
}
|
||||
|
||||
if (isOmega) { ReadSram(SRAM_ADDR_OMEGA, rwbuf, USE_SRAM / 2); } else { ReadSram(SRAM_ADDR, rwbuf, USE_SRAM / 2); }
|
||||
ReadSram(SRAM_ADDR, rwbuf, USE_SRAM / 2);
|
||||
|
||||
if(dmp != NULL)fwrite(rwbuf, 1, USE_SRAM / 2, dmp);
|
||||
|
||||
@ -759,7 +720,7 @@ void SRAMdump(int cmd) {
|
||||
dsp_bar(5, -1);
|
||||
dmp = fopen(name, "rb");
|
||||
if((carttype < 4) && !isSuperCard && !isOmega && !is3in1Plus)OpenNorWrite();
|
||||
|
||||
|
||||
if (isOmega)Omega_Bank_Switching(0);
|
||||
|
||||
for(i = 0; i < mx; i++) {
|
||||
@ -771,12 +732,15 @@ void SRAMdump(int cmd) {
|
||||
} else {
|
||||
if((carttype >= 4) && !isSuperCard) {
|
||||
SetEWINRam(8 + i);
|
||||
} else if (isOmega) {
|
||||
SetRampage(USE_SRAM_PSR_OMEGA + (i * 16));
|
||||
} else {
|
||||
// if (isOmega && (i > 4))Omega_Bank_Switching(1);
|
||||
SetRampage(i * 16);
|
||||
}
|
||||
}
|
||||
if (isOmega) { WriteSram(SRAM_ADDR_OMEGA, rwbuf, USE_SRAM / 2); } else { WriteSram(SRAM_ADDR, rwbuf, USE_SRAM / 2); }
|
||||
|
||||
WriteSram(SRAM_ADDR, rwbuf, USE_SRAM / 2);
|
||||
|
||||
if (i == 0) {
|
||||
dsp_bar(5, 0);
|
||||
} else {
|
||||
@ -799,7 +763,6 @@ void SRAMdump(int cmd) {
|
||||
if((carttype < 4) && !isSuperCard && !isOmega && !is3in1Plus)CloseNorWrite();
|
||||
}
|
||||
fclose(dmp);
|
||||
// if (isOmega)Omega_Bank_Switching(0);
|
||||
_RamSave(0);
|
||||
dsp_bar(-1, 100);
|
||||
}
|
||||
@ -810,16 +773,16 @@ void blankSRAM(char *savename) {
|
||||
|
||||
if((carttype < 4) && !isSuperCard && !isOmega && !is3in1Plus)OpenNorWrite();
|
||||
|
||||
_RamSave(0);
|
||||
|
||||
if (isOmega)Omega_Bank_Switching(0);
|
||||
|
||||
if (isOmega) { WriteSram(SRAM_ADDR_OMEGA, rwbuf, USE_SRAM / 2); } else { WriteSram(SRAM_ADDR, rwbuf, USE_SRAM / 2); }
|
||||
_RamSave(0);
|
||||
|
||||
WriteSram(SRAM_ADDR, rwbuf, USE_SRAM / 2);
|
||||
|
||||
// if(carttype != 5) {
|
||||
if (!isSuperCard) {
|
||||
if (!isSuperCard && !isOmega) {
|
||||
_RamSave(1);
|
||||
if (isOmega) { WriteSram(SRAM_ADDR_OMEGA, rwbuf, USE_SRAM / 2); } else { WriteSram(SRAM_ADDR, rwbuf, USE_SRAM / 2); }
|
||||
WriteSram(SRAM_ADDR, rwbuf, USE_SRAM / 2);
|
||||
}
|
||||
// }
|
||||
|
||||
@ -832,6 +795,45 @@ void blankSRAM(char *savename) {
|
||||
if((carttype < 4) && !isSuperCard && !isOmega && !is3in1Plus)CloseNorWrite();
|
||||
}
|
||||
|
||||
void writeSramToFile(char *savename) {
|
||||
FILE *saver;
|
||||
u32 len;
|
||||
|
||||
if(savename[0] == 0) return;
|
||||
|
||||
// if((GBAmode == 0) && (checkBackup() == false))return;
|
||||
|
||||
// getSaveFilename(filename, tbuf);
|
||||
sprintf(tbuf, "%s/%s", ini.save_dir, savename);
|
||||
saver = fopen(tbuf, "wb");
|
||||
// memset(rwbuf, 0, USE_SRAM / 2);
|
||||
// OpenNorWrite();
|
||||
|
||||
_RamSave(0);
|
||||
|
||||
ReadSram(SRAM_ADDR, rwbuf, USE_SRAM / 2);
|
||||
|
||||
if(saver != NULL) {
|
||||
len = USE_SRAM / 2;
|
||||
if(len > savesize)len = savesize;
|
||||
fwrite(rwbuf, 1, len, saver);
|
||||
}
|
||||
if((savesize > (USE_SRAM / 2)) && !isSuperCard && !isOmega) {
|
||||
_RamSave(1);
|
||||
ReadSram(SRAM_ADDR, rwbuf, USE_SRAM / 2);
|
||||
if(saver != NULL)fwrite(rwbuf, 1, USE_SRAM / 2, saver);
|
||||
}
|
||||
fclose(saver);
|
||||
|
||||
ctrl.save_flg[GBAmode] = 0xFF;
|
||||
|
||||
if((carttype < 4) && !isSuperCard && !isOmega && !is3in1Plus)OpenNorWrite();
|
||||
|
||||
ctrl_set();
|
||||
|
||||
if((carttype < 4) && !isSuperCard && !isOmega && !is3in1Plus)CloseNorWrite();
|
||||
}
|
||||
|
||||
void writeSramFromFile(char *savename) {
|
||||
FILE *saver;
|
||||
|
||||
@ -857,21 +859,21 @@ void writeSramFromFile(char *savename) {
|
||||
|
||||
// OpenNorWrite();
|
||||
|
||||
if (isOmega)Omega_Bank_Switching(0);
|
||||
|
||||
_RamSave(0);
|
||||
|
||||
memset(rwbuf, 0xFF, USE_SRAM / 2);
|
||||
fread(rwbuf, 1, USE_SRAM / 2, saver);
|
||||
|
||||
if (isOmega)Omega_Bank_Switching(0);
|
||||
|
||||
if (isOmega) { WriteSram(SRAM_ADDR_OMEGA, rwbuf, USE_SRAM / 2); } else { WriteSram(SRAM_ADDR, rwbuf, USE_SRAM / 2); }
|
||||
WriteSram(SRAM_ADDR, rwbuf, USE_SRAM / 2);
|
||||
|
||||
// if(carttype != 5) {
|
||||
if((savesize > (USE_SRAM / 2)) && !isSuperCard) {
|
||||
if((savesize > (USE_SRAM / 2)) && !isSuperCard && !isOmega) {
|
||||
_RamSave(1);
|
||||
memset(rwbuf, 0xFF, USE_SRAM / 2);
|
||||
fread(rwbuf, 1, USE_SRAM / 2, saver);
|
||||
if (isOmega) { WriteSram(SRAM_ADDR_OMEGA, rwbuf, USE_SRAM / 2); } else { WriteSram(SRAM_ADDR, rwbuf, USE_SRAM / 2); }
|
||||
WriteSram(SRAM_ADDR, rwbuf, USE_SRAM / 2);
|
||||
_RamSave(0);
|
||||
}
|
||||
// }
|
||||
@ -996,6 +998,7 @@ int writeFileToNor(int sel) {
|
||||
|
||||
|
||||
int writeFileToRam(int sel) {
|
||||
|
||||
FILE *gbaFile;
|
||||
char savName[512];
|
||||
u32 siz;
|
||||
@ -1032,15 +1035,20 @@ int writeFileToRam(int sel) {
|
||||
if((carttype < 4) && !isSuperCard && !isOmega) {
|
||||
if(carttype == 3) { SetRompage(0x300 - 3); } else { SetRompage(384 - 3); }
|
||||
OpenNorWrite();
|
||||
} else if (isOmega) {
|
||||
SetSDControl(0);
|
||||
Set_RTC_status(1);
|
||||
SetPSRampage(0);
|
||||
// Omega_InitFatBuffer(OMEGA_UNKNOWN, Omega_SetSaveSize(OMEGA_UNKNOWN), fs[sel].filesize);
|
||||
}
|
||||
|
||||
// savesize = gba_check(gbaFile, fs[sel].filesize, rwbuf, 0x100000);
|
||||
// if(savesize == 0)savesize = 0x8000;
|
||||
|
||||
dsp_bar(2, -1);
|
||||
|
||||
gba_check_int(fs[sel].filename);
|
||||
|
||||
if (isOmega)SetPSRampage(0);
|
||||
|
||||
DC_FlushRange((void*)rwbuf, (0x100000 + 0x400));
|
||||
|
||||
for(siz = 0; siz < fs[sel].filesize; siz += 0x100000, exp += 0x100000) {
|
||||
@ -1051,7 +1059,7 @@ int writeFileToRam(int sel) {
|
||||
|
||||
if(siz == 0 && gba)header_rep(rwbuf);
|
||||
|
||||
if (!isOmega)savesize = gba_check_Ram1(rwbuf, 0x100000, fs[sel].filesize, siz);
|
||||
savesize = gba_check_Ram1(rwbuf, 0x100000, fs[sel].filesize, siz);
|
||||
|
||||
// EZ Flash Omega and it's silly mapping schemes.... :P
|
||||
if (isOmega) {
|
||||
@ -1062,20 +1070,23 @@ int writeFileToRam(int sel) {
|
||||
}
|
||||
}
|
||||
|
||||
// _WritePSram(exp, rwbuf, 0x100000);
|
||||
dmaCopy((void*)rwbuf, (void*)exp, 0x100000);
|
||||
// _WritePSram(exp, rwbuf, 0x100000);
|
||||
// dmaCopyWords(3, rwbuf, (void *)exp, 0x100000);
|
||||
}
|
||||
|
||||
|
||||
DC_FlushRange((void*)rwbuf, 0x100000);
|
||||
|
||||
if (isOmega)SetPSRampage(0);
|
||||
if (isOmega) {
|
||||
if (savesize > 0x10000)savesize = 0x10000;
|
||||
SetPSRampage(0);
|
||||
}
|
||||
|
||||
dsp_bar(2, 100);
|
||||
|
||||
bool allowPatches = true;
|
||||
|
||||
|
||||
if (isSuperCard) {
|
||||
if (savesize > 0x10000)savesize = 0x10000;
|
||||
bool allowPatches = true;
|
||||
dsp_bar(-1, 100);
|
||||
dsp_bar(3, -1);
|
||||
dsp_bar(3, 25);
|
||||
@ -1099,7 +1110,6 @@ int writeFileToRam(int sel) {
|
||||
if (!isSuperCard)gba_patch_Ram(exps, fs[sel].filename, carttype);
|
||||
|
||||
fclose(gbaFile);
|
||||
|
||||
|
||||
// if(carttype == 5 && savesize == 0x20000) {
|
||||
// dsp_bar(-1, 100);
|
||||
@ -1107,11 +1117,10 @@ int writeFileToRam(int sel) {
|
||||
// }
|
||||
|
||||
// getSaveFilename(sel, savName);
|
||||
|
||||
dsp_bar(5, 50);
|
||||
|
||||
if(cmd >= 0) { writeSramFromFile(savName); } else { blankSRAM(savName); }
|
||||
|
||||
|
||||
if((carttype < 4) && !isSuperCard && !isOmega)CloseNorWrite();
|
||||
|
||||
_RamSave(0);
|
||||
@ -1129,9 +1138,7 @@ int writeFileToRam(int sel) {
|
||||
if (isSuperCard)return 0;
|
||||
|
||||
if (isOmega) {
|
||||
Set_RTC_status(gl_ingame_RTC_open_status);
|
||||
rtc_toggle(true);
|
||||
// Omega_InitFatBuffer(0x10);
|
||||
SetRompage(0x200);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -48,7 +48,7 @@ extern uint16* SubScreen;
|
||||
|
||||
#define BG_256_COLOR (BIT(7))
|
||||
|
||||
#define VERSTRING "v0.63"
|
||||
#define VERSTRING "v0.64"
|
||||
|
||||
int numFiles = 0;
|
||||
int numGames = 0;
|
||||
@ -434,6 +434,7 @@ int rumble_cmd() {
|
||||
if(ky & KEY_A) break;
|
||||
if(ky & KEY_L) {
|
||||
GBAmode = 1;
|
||||
if (isOmega)GBAmode = 0;
|
||||
setGBAmode();
|
||||
cmd = -1;
|
||||
break;
|
||||
@ -822,11 +823,7 @@ int gba_sel() {
|
||||
if(softReset && (carttype > 2)) {
|
||||
cmd = 3;
|
||||
break;
|
||||
} /*else if (softReset && isOmega) {
|
||||
cmd = 3;
|
||||
break;
|
||||
}*/
|
||||
if(GBAmode < cn && carttype <= 2) {
|
||||
} else if(GBAmode < cn && carttype <= 2) {
|
||||
GBAmode++;
|
||||
if ((GBAmode == 1) && isOmega)GBAmode++;
|
||||
setGBAmode();
|
||||
@ -842,13 +839,16 @@ int gba_sel() {
|
||||
|
||||
|
||||
if(ky & KEY_START) {
|
||||
if(softReset) {
|
||||
if(softReset && !isOmega) {
|
||||
cmd = 99;
|
||||
if(carttype == 1) {
|
||||
SetRompage(0);
|
||||
SetRampage(16);
|
||||
}
|
||||
break;
|
||||
} else if (isOmega && (GBAmode == 0)) {
|
||||
SetRampage(0x8002);
|
||||
gbaMode();
|
||||
}
|
||||
}
|
||||
if(ky & KEY_SELECT) {
|
||||
@ -1007,10 +1007,10 @@ REG_EXMEMCNT = (reg & 0xFFE0) | (1 << 4) | (1 << 2) | 1;
|
||||
|
||||
if(isDSiMode()) { err_cnf(14, 15); turn_off(0); }
|
||||
|
||||
CloseNorWrite();
|
||||
/*CloseNorWrite();
|
||||
SetRompage(0);
|
||||
SetRampage(16);
|
||||
SetShake(0x08);
|
||||
SetShake(0x08);*/
|
||||
|
||||
|
||||
/********
|
||||
@ -1036,7 +1036,7 @@ REG_EXMEMCNT = (reg & 0xFFE0) | (1 << 4) | (1 << 2) | 1;
|
||||
if (is3in1Plus) {
|
||||
ShinoPrint_SUB( SubScreen, 23*6, 1*12-2, (u8*)"[3in1Pls]", 0, 0, 0 );
|
||||
} else if (isOmega) {
|
||||
ShinoPrint_SUB( SubScreen, 23*6, 1*12-2, (u8*)"[ Omega ]", 0, 0, 0 );
|
||||
ShinoPrint_SUB( SubScreen, 23*6, 1*12-2, (u8*)"[ Ħ DE ]", 0, 0, 0 );
|
||||
} else {
|
||||
ShinoPrint_SUB( SubScreen, 23*6, 1*12-2, (u8*)" [ 3in1 ]", 0, 0, 0 );
|
||||
}
|
||||
@ -1098,7 +1098,7 @@ inp_key();
|
||||
*(vu8*)0x027FFC35 = 0x01; // GBA
|
||||
|
||||
rwbuf = (u8*)malloc(0x100000 + 1024);
|
||||
|
||||
|
||||
GBA_ini();
|
||||
|
||||
if(!checkSRAM_cnf() && (carttype != 5) && (cnf_inp(9, 10) & KEY_B))turn_off(softReset);
|
||||
@ -1117,12 +1117,16 @@ inp_key();
|
||||
dsp_bar(4, -1);
|
||||
dsp_bar(4, 0);
|
||||
for (int I = 0; I < 30; I++)swiWaitForVBlank();
|
||||
if(save_sel(1, filename) >= 0)writeSramToFile(filename);
|
||||
dsp_bar(4, 50);
|
||||
for (int I = 0; I < 30; I++)swiWaitForVBlank();
|
||||
dsp_bar(4, 100);
|
||||
for (int I = 0; I < 30; I++)swiWaitForVBlank();
|
||||
dsp_bar(-1, 100);
|
||||
if(save_sel(1, filename) >= 0) {
|
||||
writeSramToFile(filename);
|
||||
dsp_bar(4, 50);
|
||||
for (int I = 0; I < 30; I++)swiWaitForVBlank();
|
||||
dsp_bar(4, 100);
|
||||
for (int I = 0; I < 30; I++)swiWaitForVBlank();
|
||||
dsp_bar(-1, 100);
|
||||
} else {
|
||||
dsp_bar(-1, 100);
|
||||
}
|
||||
}
|
||||
|
||||
getGBAmode();
|
||||
@ -1156,15 +1160,14 @@ inp_key();
|
||||
break;
|
||||
case 3:
|
||||
if((carttype != 4) && !isSuperCard && !isOmega) {
|
||||
/*if (isOmega) {
|
||||
Set_RTC_status(gl_ingame_RTC_open_status);
|
||||
SetRompage(0x200);*/
|
||||
// } else {
|
||||
if (is3in1Plus) { SetRompage(0x100); } else { SetRompage(0x300); }
|
||||
OpenNorWrite();
|
||||
// }
|
||||
if (isOmega) {
|
||||
SetRompage(0x8002);
|
||||
} else {
|
||||
if (is3in1Plus) { SetRompage(0x100); } else { SetRompage(0x300); }
|
||||
OpenNorWrite();
|
||||
}
|
||||
}
|
||||
if(!isSuperCard)RamClear();
|
||||
if(!isSuperCard && !isOmega)RamClear();
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user